1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms 3*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual 4*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a 5*4882a593Smuzhiyun * whole. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * a) This file is free software; you can redistribute it and/or 8*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as 9*4882a593Smuzhiyun * published by the Free Software Foundation; either version 2 of the 10*4882a593Smuzhiyun * License, or (at your option) any later version. 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, 13*4882a593Smuzhiyun * but WITHOUT ANY WARRANTY; without even the implied warranty of 14*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15*4882a593Smuzhiyun * GNU General Public License for more details. 16*4882a593Smuzhiyun * 17*4882a593Smuzhiyun * Or, alternatively, 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * b) Permission is hereby granted, free of charge, to any person 20*4882a593Smuzhiyun * obtaining a copy of this software and associated documentation 21*4882a593Smuzhiyun * files (the "Software"), to deal in the Software without 22*4882a593Smuzhiyun * restriction, including without limitation the rights to use, 23*4882a593Smuzhiyun * copy, modify, merge, publish, distribute, sublicense, and/or 24*4882a593Smuzhiyun * sell copies of the Software, and to permit persons to whom the 25*4882a593Smuzhiyun * Software is furnished to do so, subject to the following 26*4882a593Smuzhiyun * conditions: 27*4882a593Smuzhiyun * 28*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be 29*4882a593Smuzhiyun * included in all copies or substantial portions of the Software. 30*4882a593Smuzhiyun * 31*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 32*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 33*4882a593Smuzhiyun * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 34*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 35*4882a593Smuzhiyun * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 36*4882a593Smuzhiyun * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 37*4882a593Smuzhiyun * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 38*4882a593Smuzhiyun * OTHER DEALINGS IN THE SOFTWARE. 39*4882a593Smuzhiyun */ 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun#include <dt-bindings/pwm/pwm.h> 42*4882a593Smuzhiyun#include "rk3288.dtsi" 43*4882a593Smuzhiyun#include "rk3288-u-boot.dtsi" 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun/ { 46*4882a593Smuzhiyun memory { 47*4882a593Smuzhiyun reg = <0x0 0x80000000>; 48*4882a593Smuzhiyun device_type = "memory"; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun emmc_pwrseq: emmc-pwrseq { 52*4882a593Smuzhiyun compatible = "mmc-pwrseq-emmc"; 53*4882a593Smuzhiyun pinctrl-0 = <&emmc_reset>; 54*4882a593Smuzhiyun pinctrl-names = "default"; 55*4882a593Smuzhiyun reset-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun ext_gmac: external-gmac-clock { 59*4882a593Smuzhiyun compatible = "fixed-clock"; 60*4882a593Smuzhiyun #clock-cells = <0>; 61*4882a593Smuzhiyun clock-frequency = <125000000>; 62*4882a593Smuzhiyun clock-output-names = "ext_gmac"; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun vcc_sys: vsys-regulator { 66*4882a593Smuzhiyun compatible = "regulator-fixed"; 67*4882a593Smuzhiyun regulator-name = "vcc_sys"; 68*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 69*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 70*4882a593Smuzhiyun regulator-always-on; 71*4882a593Smuzhiyun regulator-boot-on; 72*4882a593Smuzhiyun }; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun&cpu0 { 76*4882a593Smuzhiyun cpu0-supply = <&vdd_cpu>; 77*4882a593Smuzhiyun}; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun&emmc { 80*4882a593Smuzhiyun bus-width = <8>; 81*4882a593Smuzhiyun cap-mmc-highspeed; 82*4882a593Smuzhiyun disable-wp; 83*4882a593Smuzhiyun non-removable; 84*4882a593Smuzhiyun num-slots = <1>; 85*4882a593Smuzhiyun mmc-pwrseq = <&emmc_pwrseq>; 86*4882a593Smuzhiyun pinctrl-names = "default"; 87*4882a593Smuzhiyun pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; 88*4882a593Smuzhiyun vmmc-supply = <&vcc_io>; 89*4882a593Smuzhiyun status = "okay"; 90*4882a593Smuzhiyun}; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun&gmac { 93*4882a593Smuzhiyun assigned-clocks = <&cru SCLK_MAC>; 94*4882a593Smuzhiyun assigned-clock-parents = <&ext_gmac>; 95*4882a593Smuzhiyun clock_in_out = "input"; 96*4882a593Smuzhiyun phy-mode = "rgmii"; 97*4882a593Smuzhiyun phy-supply = <&vccio_pmu>; 98*4882a593Smuzhiyun pinctrl-names = "default"; 99*4882a593Smuzhiyun pinctrl-0 = <&rgmii_pins &phy_rst>; 100*4882a593Smuzhiyun snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>; 101*4882a593Smuzhiyun snps,reset-active-low; 102*4882a593Smuzhiyun snps,reset-delays-us = <0 10000 30000>; 103*4882a593Smuzhiyun rx_delay = <0x10>; 104*4882a593Smuzhiyun tx_delay = <0x30>; 105*4882a593Smuzhiyun}; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun&i2c0 { 108*4882a593Smuzhiyun status = "okay"; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun act8846: act8846@5a { 111*4882a593Smuzhiyun compatible = "active-semi,act8846"; 112*4882a593Smuzhiyun reg = <0x5a>; 113*4882a593Smuzhiyun system-power-controller; 114*4882a593Smuzhiyun inl1-supply = <&vcc_io>; 115*4882a593Smuzhiyun inl2-supply = <&vcc_sys>; 116*4882a593Smuzhiyun inl3-supply = <&vcc_20>; 117*4882a593Smuzhiyun vp1-supply = <&vcc_sys>; 118*4882a593Smuzhiyun vp2-supply = <&vcc_sys>; 119*4882a593Smuzhiyun vp3-supply = <&vcc_sys>; 120*4882a593Smuzhiyun vp4-supply = <&vcc_sys>; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun regulators { 123*4882a593Smuzhiyun vcc_ddr: REG1 { 124*4882a593Smuzhiyun regulator-name = "VCC_DDR"; 125*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 126*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 127*4882a593Smuzhiyun regulator-always-on; 128*4882a593Smuzhiyun }; 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun vcc_io: REG2 { 131*4882a593Smuzhiyun regulator-name = "VCC_IO"; 132*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 133*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 134*4882a593Smuzhiyun regulator-always-on; 135*4882a593Smuzhiyun }; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun vdd_log: REG3 { 138*4882a593Smuzhiyun regulator-name = "VDD_LOG"; 139*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 140*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 141*4882a593Smuzhiyun regulator-always-on; 142*4882a593Smuzhiyun }; 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun vcc_20: REG4 { 145*4882a593Smuzhiyun regulator-name = "VCC_20"; 146*4882a593Smuzhiyun regulator-min-microvolt = <2000000>; 147*4882a593Smuzhiyun regulator-max-microvolt = <2000000>; 148*4882a593Smuzhiyun regulator-always-on; 149*4882a593Smuzhiyun }; 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun vccio_sd: REG5 { 152*4882a593Smuzhiyun regulator-name = "VCCIO_SD"; 153*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 154*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 155*4882a593Smuzhiyun regulator-always-on; 156*4882a593Smuzhiyun }; 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun vdd10_lcd: REG6 { 159*4882a593Smuzhiyun regulator-name = "VDD10_LCD"; 160*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 161*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 162*4882a593Smuzhiyun regulator-always-on; 163*4882a593Smuzhiyun }; 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun vcca_codec: REG7 { 166*4882a593Smuzhiyun regulator-name = "VCCA_CODEC"; 167*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 168*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 169*4882a593Smuzhiyun regulator-always-on; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun vcca_tp: REG8 { 173*4882a593Smuzhiyun regulator-name = "VCCA_TP"; 174*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 175*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 176*4882a593Smuzhiyun regulator-always-on; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun vccio_pmu: REG9 { 180*4882a593Smuzhiyun regulator-name = "VCCIO_PMU"; 181*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 182*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 183*4882a593Smuzhiyun regulator-always-on; 184*4882a593Smuzhiyun }; 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun vdd_10: REG10 { 187*4882a593Smuzhiyun regulator-name = "VDD_10"; 188*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 189*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 190*4882a593Smuzhiyun regulator-always-on; 191*4882a593Smuzhiyun }; 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun vcc_18: REG11 { 194*4882a593Smuzhiyun regulator-name = "VCC_18"; 195*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 196*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 197*4882a593Smuzhiyun regulator-always-on; 198*4882a593Smuzhiyun }; 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun vcc18_lcd: REG12 { 201*4882a593Smuzhiyun regulator-name = "VCC18_LCD"; 202*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 203*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 204*4882a593Smuzhiyun regulator-always-on; 205*4882a593Smuzhiyun }; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun }; 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun vdd_cpu: syr827@40 { 210*4882a593Smuzhiyun compatible = "silergy,syr827"; 211*4882a593Smuzhiyun reg = <0x40>; 212*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 213*4882a593Smuzhiyun regulator-always-on; 214*4882a593Smuzhiyun regulator-boot-on; 215*4882a593Smuzhiyun regulator-enable-ramp-delay = <300>; 216*4882a593Smuzhiyun regulator-name = "vdd_cpu"; 217*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 218*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 219*4882a593Smuzhiyun regulator-ramp-delay = <8000>; 220*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 221*4882a593Smuzhiyun }; 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun vdd_gpu: syr828@41 { 224*4882a593Smuzhiyun compatible = "silergy,syr828"; 225*4882a593Smuzhiyun reg = <0x41>; 226*4882a593Smuzhiyun fcs,suspend-voltage-selector = <1>; 227*4882a593Smuzhiyun regulator-always-on; 228*4882a593Smuzhiyun regulator-enable-ramp-delay = <300>; 229*4882a593Smuzhiyun regulator-min-microvolt = <850000>; 230*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 231*4882a593Smuzhiyun regulator-name = "vdd_gpu"; 232*4882a593Smuzhiyun regulator-ramp-delay = <8000>; 233*4882a593Smuzhiyun vin-supply = <&vcc_sys>; 234*4882a593Smuzhiyun }; 235*4882a593Smuzhiyun}; 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun&pinctrl { 238*4882a593Smuzhiyun pcfg_output_high: pcfg-output-high { 239*4882a593Smuzhiyun output-high; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun emmc { 243*4882a593Smuzhiyun emmc_reset: emmc-reset { 244*4882a593Smuzhiyun rockchip,pins = <3 9 RK_FUNC_GPIO &pcfg_pull_none>; 245*4882a593Smuzhiyun }; 246*4882a593Smuzhiyun }; 247*4882a593Smuzhiyun 248*4882a593Smuzhiyun gmac { 249*4882a593Smuzhiyun phy_rst: phy-rst { 250*4882a593Smuzhiyun rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun }; 253*4882a593Smuzhiyun}; 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun&tsadc { 256*4882a593Smuzhiyun rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ 257*4882a593Smuzhiyun rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ 258*4882a593Smuzhiyun status = "okay"; 259*4882a593Smuzhiyun}; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun&vopb { 262*4882a593Smuzhiyun status = "okay"; 263*4882a593Smuzhiyun}; 264*4882a593Smuzhiyun 265*4882a593Smuzhiyun&vopb_mmu { 266*4882a593Smuzhiyun status = "okay"; 267*4882a593Smuzhiyun}; 268*4882a593Smuzhiyun 269*4882a593Smuzhiyun&vopl { 270*4882a593Smuzhiyun status = "okay"; 271*4882a593Smuzhiyun}; 272*4882a593Smuzhiyun 273*4882a593Smuzhiyun&vopl_mmu { 274*4882a593Smuzhiyun status = "okay"; 275*4882a593Smuzhiyun}; 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun&wdt { 278*4882a593Smuzhiyun status = "okay"; 279*4882a593Smuzhiyun}; 280