1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/net/rockchip-dwmac.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Rockchip 10/100/1000 Ethernet driver(GMAC) 8 9maintainers: 10 - David Wu <david.wu@rock-chips.com> 11 12# We need a select here so we don't match all nodes with 'snps,dwmac' 13select: 14 properties: 15 compatible: 16 contains: 17 enum: 18 - rockchip,px30-gmac 19 - rockchip,rk3128-gmac 20 - rockchip,rk3228-gmac 21 - rockchip,rk3288-gmac 22 - rockchip,rk3308-gmac 23 - rockchip,rk3328-gmac 24 - rockchip,rk3366-gmac 25 - rockchip,rk3368-gmac 26 - rockchip,rk3399-gmac 27 - rockchip,rk3528-gmac 28 - rockchip,rk3562-gmac 29 - rockchip,rk3568-gmac 30 - rockchip,rk3588-gmac 31 - rockchip,rv1106-gmac 32 - rockchip,rv1108-gmac 33 - rockchip,rv1126-gmac 34 required: 35 - compatible 36 37allOf: 38 - $ref: "snps,dwmac.yaml#" 39 40properties: 41 compatible: 42 oneOf: 43 - items: 44 - enum: 45 - rockchip,px30-gmac 46 - rockchip,rk3128-gmac 47 - rockchip,rk3228-gmac 48 - rockchip,rk3288-gmac 49 - rockchip,rk3308-gmac 50 - rockchip,rk3328-gmac 51 - rockchip,rk3366-gmac 52 - rockchip,rk3368-gmac 53 - rockchip,rk3399-gmac 54 - rockchip,rk3562-gmac 55 - rockchip,rv1108-gmac 56 - items: 57 - enum: 58 - rockchip,rk3528-gmac 59 - rockchip,rk3562-gmac 60 - rockchip,rk3568-gmac 61 - rockchip,rk3588-gmac 62 - rockchip,rv1106-gmac 63 - rockchip,rv1126-gmac 64 - const: snps,dwmac-4.20a 65 66 clocks: 67 minItems: 5 68 maxItems: 8 69 70 clock-names: 71 contains: 72 enum: 73 - stmmaceth 74 - mac_clk_tx 75 - mac_clk_rx 76 - aclk_mac 77 - pclk_mac 78 - clk_mac_ref 79 - clk_mac_refout 80 - clk_mac_speed 81 82 clock_in_out: 83 description: 84 For RGMII, it must be "input", means main clock(125MHz) 85 is not sourced from SoC's PLL, but input from PHY. 86 For RMII, "input" means PHY provides the reference clock(50MHz), 87 "output" means GMAC provides the reference clock. 88 $ref: /schemas/types.yaml#/definitions/string 89 enum: [input, output] 90 91 rockchip,grf: 92 description: The phandle of the syscon node for the general register file. 93 $ref: /schemas/types.yaml#/definitions/phandle 94 95 tx_delay: 96 description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default. 97 $ref: /schemas/types.yaml#/definitions/uint32 98 99 rx_delay: 100 description: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default. 101 $ref: /schemas/types.yaml#/definitions/uint32 102 103 phy-supply: 104 description: PHY regulator 105 106required: 107 - compatible 108 - clocks 109 - clock-names 110 111unevaluatedProperties: false 112 113examples: 114 - | 115 #include <dt-bindings/interrupt-controller/arm-gic.h> 116 #include <dt-bindings/clock/rk3288-cru.h> 117 118 gmac: ethernet@ff290000 { 119 compatible = "rockchip,rk3288-gmac"; 120 reg = <0xff290000 0x10000>; 121 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 122 interrupt-names = "macirq"; 123 clocks = <&cru SCLK_MAC>, 124 <&cru SCLK_MAC_RX>, <&cru SCLK_MAC_TX>, 125 <&cru SCLK_MACREF>, <&cru SCLK_MACREF_OUT>, 126 <&cru ACLK_GMAC>, <&cru PCLK_GMAC>; 127 clock-names = "stmmaceth", 128 "mac_clk_rx", "mac_clk_tx", 129 "clk_mac_ref", "clk_mac_refout", 130 "aclk_mac", "pclk_mac"; 131 assigned-clocks = <&cru SCLK_MAC>; 132 assigned-clock-parents = <&ext_gmac>; 133 134 rockchip,grf = <&grf>; 135 phy-mode = "rgmii"; 136 clock_in_out = "input"; 137 tx_delay = <0x30>; 138 rx_delay = <0x10>; 139 }; 140