| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | renesas,rpc-if.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Reduced Pin Count Interface (RPC-IF)
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
16 The flash chip itself should be represented by a subnode of the RPC-IF node.
19 - if it contains "jedec,spi-nor", then SPI is used;
20 - if it contains "cfi-flash", then HyperFlash is used.
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/renesas/ |
| H A D | r8a77970.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a77970-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
27 /* External CAN clock - to be overridden by boards that provide it */
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| H A D | r8a77980.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3H (R8A77980) SoC
9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/r8a77980-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
28 /* External CAN clock - to be overridden by boards that provide it */
30 compatible = "fixed-clock";
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| /OK3568_Linux_fs/u-boot/drivers/mtd/ |
| H A D | Kconfig | 43 for probing the capabilities of flash devices. If you wish to
44 support any device that is CFI-compliant, you need to enable this
54 for probing the capabilities of flash devices. If you wish to
55 support any device that is CFI-compliant, you need to enable this
72 This enables access to Microchip PIC32 internal non-CFI flash
73 chips through PIC32 Non-Volatile-Memory Controller.
76 bool "Renesas RCar Gen3 RPC Hyperflash driver"
80 RCar Gen3 RPC controller.
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| H A D | renesas_rpc_hf.c | 2 * Renesas RCar Gen3 RPC Hyperflash driver
8 * SPDX-License-Identifier: GPL-2.0
172 if (ret) in rpc_hf_mode()
185 if (man) in rpc_hf_mode()
212 if (ret) in rpc_hf_xfer()
227 if (write) { in rpc_hf_xfer()
230 if (size == RPC_HF_SIZE_64BIT) in rpc_hf_xfer()
246 if (ret) in rpc_hf_xfer()
249 if (size == RPC_HF_SIZE_64BIT) in rpc_hf_xfer()
263 if (ret) in rpc_hf_write_cmd()
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| /OK3568_Linux_fs/kernel/drivers/clk/renesas/ |
| H A D | rcar-gen3-cpg.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car Gen3 Clock Pulse Generator
5 * Copyright (C) 2015-2018 Glider bvba
8 * Based on clk-rcar-gen3.c
16 #include <linux/clk-provider.h>
25 #include "renesas-cpg-mssr.h"
26 #include "rcar-gen3-cpg.h"
63 csn->saved = readl(csn->reg); in cpg_simple_notifier_call()
67 writel(csn->saved, csn->reg); in cpg_simple_notifier_call()
76 csn->nb.notifier_call = cpg_simple_notifier_call; in cpg_simple_notifier_register()
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| H A D | r8a77980-cpg-mssr.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * Based on r8a7795-cpg-mssr.c
16 #include <linux/soc/renesas/rcar-rst.h>
19 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
21 #include "renesas-cpg-mssr.h"
22 #include "rcar-gen3-cpg.h"
72 DEF_BASE("rpc", R8A77980_CLK_RPC, CLK_TYPE_GEN3_RPC,
127 DEF_MOD("sys-dmac2", 217, R8A77980_CLK_S0D3),
128 DEF_MOD("sys-dmac1", 218, R8A77980_CLK_S0D3),
137 DEF_MOD("intc-ex", 407, R8A77980_CLK_CP),
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| H A D | r8a77970-cpg-mssr.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017-2018 Cogent Embedded Inc.
7 * Based on r8a7795-cpg-mssr.c
12 #include <linux/clk-provider.h>
16 #include <linux/soc/renesas/rcar-rst.h>
18 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
20 #include "renesas-cpg-mssr.h"
21 #include "rcar-gen3-cpg.h"
94 DEF_FIXED("rpc", R8A77970_CLK_RPC, CLK_PLL1_DIV2, 5, 1),
125 DEF_MOD("sys-dmac2", 217, R8A77970_CLK_S2D1),
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| H A D | r8a7795-cpg-mssr.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 * Based on clk-rcar-gen3.c
16 #include <linux/soc/renesas/rcar-rst.h>
19 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
21 #include "renesas-cpg-mssr.h"
22 #include "rcar-gen3-cpg.h"
76 DEF_BASE("rpc", R8A7795_CLK_RPC, CLK_TYPE_GEN3_RPC,
128 DEF_MOD("fdp1-2", 117, R8A7795_CLK_S2D1), /* ES1.x */
129 DEF_MOD("fdp1-1", 118, R8A7795_CLK_S0D1),
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| H A D | r8a77965-cpg-mssr.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * Based on r8a7795-cpg-mssr.c
17 #include <linux/soc/renesas/rcar-rst.h>
19 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
21 #include "renesas-cpg-mssr.h"
22 #include "rcar-gen3-cpg.h"
74 DEF_BASE("rpc", R8A77965_CLK_RPC, CLK_TYPE_GEN3_RPC,
125 DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1),
135 DEF_MOD("sys-dmac2", 217, R8A77965_CLK_S3D1),
136 DEF_MOD("sys-dmac1", 218, R8A77965_CLK_S3D1),
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| H A D | r8a7796-cpg-mssr.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * r8a7796 (R-Car M3-W/W+) Clock Pulse Generator / Module Standby and Software
6 * Copyright (C) 2016-2019 Glider bvba
7 * Copyright (C) 2018-2019 Renesas Electronics Corp.
9 * Based on r8a7795-cpg-mssr.c
19 #include <linux/soc/renesas/rcar-rst.h>
21 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
23 #include "renesas-cpg-mssr.h"
24 #include "rcar-gen3-cpg.h"
78 DEF_BASE("rpc", R8A7796_CLK_RPC, CLK_TYPE_GEN3_RPC,
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| H A D | r8a774e1-cpg-mssr.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Based on r8a7795-cpg-mssr.c
15 #include <linux/soc/renesas/rcar-rst.h>
17 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h>
19 #include "renesas-cpg-mssr.h"
20 #include "rcar-gen3-cpg.h"
73 DEF_BASE("rpc", R8A774E1_CLK_RPC, CLK_TYPE_GEN3_RPC,
124 DEF_MOD("fdp1-1", 118, R8A774E1_CLK_S0D1),
125 DEF_MOD("fdp1-0", 119, R8A774E1_CLK_S0D1),
142 DEF_MOD("sys-dmac2", 217, R8A774E1_CLK_S3D1),
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| /OK3568_Linux_fs/u-boot/include/configs/ |
| H A D | ulcb.h | 7 * SPDX-License-Identifier: GPL-2.0+
17 #include "rcar-gen3-common.h"
20 #if defined(CONFIG_R8A7796)
23 #define PHYS_SDRAM_1_SIZE (0x40000000u - DRAM_RSV_SIZE)
33 /* use to RPC(SPI Multi I/O Bus Controller) */
96 #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
105 /* INTC-AP, IRQC */
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| /OK3568_Linux_fs/u-boot/drivers/spi/ |
| H A D | Kconfig | 4 if SPI
16 typically use driver-private data instead of extending the
22 Enable this option if you want to enable the SPI memory extension.
24 by providing an high-level interface to send memory-like commands.
26 if DM_SPI
50 please refer to doc/device-tree-bindings/spi/spi-ath79.txt.
54 default y if ARCH_AT91
79 Enable the Broadcom set-top box SPI driver. This driver can
86 Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
131 to access the SPI NOR flash, MMC-over-SPI on platforms based on
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| H A D | renesas_rpc_spi.c | 2 * Renesas RCar Gen3 RPC QSPI driver
6 * SPDX-License-Identifier: GPL-2.0+
14 #include <dt-structs.h>
161 s32 freq; /* Default clock freq, -1 for none */
176 struct rpc_spi_priv *priv = dev_get_priv(dev->parent); in rpc_spi_wait_sslf()
178 return wait_for_bit_le32((void *)priv->regs + RPC_CMNSR, RPC_CMNSR_SSLF, in rpc_spi_wait_sslf()
184 struct rpc_spi_priv *priv = dev_get_priv(dev->parent); in rpc_spi_wait_tend()
186 return wait_for_bit_le32((void *)priv->regs + RPC_CMNSR, RPC_CMNSR_TEND, in rpc_spi_wait_tend()
192 struct udevice *bus = dev->parent; in rpc_spi_flush_read_cache()
198 priv->regs + RPC_DRCR); in rpc_spi_flush_read_cache()
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| /OK3568_Linux_fs/kernel/drivers/memory/ |
| H A D | renesas-rpc-if.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas RPC-IF core driver
5 * Copyright (C) 2018-2019 Renesas Solutions Corp.
7 * Copyright (C) 2019-2020 Cogent Embedded, Inc.
19 #include <memory/renesas-rpc-if.h>
45 #define RPCIF_DRCR_RBURST(v) ((((v) - 1) & 0x1F) << 16)
113 #define RPCIF_DMDMCR_DMCYC(v) ((((v) - 1) & 0x1F) << 0)
122 #define RPCIF_SMDMCR_DMCYC(v) ((((v) - 1) & 0x1F) << 0)
171 struct rpcif *rpc = context; in rpcif_reg_read() local
176 switch (rpc->xfer_size) { in rpcif_reg_read()
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| /OK3568_Linux_fs/kernel/ |
| H A D | MAINTAINERS | 9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
44 script will be best if you have git installed and are making
46 See Documentation/process/submitting-patches.rst for details.
52 PLEASE document known bugs. If it doesn't work for everything
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
61 6. Make sure you have the right to send any changes you make. If you
66 please Cc: security@kernel.org, especially if the maintainer
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