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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/usb/
H A Dsnps,dwc3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 be presented as a standalone DT node with an optional vendor-specific
18 - $ref: usb-drd.yaml#
19 - if:
25 - dr_mode
29 $ref: usb-xhci.yaml#
48 clock-names:
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H A Damlogic,meson-g12a-usb-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
15 in host-only mode, and a DWC2 IP Core configured for USB2 peripheral mode
20 One of the USB2 PHYs can be re-routed in peripheral mode to a DWC2 USB IP.
26 host-only mode.
33 - amlogic,meson-gxl-usb-ctrl
34 - amlogic,meson-gxm-usb-ctrl
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
35 #address-cells = <1>;
36 #size-cells = <0>;
40 compatible = "arm,cortex-a72";
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H A Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/thermal/thermal.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
34 #address-cells = <1>;
35 #size-cells = <0>;
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H A Dfsl-ls1088a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
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H A Dfsl-ls208xa.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
31 #address-cells = <1>;
32 #size-cells = <0>;
38 /* DRAM space - 1, size : 2 GB DRAM */
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H A Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
25 #address-cells = <1>;
26 #size-cells = <0>;
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H A Dfsl-ls1012a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1012A family SoC.
6 * Copyright 2019-2020 NXP
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
22 rtic-a = &rtic_a;
23 rtic-b = &rtic_b;
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H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
24 #address-cells = <1>;
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/OK3568_Linux_fs/kernel/drivers/usb/dwc3/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
3 * core.c - DesignWare USB3 DRD Controller Core file
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
24 #include <linux/dma-mapping.h>
44 * dwc3_get_dr_mode - Validates and sets dr_mode
50 struct device *dev = dwc->dev; in dwc3_get_dr_mode()
53 if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) in dwc3_get_dr_mode()
54 dwc->dr_mode = USB_DR_MODE_OTG; in dwc3_get_dr_mode()
56 mode = dwc->dr_mode; in dwc3_get_dr_mode()
57 hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0); in dwc3_get_dr_mode()
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H A Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * core.h - DesignWare USB3 DRD Core Header
5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com
20 #include <linux/dma-mapping.h>
183 #define DWC3_GSBUSCFG0_INCRBRSTENA (1 << 0) /* undefined length enable */
390 /* Global Frame Length Adjustment Register */
646 * struct dwc3_event_buffer - Software event buffer representation
649 * @length: size of this buffer
659 unsigned int length; member
682 * struct dwc3_ep - device side endpoint representation
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/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dzynqmp.dtsi4 * (C) Copyright 2014 - 2015, Xilinx, Inc.
8 * SPDX-License-Identifier: GPL-2.0+
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <1>;
18 #size-cells = <0>;
21 compatible = "arm,cortex-a53", "arm,armv8";
23 enable-method = "psci";
25 cpu-idle-states = <&CPU_SLEEP_0>;
29 compatible = "arm,cortex-a53", "arm,armv8";
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/OK3568_Linux_fs/u-boot/common/
H A Dedid.c7 * SPDX-License-Identifier: GPL-2.0+
11 * (C) Copyright 2008-2017 Fuzhou Rockchip Electronics Co., Ltd
33 #define BITMAP_FIRST_WORD_MASK(start) (~0UL << ((start) & (BITS_PER_LONG - 1)))
34 #define BITMAP_LAST_WORD_MASK(nbits) (~0UL >> (-(nbits) & (BITS_PER_LONG - 1)))
35 #define EDID_PRODUCT_ID(e) ((e)->prod_code[0] | ((e)->prod_code[1] << 8))
37 (((edid)->version > (maj)) || \
38 ((edid)->version == (maj) && (edid)->revision > (min)))
49 /* Reported 135MHz pixel clock is too high, needs adjustment */
63 /* Force reduced-blanking timings for detailed modes */
106 /* Envision Peripherals, Inc. EN-7100e */
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dls1021a.dtsi2 * Copyright 2013-2014 Freescale Semiconductor, Inc.
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/thermal/thermal.h>
52 #address-cells = <2>;
53 #size-cells = <2>;
55 interrupt-parent = <&gic>;
73 #address-cells = <1>;
74 #size-cells = <0>;
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/
H A Ddrm_edid.c3 * Copyright (c) 2007-2008 Intel Corporation
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
48 (((edid)->version > (maj)) || \
49 ((edid)->version == (maj) && (edid)->revision > (min)))
64 /* Reported 135MHz pixel clock is too high, needs adjustment */
76 /* Force reduced-blanking timings for detailed modes */
115 /* BOE model on HP Pavilion 15-n233sl reports 8 bpc, but is a 6 bpc panel */
121 /* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
131 /* Envision Peripherals, Inc. EN-7100e */
143 /* LG Philips LCD LP154W01-A5 */
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
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/OK3568_Linux_fs/kernel/drivers/infiniband/hw/hfi1/
H A Dchip.c2 * Copyright(c) 2015 - 2020 Intel Corporation.
24 * - Redistributions of source code must retain the above copyright
26 * - Redistributions in binary form must reproduce the above copyright
30 * - Neither the name of Intel Corporation nor the names of its
73 MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)");
119 #define SEC_SC_HALTED 0x4 /* per-context only */
120 #define SEC_SPC_FREEZE 0x8 /* per-HFI only */
128 * 0 - User Fecn Handling
129 * 1 - Vnic
130 * 2 - AIP
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/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/share/info/
H A Dgcc.info3 Copyright (C) 1988-2020 Free Software Foundation, Inc.
8 Invariant Sections being "Funding Free Software", the Front-Cover Texts
9 being (a) (see below), and with the Back-Cover Texts being (b) (see
13 (a) The FSF's Front-Cover Text is:
17 (b) The FSF's Back-Cover Text is:
22 INFO-DIR-SECTION Software development
23 START-INFO-DIR-ENTRY
26 * gcov: (gcc) Gcov. 'gcov'--a test coverage program.
27 * gcov-tool: (gcc) Gcov-tool. 'gcov-tool'--an offline gcda profile processing program.
28 * gcov-dump: (gcc) Gcov-dump. 'gcov-dump'--an offline gcda and gcno profile dump tool.
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/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/share/info/
H A Dgcc.info3 Copyright (C) 1988-2020 Free Software Foundation, Inc.
8 Invariant Sections being "Funding Free Software", the Front-Cover Texts
9 being (a) (see below), and with the Back-Cover Texts being (b) (see
13 (a) The FSF's Front-Cover Text is:
17 (b) The FSF's Back-Cover Text is:
22 INFO-DIR-SECTION Software development
23 START-INFO-DIR-ENTRY
26 * gcov: (gcc) Gcov. 'gcov'--a test coverage program.
27 * gcov-tool: (gcc) Gcov-tool. 'gcov-tool'--an offline gcda profile processing program.
28 * gcov-dump: (gcc) Gcov-dump. 'gcov-dump'--an offline gcda and gcno profile dump tool.
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/OK3568_Linux_fs/external/xserver/
H A DChangeLog3 Date: Tue Apr 13 10:01:34 2021 -0400
7 Signed-off-by: Matt Turner <mattst88@gmail.com>
15 CVE-2021-3472 / ZDI-CAN-1259
18 Jan-Niklas Sohn working with Trend Micro Zero Day Initiative
20 Signed-off-by: Matthieu Herrb <matthieu@herrb.eu>
24 Date: Sun Feb 21 21:49:58 2021 -0800
30 Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
35 Date: Sun Feb 21 21:49:14 2021 -0800
39 Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>
44 Date: Sun Feb 21 20:58:42 2021 -0800
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