Searched +full:min +full:- +full:wakeup +full:- +full:pin +full:- +full:assert +full:- +full:time +full:- +full:ms (Results 1 – 21 of 21) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Ingenic SoCs Real-Time Clock DT bindings10 - Paul Cercueil <paul@crapouillou.net>13 - $ref: rtc.yaml#18 - enum:19 - ingenic,jz4740-rtc20 - ingenic,jz4760-rtc21 - items:[all …]
1 // SPDX-License-Identifier: GPL-2.0+3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>66 return readl(rtc->base + reg); in jz4740_rtc_reg_read()76 } while (!(ctrl & JZ_RTC_CTRL_WRDY) && --timeout); in jz4740_rtc_wait_write_ready()78 return timeout ? 0 : -EIO; in jz4740_rtc_wait_write_ready()90 writel(JZ_RTC_WENR_MAGIC, rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write()93 ctrl = readl(rtc->base + JZ_REG_RTC_WENR); in jz4780_rtc_enable_write()94 } while (!(ctrl & JZ_RTC_WENR_WEN) && --timeout); in jz4780_rtc_enable_write()96 return timeout ? 0 : -EIO; in jz4780_rtc_enable_write()104 if (rtc->type >= ID_JZ4760) in jz4740_rtc_reg_write()[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)3 * Google Gru-scarlet board device tree source8 #include "rk3399-gru.dtsi"14 pp1250_s3: pp1250-s3 {15 compatible = "regulator-fixed";16 regulator-name = "pp1250_s3";19 regulator-always-on;20 regulator-boot-on;21 regulator-min-microvolt = <1250000>;22 regulator-max-microvolt = <1250000>;[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */2 /* Copyright(c) 2007 - 2018 Intel Corporation. */11 /* Definitions for power management and wakeup registers */16 #define E1000_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */17 #define E1000_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */18 #define E1000_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */19 #define E1000_WUFC_MC 0x00000008 /* Directed Multicast Wakeup Enable */20 #define E1000_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */44 #define E1000_CTRL_EXT_SDP2_DATA 0x00000040 /* Value of SW Defineable Pin 2 */45 #define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Defineable Pin 3 */[all …]
4 Copyright 2008-2022 NXP31 uap_oper_ctrl: uAP operation control when in-STA disconnect with ext-AP33 For example, to install multi-chip driver,36 …wifi_mod_para.conf is used to support multi-chips which has different load module parameters. It c…107 pcie_int_mode=0|1|2 <Legacy mode, MSI mode (default), MSI-X mode>114 expected PA current is expected to be in the 80-90 mA range for b/g/n modes115 wakelock_timeout=<set wakelock_timeout value (ms)>117 indication_gpio=0xXY <GPIO to indicate wakeup source and its level; high four bits X:118 level(0/1) for normal wakeup; low four bits Y: GPIO pin number. This parameter120 …hs_wake_interval=<Host sleep wakeup interval,it will round to nearest multiple dtim*beacon_period …[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */2 /* Copyright(c) 1999 - 2018 Intel Corporation. */11 /* Definitions for power management and wakeup registers */16 #define E1000_WUC_APMPME 0x00000008 /* Assert PME on APM Wakeup */17 #define E1000_WUC_PHY_WAKE 0x00000100 /* if PHY supports wakeup */20 #define E1000_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */21 #define E1000_WUFC_MAG 0x00000002 /* Magic Packet Wakeup Enable */22 #define E1000_WUFC_EX 0x00000004 /* Directed Exact Wakeup Enable */23 #define E1000_WUFC_MC 0x00000008 /* Directed Multicast Wakeup Enable */24 #define E1000_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */[all …]
4 Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved.7 * SPDX-License-Identifier: GPL-2.0+11 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-649737 printf("e1000: %s: ERROR: " fmt, (NIC)->name ,##args)41 printf("e1000: %s: DEBUG: " fmt, (NIC)->name ,##args)52 writel((value), ((a)->hw_addr + E1000_##reg))54 readl((a)->hw_addr + E1000_##reg)56 writel((value), ((a)->hw_addr + E1000_##reg + ((offset) << 2)))58 readl((a)->hw_addr + E1000_##reg + ((offset) << 2))350 #define IFE_PHY_MDIX_CONTROL 0x1C /* MDI/MDI-X Control register */[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */2 /* Copyright(c) 1999 - 2006 Intel Corporation. */297 #define E1000_MNG_DHCP_COMMAND_TIMEOUT 10 /* Time in ms to process MNG command */425 /* MAC decode size is 128K - This is the size of BAR0 */446 (MINIMUM_ETHERNET_FRAME_SIZE - ETHERNET_FCS_SIZE)489 * E1000_RAR_ENTRIES - 1 multicast addresses.506 /* Receive Descriptor - Extended */532 /* Receive Descriptor - Packet Split */556 __le16 length[3]; /* length of buffers 1-3 */570 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,6 * David Mosberger-Tang8 * Copyright 1997 -- 2000 Martin Mares <mj@ucw.cz>69 unsigned int delay = dev->d3hot_delay; in pci_dev_d3_sleep()70 int err = -EOPNOTSUPP; in pci_dev_d3_sleep()77 if (err == -EOPNOTSUPP) in pci_dev_d3_sleep()98 * pci=hpmmiosize=nnM overrides non-prefetchable MMIO size,109 /* PCIe MPS/MRRS strategy; can be overridden by kernel command-line param */126 * measured in 32-bit words, not bytes.[all …]
7 * Copyright (C) 2008-2017, Marvell International Ltd.14 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the15 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.17 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE63 /** Hexdump for level-2 debugging */145 && pmpriv->adapter->callbacks.moal_print_netintf) \146 pmpriv->adapter->callbacks.moal_print_netintf( \147 pmpriv->adapter->pmoal_handle, \148 pmpriv->bss_index, level); \155 /** Debug hexdump for level-1 debugging */[all …]
2 * Misc utility routines for accessing chip-specific features3 * of the SiliconBackplane-based Broadcom chips.22 * <<Broadcom-WL-IPTag/Dual:>>116 * the write. During that time the 'SlowWritePending' bit in the PMUStatus register is set.166 static void si_gci_get_chipctrlreg_ringidx_base4(uint32 pin, uint32 *regidx, uint32 *pos);167 static uint8 si_gci_get_chipctrlreg_ringidx_base8(uint32 pin, uint32 *regidx, uint32 *pos);226 static uint32 wd_msticks; /**< watchdog timer ticks normalized to ms */264 * devid - pci device id (used to determine chip#)265 * osh - opaque OS handle266 * regs - virtual address of initial core registers[all …]
... get/set message bits msglevel errorstring wdtick watchdog tick time (ms units) msi_sim simulate MSI interrupts for the
8 * Copyright 2008-2022 NXP15 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the16 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.18 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE64 /** Hexdump for level-2 debugging */166 pmpriv->adapter->callbacks.moal_print_netintf) \167 pmpriv->adapter->callbacks.moal_print_netintf( \168 pmpriv->adapter->pmoal_handle, \169 pmpriv->bss_index, level); \176 /** Debug hexdump for level-1 debugging */[all …]
26 * <<Broadcom-WL-IPTag/Dual:>>62 * BCME_.. error codes are extended by various features - e.g. FTM, NAN, SAE etc.69 * The error codes -4096 ... -5119 are reserved for firmware signing.71 * Next available (inclusive) range: [-8*1024 + 1, -7*1024]76 /* 11ax trigger frame format - versioning info */122 (sizeof(wl_dfs_forced_t) + (((n) < 1) ? (0) : (((n) - 1)* sizeof(chanspec_t))))136 LARGE_INTEGER sys_time; /**< current system time */138 int64 sys_time; /**< current system time */142 #define DFS_SCAN_S_IDLE -1226 * dynamically start pseudo upgrade. If in pseudo sense time, we[all …]
1 // SPDX-License-Identifier: GPL-2.0+6 * This code is *strongly* based on EHCI-HCD code by David Brownell since7 * the chip is a quasi-EHCI compatible.25 #include <linux/dma-mapping.h>82 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */85 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */101 u32 hcs_params; /* HCSPARAMS - offset 0x4 */110 u32 hcc_params; /* HCCPARAMS - offset 0x8 */116 #define HCC_64BIT_ADDR(p) ((p)&(1)) /* true: can use 64-bit addr */117 u8 portroute[8]; /* nibbles for routing - offset 0xC */[all …]
72 measurement. Their error is +/-20k on a quiet (private) network and also118 3) compile de4x5.c, but include -DMODULE in the command line to ensure124 (usually /etc/rc.inet[12] at boot time).145 The downside is the 1 'jiffies' (10ms) resolution.150 The SMC9332 card has a non-compliant SROM which needs fixing - I have152 to a previous DEC-STD format.177 RECOMMENDED WAY TO RUN THE DRIVER and has been done for a limited time192 SROM, the feature is ignored unless lp->params.fdx is set at compile193 time OR during a module load (insmod de4x5 args='eth??:fdx' [see201 and media. The only lexical constraints are: the board name (dev->name)[all …]
3 Date: Tue Apr 13 10:01:34 2021 -04007 Signed-off-by: Matt Turner <mattst88@gmail.com>15 CVE-2021-3472 / ZDI-CAN-125918 Jan-Niklas Sohn working with Trend Micro Zero Day Initiative20 Signed-off-by: Matthieu Herrb <matthieu@herrb.eu>24 Date: Sun Feb 21 21:49:58 2021 -080030 Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>35 Date: Sun Feb 21 21:49:14 2021 -080039 Signed-off-by: Jeremy Huddleston Sequoia <jeremyhu@apple.com>44 Date: Sun Feb 21 20:58:42 2021 -0800[all …]
... then 81 /usr/share/command-not-found/command-not-found -- "$ ...
1 <abi-corpus-group version='2.0' architecture='elf-arm-aarch64'>2 <abi-corpus version='2.0' path='vmlinux' architecture='elf-arm-aarch64'>3 <elf-function-symbols>4 …<elf-symbol name='PDE_DATA' type='func-type' binding='global-binding' visibility='default-visibili…5 …<elf-symbol name='__ClearPageMovable' type='func-type' binding='global-binding' visibility='defaul…6 …<elf-symbol name='__SetPageMovable' type='func-type' binding='global-binding' visibility='default-…7 …<elf-symbol name='___pskb_trim' type='func-type' binding='global-binding' visibility='default-visi…8 …<elf-symbol name='___ratelimit' type='func-type' binding='global-binding' visibility='default-visi…9 …<elf-symbol name='__alloc_disk_node' type='func-type' binding='global-binding' visibility='default…10 …<elf-symbol name='__alloc_pages_nodemask' type='func-type' binding='global-binding' visibility='de…[all …]