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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Dsdhci-sprd.txt1 * Spreadtrum SDHCI controller (sdhci-sprd)
7 and the properties used by the sdhci-sprd driver.
10 - compatible: Should contain "sprd,sdhci-r11".
11 - reg: physical base address of the controller and length.
12 - interrupts: Interrupts used by the SDHCI controller.
13 - clocks: Should contain phandle for the clock feeding the SDHCI controller
14 - clock-names: Should contain the following:
15 "sdio" - SDIO source clock (required)
16 "enable" - gate clock which used for enabling/disabling the device (required)
17 "2x_enable" - gate clock controlling the device for some special platforms (optional)
[all …]
H A Dmtk-sd.txt10 - compatible: value should be either of the following.
11 "mediatek,mt8135-mmc": for mmc host ip compatible with mt8135
12 "mediatek,mt8173-mmc": for mmc host ip compatible with mt8173
13 "mediatek,mt8183-mmc": for mmc host ip compatible with mt8183
14 "mediatek,mt8516-mmc": for mmc host ip compatible with mt8516
15 "mediatek,mt6779-mmc": for mmc host ip compatible with mt6779
16 "mediatek,mt2701-mmc": for mmc host ip compatible with mt2701
17 "mediatek,mt2712-mmc": for mmc host ip compatible with mt2712
18 "mediatek,mt7622-mmc": for MT7622 SoC
19 "mediatek,mt7623-mmc", "mediatek,mt2701-mmc": for MT7623 SoC
[all …]
/OK3568_Linux_fs/u-boot/board/xes/xpedite537x/
H A Dddr.c5 * SPDX-License-Identifier: GPL-2.0+
21 * There are four board-specific SDRAM timing parameters which must be
23 * 1.) CPO (Read Capture Delay)
24 * - TIMING_CFG_2 register
26 * chip-specific internal delays.
27 * 2.) WR_DATA_DELAY (Write Command to Data Strobe Delay)
28 * - TIMING_CFG_2 register
30 * Unless clock and DQ lanes are very different
32 * of 1/2 clock delay.
33 * 3.) CLK_ADJUST (Clock and Addr/Cmd alignment control)
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dmediatek-dwmac.txt9 - compatible: Should be "mediatek,mt2712-gmac" for MT2712 SoC
10 - reg: Address and length of the register set for the device
11 - interrupts: Should contain the MAC interrupts
12 - interrupt-names: Should contain a list of interrupt names corresponding to
15 - clocks: Must contain a phandle for each entry in clock-names.
16 - clock-names: The name of the clock listed in the clocks property. These are
18 - mac-address: See ethernet.txt in the same directory
19 - phy-mode: See ethernet.txt in the same directory
20 - mediatek,pericfg: A phandle to the syscon node that control ethernet
21 interface and timing delay.
[all …]
H A Damlogic,meson-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/net/amlogic,meson-dwmac.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Neil Armstrong <narmstrong@baylibre.com>
12 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
20 - amlogic,meson6-dwmac
21 - amlogic,meson8b-dwmac
22 - amlogic,meson8m2-dwmac
23 - amlogic,meson-gxbb-dwmac
[all …]
/OK3568_Linux_fs/kernel/Documentation/timers/
H A Dtimekeeping.rst2 Clock sources, Clock events, sched_clock() and delay timers
10 If you grep through the kernel source you will find a number of architecture-
11 specific implementations of clock sources, clockevents and several likewise
12 architecture-specific overrides of the sched_clock() function and some
13 delay timers.
15 To provide timekeeping for your platform, the clock source provides
16 the basic timeline, whereas clock events shoot interrupts on certain points
17 on this timeline, providing facilities such as high-resolution timers.
18 sched_clock() is used for scheduling and timestamping, and delay timers
19 provide an accurate delay source using hardware counters.
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/c6x/
H A Dclocks.txt1 C6X PLL Clock Controllers
2 -------------------------
4 This is a first-cut support for the SoC clock controllers. This is still
6 clock support is added to the kernel.
10 - compatible: "ti,c64x+pll"
11 May also have SoC-specific value to support SoC-specific initialization
13 "ti,c6455-pll"
14 "ti,c6457-pll"
15 "ti,c6472-pll"
16 "ti,c6474-pll"
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/
H A Drenesas,sh-msiof.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/renesas,sh-msiof.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 - $ref: spi-controller.yaml#
18 - items:
19 - const: renesas,msiof-sh73a0 # SH-Mobile AG5
20 - const: renesas,sh-mobile-msiof # generic SH-Mobile compatible
22 - items:
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/
H A Drt5682.txt7 - compatible : "realtek,rt5682" or "realtek,rt5682i"
9 - reg : The I2C address of the device.
13 - interrupts : The CODEC's interrupt output.
15 - realtek,dmic1-data-pin
20 - realtek,dmic1-clk-pin
21 0: using GPIO1 pin as dmic1 clock pin
22 1: using GPIO3 pin as dmic1 clock pin
24 - realtek,jd-src
28 - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin.
30 - realtek,btndet-delay
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/memory-controllers/
H A Darm,pl172.txt5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
11 first address cell and it may accept values 0..N-1
12 (N - total number of partitions). The second cell is the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
23 - clock-ranges: Empty property indicating that child nodes can inherit
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mpc8568mds/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
17 * Factors to consider for clock adjust: in fsl_ddr_board_options()
18 * - number of chips on bus in fsl_ddr_board_options()
19 * - position of slot in fsl_ddr_board_options()
20 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
21 * - ??? in fsl_ddr_board_options()
23 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
27 popts->clk_adjust = 6; in fsl_ddr_board_options()
31 * - frequency in fsl_ddr_board_options()
32 * - ddr1 vs. ddr2 in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mpc8555cds/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
17 * Factors to consider for clock adjust: in fsl_ddr_board_options()
18 * - number of chips on bus in fsl_ddr_board_options()
19 * - position of slot in fsl_ddr_board_options()
20 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
21 * - ??? in fsl_ddr_board_options()
23 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
27 popts->clk_adjust = 6; in fsl_ddr_board_options()
31 * - frequency in fsl_ddr_board_options()
32 * - ddr1 vs. ddr2 in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mpc8548cds/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
17 * Factors to consider for clock adjust: in fsl_ddr_board_options()
18 * - number of chips on bus in fsl_ddr_board_options()
19 * - position of slot in fsl_ddr_board_options()
20 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
21 * - ??? in fsl_ddr_board_options()
23 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
27 popts->clk_adjust = 7; in fsl_ddr_board_options()
31 * - frequency in fsl_ddr_board_options()
32 * - ddr1 vs. ddr2 in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/socrates/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
17 * Factors to consider for clock adjust: in fsl_ddr_board_options()
18 * - number of chips on bus in fsl_ddr_board_options()
19 * - position of slot in fsl_ddr_board_options()
20 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
21 * - ??? in fsl_ddr_board_options()
23 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
27 popts->clk_adjust = 7; in fsl_ddr_board_options()
31 * - frequency in fsl_ddr_board_options()
32 * - ddr1 vs. ddr2 in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/sbc8641d/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
17 * Factors to consider for clock adjust: in fsl_ddr_board_options()
18 * - number of chips on bus in fsl_ddr_board_options()
19 * - position of slot in fsl_ddr_board_options()
20 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
21 * - ??? in fsl_ddr_board_options()
23 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
27 popts->clk_adjust = 7; in fsl_ddr_board_options()
31 * - frequency in fsl_ddr_board_options()
32 * - ddr1 vs. ddr2 in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mpc8541cds/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
17 * Factors to consider for clock adjust: in fsl_ddr_board_options()
18 * - number of chips on bus in fsl_ddr_board_options()
19 * - position of slot in fsl_ddr_board_options()
20 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
21 * - ??? in fsl_ddr_board_options()
23 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
27 popts->clk_adjust = 6; in fsl_ddr_board_options()
31 * - frequency in fsl_ddr_board_options()
32 * - ddr1 vs. ddr2 in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mpc8610hpcd/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
17 * Factors to consider for clock adjust: in fsl_ddr_board_options()
18 * - number of chips on bus in fsl_ddr_board_options()
19 * - position of slot in fsl_ddr_board_options()
20 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
21 * - ??? in fsl_ddr_board_options()
23 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
27 popts->clk_adjust = 7; in fsl_ddr_board_options()
31 * - frequency in fsl_ddr_board_options()
32 * - ddr1 vs. ddr2 in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mpc8544ds/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
17 * Factors to consider for clock adjust: in fsl_ddr_board_options()
18 * - number of chips on bus in fsl_ddr_board_options()
19 * - position of slot in fsl_ddr_board_options()
20 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
21 * - ??? in fsl_ddr_board_options()
23 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
27 popts->clk_adjust = 7; in fsl_ddr_board_options()
31 * - frequency in fsl_ddr_board_options()
32 * - ddr1 vs. ddr2 in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mpc8536ds/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
17 * Factors to consider for clock adjust: in fsl_ddr_board_options()
18 * - number of chips on bus in fsl_ddr_board_options()
19 * - position of slot in fsl_ddr_board_options()
20 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
21 * - ??? in fsl_ddr_board_options()
23 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
27 popts->clk_adjust = 7; in fsl_ddr_board_options()
31 * - frequency in fsl_ddr_board_options()
32 * - ddr1 vs. ddr2 in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/u-boot/board/freescale/mpc8569mds/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
17 * Factors to consider for clock adjust: in fsl_ddr_board_options()
18 * - number of chips on bus in fsl_ddr_board_options()
19 * - position of slot in fsl_ddr_board_options()
20 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
21 * - ??? in fsl_ddr_board_options()
23 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
27 popts->clk_adjust = 4; in fsl_ddr_board_options()
31 * - frequency in fsl_ddr_board_options()
32 * - ddr1 vs. ddr2 in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/
H A Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/gpio/gpio.h>
12 interrupt-parent = <&intc>;
14 qcom,msm-id = <292 0x0>;
16 #address-cells = <2>;
[all …]
H A Dsm8150.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/power/qcom-aoss-qmp.h>
9 #include <dt-bindings/power/qcom-rpmpd.h>
10 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
11 #include <dt-bindings/clock/qcom,rpmh.h>
12 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
13 #include <dt-bindings/clock/qcom,gpucc-sm8150.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
[all …]
/OK3568_Linux_fs/u-boot/board/xes/xpedite520x/
H A Dddr.c4 * SPDX-License-Identifier: GPL-2.0
20 * as a standard unregistered SO-DIMM. */ in get_spd()
21 if (spd->dimm_type == 0) { in get_spd()
22 spd->dimm_type = 0x4; in get_spd()
32 * Factors to consider for clock adjust: in fsl_ddr_board_options()
33 * - number of chips on bus in fsl_ddr_board_options()
34 * - position of slot in fsl_ddr_board_options()
35 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
36 * - ??? in fsl_ddr_board_options()
38 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Dpx30-evb-ext-rk618.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/clock/rk618-cru.h>
8 #include <dt-bindings/display/media-bus-format.h>
9 #include "px30-evb-ddr3-v10.dtsi"
10 #include "px30-android.dtsi"
16 compatible = "sitronix,st7703", "simple-panel-dsi";
18 power-supply = <&vcc3v3_lcd>;
20 prepare-delay-ms = <2>;
21 reset-delay-ms = <1>;
[all …]
/OK3568_Linux_fs/kernel/include/linux/amba/
H A Dpl022.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2008-2009 ST-Ericsson AB
11 * linux-2.6.17-rc3-mm1/drivers/spi/pxa2xx_spi.c
30 * enum ssp_interface - interfaces allowed for this SSP Controller
47 * enum ssp_hierarchy - whether SSP is configured as Master or Slave
55 * enum ssp_clock_params - clock parameters, to set SSP clock at a
64 * enum ssp_rx_endian - endianess of Rx FIFO Data
73 * enum ssp_tx_endian - endianess of Tx FIFO Data
81 * enum ssp_data_size - number of bits in one data element
97 * enum ssp_mode - SSP mode of operation (Communication modes)
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