Lines Matching +full:clock +full:- +full:delay
4 * SPDX-License-Identifier: GPL-2.0
20 * as a standard unregistered SO-DIMM. */ in get_spd()
21 if (spd->dimm_type == 0) { in get_spd()
22 spd->dimm_type = 0x4; in get_spd()
32 * Factors to consider for clock adjust: in fsl_ddr_board_options()
33 * - number of chips on bus in fsl_ddr_board_options()
34 * - position of slot in fsl_ddr_board_options()
35 * - DDR1 vs. DDR2? in fsl_ddr_board_options()
36 * - ??? in fsl_ddr_board_options()
38 * This needs to be determined on a board-by-board basis. in fsl_ddr_board_options()
42 popts->clk_adjust = 7; in fsl_ddr_board_options()
46 * - frequency in fsl_ddr_board_options()
47 * - ddr1 vs. ddr2 in fsl_ddr_board_options()
49 popts->cpo_override = 9; in fsl_ddr_board_options()
52 * Factors to consider for write data delay: in fsl_ddr_board_options()
53 * - number of DIMMs in fsl_ddr_board_options()
55 * 1 = 1/4 clock delay in fsl_ddr_board_options()
56 * 2 = 1/2 clock delay in fsl_ddr_board_options()
57 * 3 = 3/4 clock delay in fsl_ddr_board_options()
58 * 4 = 1 clock delay in fsl_ddr_board_options()
59 * 5 = 5/4 clock delay in fsl_ddr_board_options()
60 * 6 = 3/2 clock delay in fsl_ddr_board_options()
62 popts->write_data_delay = 3; in fsl_ddr_board_options()
65 * Factors to consider for half-strength driver enable: in fsl_ddr_board_options()
66 * - number of DIMMs installed in fsl_ddr_board_options()
68 popts->half_strength_driver_enable = 0; in fsl_ddr_board_options()