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/OK3568_Linux_fs/kernel/drivers/gpu/drm/sun4i/
H A Dsun4i_hdmi_tmds_clk.c69 struct sun4i_tmds *tmds = hw_to_tmds(hw); in sun4i_tmds_determine_rate() local
88 for (j = tmds->div_offset ?: 1; in sun4i_tmds_determine_rate()
89 j < (16 + tmds->div_offset); j++) { in sun4i_tmds_determine_rate()
128 struct sun4i_tmds *tmds = hw_to_tmds(hw); in sun4i_tmds_recalc_rate() local
131 reg = readl(tmds->hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG); in sun4i_tmds_recalc_rate()
135 reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_CTRL_REG); in sun4i_tmds_recalc_rate()
136 reg = ((reg >> 4) & 0xf) + tmds->div_offset; in sun4i_tmds_recalc_rate()
146 struct sun4i_tmds *tmds = hw_to_tmds(hw); in sun4i_tmds_set_rate() local
151 sun4i_tmds_calc_divider(rate, parent_rate, tmds->div_offset, in sun4i_tmds_set_rate()
154 reg = readl(tmds->hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG); in sun4i_tmds_set_rate()
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/
H A Ddrm_scdc_helper.c157 * Writes the TMDS config register over SCDC channel, and:
171 DRM_DEBUG_KMS("Failed to read TMDS config: %d\n", ret); in drm_scdc_set_scrambling()
191 * drm_scdc_set_high_tmds_clock_ratio - set TMDS clock ratio
196 * TMDS clock ratio calculations go like this:
197 * TMDS character = 10 bit TMDS encoded value
199 * TMDS character rate = The rate at which TMDS characters are
202 * TMDS bit rate = 10x TMDS character rate
205 * TMDS clock rate for pixel clock < 340 MHz = 1x the character
208 * TMDS clock rate for pixel clock > 340 MHz = 0.25x the character
211 * Writes to the TMDS config register over SCDC channel, and:
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H A Ddrm_dp_dual_mode_helper.c261 * drm_dp_dual_mode_max_tmds_clock - Max TMDS clock for DP dual mode adaptor
265 * Determine the max TMDS clock the adaptor supports based on the
273 * Maximum supported TMDS clock rate for the DP dual mode adaptor in kHz.
295 DRM_DEBUG_KMS("Failed to query max TMDS clock\n"); in drm_dp_dual_mode_max_tmds_clock()
304 …* drm_dp_dual_mode_get_tmds_output - Get the state of the TMDS output buffers in the DP dual mode …
307 * @enabled: current state of the TMDS output buffers
309 * Get the state of the TMDS output buffers in the adaptor. For
334 DRM_DEBUG_KMS("Failed to query state of TMDS output buffers\n"); in drm_dp_dual_mode_get_tmds_output()
345 * drm_dp_dual_mode_set_tmds_output - Enable/disable TMDS output buffers in the DP dual mode adaptor
348 * @enable: enable (as opposed to disable) the TMDS output buffers
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/OK3568_Linux_fs/u-boot/drivers/video/
H A Ddw_hdmi.c15 u32 tmds; member
22 .tmds = 25175000, .n = 6144, .cts = 25175,
24 .tmds = 25200000, .n = 6144, .cts = 25200,
26 .tmds = 27000000, .n = 6144, .cts = 27000,
28 .tmds = 27027000, .n = 6144, .cts = 27027,
30 .tmds = 40000000, .n = 6144, .cts = 40000,
32 .tmds = 54000000, .n = 6144, .cts = 54000,
34 .tmds = 54054000, .n = 6144, .cts = 54054,
36 .tmds = 65000000, .n = 6144, .cts = 65000,
38 .tmds = 74176000, .n = 11648, .cts = 140625,
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/OK3568_Linux_fs/buildroot/board/hardkernel/odroidxu4/
H A Dboot.ini14 # TMDS data amplitude control.
17 # TMDS data amplitude fine control for each channel.
22 # TMDS data pre-emphasis level control.
25 # TMDS clock amplitude control.
28 # TMDS data source termination resistor control.
/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Dradeon_combios.c97 COMBIOS_TMDS_POWER_ON_TABLE, /* offset from tmds power */
98 COMBIOS_TMDS_POWER_OFF_TABLE, /* offset from tmds power */
342 case COMBIOS_TMDS_POWER_ON_TABLE: /* offset from tmds power */ in combios_get_table_offset()
351 case COMBIOS_TMDS_POWER_OFF_TABLE: /* offset from tmds power */ in combios_get_table_offset()
1319 struct radeon_encoder_int_tmds *tmds) in radeon_legacy_get_tmds_info_from_table() argument
1326 tmds->tmds_pll[i].value = in radeon_legacy_get_tmds_info_from_table()
1328 tmds->tmds_pll[i].freq = default_tmds_pll[rdev->family][i].freq; in radeon_legacy_get_tmds_info_from_table()
1335 struct radeon_encoder_int_tmds *tmds) in radeon_legacy_get_tmds_info_from_combios() argument
1353 tmds->tmds_pll[i].value = in radeon_legacy_get_tmds_info_from_combios()
1355 tmds->tmds_pll[i].freq = in radeon_legacy_get_tmds_info_from_combios()
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H A Dradeon_legacy_encoders.c803 struct radeon_encoder_int_tmds *tmds = (struct radeon_encoder_int_tmds *)radeon_encoder->enc_priv; in radeon_legacy_tmds_int_mode_set() local
806 if (tmds->tmds_pll[i].freq == 0) in radeon_legacy_tmds_int_mode_set()
808 if ((uint32_t)(mode->clock / 10) < tmds->tmds_pll[i].freq) { in radeon_legacy_tmds_int_mode_set()
809 tmp = tmds->tmds_pll[i].value ; in radeon_legacy_tmds_int_mode_set()
1702 struct radeon_encoder_int_tmds *tmds = NULL; in radeon_legacy_get_tmds_info() local
1705 tmds = kzalloc(sizeof(struct radeon_encoder_int_tmds), GFP_KERNEL); in radeon_legacy_get_tmds_info()
1707 if (!tmds) in radeon_legacy_get_tmds_info()
1711 ret = radeon_atombios_get_tmds_info(encoder, tmds); in radeon_legacy_get_tmds_info()
1713 ret = radeon_legacy_get_tmds_info_from_combios(encoder, tmds); in radeon_legacy_get_tmds_info()
1716 radeon_legacy_get_tmds_info_from_table(encoder, tmds); in radeon_legacy_get_tmds_info()
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H A Dradeon_mode.h255 /* legacy TMDS PLL detect */
414 /* legacy int tmds */
419 /* tmds over dvo */
897 struct radeon_encoder_int_tmds *tmds);
899 struct radeon_encoder_int_tmds *tmds);
901 struct radeon_encoder_int_tmds *tmds);
903 struct radeon_encoder_ext_tmds *tmds);
905 struct radeon_encoder_ext_tmds *tmds);
/OK3568_Linux_fs/u-boot/drivers/video/drm/
H A Ddw_hdmi.c41 { .tmds = 25175000, .n_32k = 4096, .n_44k1 = 12854, .n_48k = 6144, },
42 { .tmds = 25200000, .n_32k = 4096, .n_44k1 = 5656, .n_48k = 6144, },
43 { .tmds = 27000000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
44 { .tmds = 28320000, .n_32k = 4096, .n_44k1 = 5586, .n_48k = 6144, },
45 { .tmds = 30240000, .n_32k = 4096, .n_44k1 = 5642, .n_48k = 6144, },
46 { .tmds = 31500000, .n_32k = 4096, .n_44k1 = 5600, .n_48k = 6144, },
47 { .tmds = 32000000, .n_32k = 4096, .n_44k1 = 5733, .n_48k = 6144, },
48 { .tmds = 33750000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, },
49 { .tmds = 36000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, },
50 { .tmds = 40000000, .n_32k = 4096, .n_44k1 = 5733, .n_48k = 6144, },
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/sti/
H A Dsti_hdmi.h53 * @clk_tmds: hdmi tmds clock
105 * A pointer to an array of these structures is passed to a TMDS (HDMI) output
108 * specific configuration for a given TMDS clock frequency range.
110 * @min_tmds_freq: Lower bound of TMDS clock frequency this entry applies to
111 * @max_tmds_freq: Upper bound of TMDS clock frequency this entry applies to
H A Dsti_hdmi_tx3g4c28phy.c96 DRM_ERROR("input TMDS clock speed (%d) not supported\n", in sti_hdmi_tx3g4c28phy_start()
106 DRM_ERROR("output TMDS clock (%d) out of range\n", tmdsck); in sti_hdmi_tx3g4c28phy_start()
143 * for different high speed TMDS clock frequencies a phy configuration in sti_hdmi_tx3g4c28phy_start()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dsorgf119.c126 if (sor->asy.proto == TMDS) { in gf119_sor_clock()
127 const u32 speed = sor->tmds.high_speed ? 0x14 : 0x0a; in gf119_sor_clock()
129 if (sor->tmds.high_speed) in gf119_sor_clock()
145 case 1: state->proto = TMDS; state->link = 1; break; in gf119_sor_state()
146 case 2: state->proto = TMDS; state->link = 2; break; in gf119_sor_state()
147 case 5: state->proto = TMDS; state->link = 3; break; in gf119_sor_state()
H A Dsornv50.c76 case 1: state->proto = TMDS; state->link = 1; break; in nv50_sor_state()
77 case 2: state->proto = TMDS; state->link = 2; break; in nv50_sor_state()
78 case 5: state->proto = TMDS; state->link = 3; break; in nv50_sor_state()
H A Dsorgv100.c67 case 1: state->proto = TMDS; state->link = 1; break; in gv100_sor_state()
68 case 2: state->proto = TMDS; state->link = 2; break; in gv100_sor_state()
69 case 5: state->proto = TMDS; state->link = 3; break; in gv100_sor_state()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi-qp.c81 { .tmds = 25175000, .n_32k = 4096, .n_44k1 = 12854, .n_48k = 6144, },
82 { .tmds = 25200000, .n_32k = 4096, .n_44k1 = 5656, .n_48k = 6144, },
83 { .tmds = 27000000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
84 { .tmds = 28320000, .n_32k = 4096, .n_44k1 = 5586, .n_48k = 6144, },
85 { .tmds = 30240000, .n_32k = 4096, .n_44k1 = 5642, .n_48k = 6144, },
86 { .tmds = 31500000, .n_32k = 4096, .n_44k1 = 5600, .n_48k = 6144, },
87 { .tmds = 32000000, .n_32k = 4096, .n_44k1 = 5733, .n_48k = 6144, },
88 { .tmds = 33750000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, },
89 { .tmds = 36000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, },
90 { .tmds = 40000000, .n_32k = 4096, .n_44k1 = 5733, .n_48k = 6144, },
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H A Ddw-hdmi.c84 { .tmds = 25175000, .n_32k = 4096, .n_44k1 = 12854, .n_48k = 6144, },
85 { .tmds = 25200000, .n_32k = 4096, .n_44k1 = 5656, .n_48k = 6144, },
86 { .tmds = 27000000, .n_32k = 4096, .n_44k1 = 5488, .n_48k = 6144, },
87 { .tmds = 28320000, .n_32k = 4096, .n_44k1 = 5586, .n_48k = 6144, },
88 { .tmds = 30240000, .n_32k = 4096, .n_44k1 = 5642, .n_48k = 6144, },
89 { .tmds = 31500000, .n_32k = 4096, .n_44k1 = 5600, .n_48k = 6144, },
90 { .tmds = 32000000, .n_32k = 4096, .n_44k1 = 5733, .n_48k = 6144, },
91 { .tmds = 33750000, .n_32k = 4096, .n_44k1 = 6272, .n_48k = 6144, },
92 { .tmds = 36000000, .n_32k = 4096, .n_44k1 = 5684, .n_48k = 6144, },
93 { .tmds = 40000000, .n_32k = 4096, .n_44k1 = 5733, .n_48k = 6144, },
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/
H A Damlogic,meson-dw-hdmi.yaml20 - A custom HDMI PHY in order to convert video to TMDS signal
25 | Synopsys HDMI | HDMI PHY |=> TMDS
94 A port node pointing to the TMDS Output port node.
144 /* TMDS Output */
H A Dallwinner,sun8i-a83t-dw-hdmi.yaml53 - description: TMDS Clock
64 - const: tmds
187 clock-names = "iahb", "isfr", "tmds";
245 clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
/OK3568_Linux_fs/kernel/include/media/i2c/
H A Dtc358743.h80 /* Reset PHY automatically when TMDS clock goes from DC to AC.
86 /* Reset PHY automatically when TMDS clock passes 21 MHz.
92 /* Reset PHY automatically when TMDS clock is detected.
/OK3568_Linux_fs/kernel/include/media/
H A Dtc35874x.h95 /* Reset PHY automatically when TMDS clock goes from DC to AC.
101 /* Reset PHY automatically when TMDS clock passes 21 MHz.
107 /* Reset PHY automatically when TMDS clock is detected.
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i2c/
H A DKconfig16 tristate "Silicon Image sil164 TMDS transmitter"
20 when used in pairs) TMDS transmitters, used in some nVidia
/OK3568_Linux_fs/kernel/drivers/video/fbdev/via/
H A Dchip.h64 /* Definition TMDS Trasmitter Information */
67 /* Definition TMDS Trasmitter Index */
72 /* Definition TMDS Trasmitter I2C Slave Address */
H A Ddvi.c81 DEBUG_MSG(KERN_INFO "\n VT1632 TMDS ! \n"); in viafb_tmds_trasmitter_identify()
91 DEBUG_MSG(KERN_INFO "\n VT1632 TMDS ! \n"); in viafb_tmds_trasmitter_identify()
107 DEBUG_MSG(KERN_INFO "\n Integrated TMDS ! \n"); in viafb_tmds_trasmitter_identify()
317 /* Turn off TMDS power. */ in viafb_dvi_disable()
455 /* Turn on TMDS power. */ in viafb_dvi_enable()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/
H A Dnouveau_bios.c143 * conf byte. These tables are similar to the TMDS tables, consisting in run_lvds_table()
629 * This runs the TMDS regs setting code found on BIT bios cards in run_tmds_table()
642 /* pre-nv17 off-chip tmds uses scripts, post nv17 doesn't */ in run_tmds_table()
649 clktable = bios->tmds.output0_script_ptr; in run_tmds_table()
653 clktable = bios->tmds.output1_script_ptr; in run_tmds_table()
665 NV_ERROR(drm, "TMDS output init script not found\n"); in run_tmds_table()
904 * Parses the pointer to the TMDS table in parse_bit_tmds_tbl_entry()
908 * offset + 0 (16 bits): TMDS table pointer in parse_bit_tmds_tbl_entry()
910 * The TMDS table is typically found just before the DCB table, with a in parse_bit_tmds_tbl_entry()
930 NV_ERROR(drm, "Do not understand BIT TMDS table\n"); in parse_bit_tmds_tbl_entry()
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/tegra/
H A Dhdmi.c44 const struct tmds_config *tmds; member
812 const struct tmds_config *tmds) in tegra_hdmi_setup_tmds() argument
816 tegra_hdmi_writel(hdmi, tmds->pll0, HDMI_NV_PDISP_SOR_PLL0); in tegra_hdmi_setup_tmds()
817 tegra_hdmi_writel(hdmi, tmds->pll1, HDMI_NV_PDISP_SOR_PLL1); in tegra_hdmi_setup_tmds()
818 tegra_hdmi_writel(hdmi, tmds->pe_current, HDMI_NV_PDISP_PE_CURRENT); in tegra_hdmi_setup_tmds()
820 tegra_hdmi_writel(hdmi, tmds->drive_current, in tegra_hdmi_setup_tmds()
828 tegra_hdmi_writel(hdmi, tmds->peak_current, in tegra_hdmi_setup_tmds()
1291 /* TMDS CONFIG */ in tegra_hdmi_encoder_enable()
1293 if (hdmi->pixel_clock <= hdmi->config->tmds[i].pclk) { in tegra_hdmi_encoder_enable()
1294 tegra_hdmi_setup_tmds(hdmi, &hdmi->config->tmds[i]); in tegra_hdmi_encoder_enable()
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