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/OK3568_Linux_fs/kernel/drivers/soc/qcom/
H A Dqcom_gsbi.c17 #define GSBI_CTRL_REG 0x0000
21 #define TCSR_ADM_CRCI_BASE 0x70
30 0x000003, 0x00000c, 0x000030, 0x0000c0,
31 0x000300, 0x000c00, 0x003000, 0x00c000,
32 0x030000, 0x0c0000, 0x300000, 0xc00000
35 0x000003, 0x00000c, 0x000030, 0x0000c0,
36 0x000300, 0x000c00, 0x003000, 0x00c000,
37 0x030000, 0x0c0000, 0x300000, 0xc00000
48 0x001800, 0x006000, 0x000030, 0x0000c0,
49 0x000300, 0x000400, 0x000000, 0x000000,
[all …]
/OK3568_Linux_fs/u-boot/include/configs/
H A Ds5pc210_universal.h22 #define CONFIG_SYS_SDRAM_BASE 0x40000000
33 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
40 #define CONFIG_SYS_MONITOR_BASE 0x00000000
44 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
45 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
60 ",-(UBI)\0"
68 ",-(UMS)\0"
89 "onenand erase 0x0 0x100000;" \
90 "onenand write 0x42008000 0x0 0x100000\0" \
92 "onenand erase 0xc00000 0x500000;" \
[all …]
H A Ds5p_goni.h29 #define CONFIG_SYS_SDRAM_BASE 0x30000000
32 #define CONFIG_SYS_TEXT_BASE 0x34800000
63 #define CONFIG_G_DNL_THOR_VENDOR_NUM 0x04E8
64 #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
65 #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525
66 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5
77 ",60m(qboot)\0"
89 "u-boot raw 0x80 0x400;" \
90 "uImage ext4 0 2;" \
91 "exynos3-goni.dtb ext4 0 2;" \
[all …]
H A Dmk808_rk3066.h13 "mtdparts=rockchip-nand.0:" \
30 "idb raw 0x0 0x400000;" \
31 "idb.backup raw 0x400000 0x400000;" \
32 "spl raw 0x800000 0x400000;" \
33 "spl.backup1 raw 0xC00000 0x400000;" \
34 "spl.backup2 raw 0x1000000 0x400000;" \
35 "spl.backup3 raw 0x1400000 0x400000;" \
36 "spl.backup4 raw 0x1800000 0x400000;" \
37 "u-boot raw 0x1C00000 0x400000;" \
38 "u-boot.backup raw 0x2000000 0x400000;" \
[all …]
H A Dsandbox.h14 #define CONFIG_TRACE_EARLY_ADDR 0x00100000
35 #define CONFIG_MALLOC_F_ADDR 0x0010000
53 #define CONFIG_SYS_LOAD_ADDR 0x00000000
54 #define CONFIG_SYS_MEMTEST_START 0x00100000
55 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1000)
56 #define CONFIG_SYS_FDT_LOAD_ADDR 0x100
61 #define CONFIG_SYS_SDRAM_BASE 0
63 #define CONFIG_SYS_TEXT_BASE 0
64 #define CONFIG_SYS_MONITOR_BASE 0
75 func(HOST, host, 0)
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/
H A DkuroboxHG.dts37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x8000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
H A DkuroboxHD.dts37 #size-cells = <0>;
41 reg = <0x0>;
44 bus-frequency = <0>; /* Fixed by bootloader */
46 i-cache-size = <0x4000>;
47 d-cache-size = <0x4000>;
53 reg = <0x0 0x4000000>;
61 store-gathering = <0>; /* 0 == off, !0 == on */
62 reg = <0x80000000 0x100000>;
63 ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
64 0xfc000000 0xfc000000 0x100000 /* EUMB */
[all …]
/OK3568_Linux_fs/kernel/arch/mips/txx9/rbtx4939/
H A Dsetup.c40 tx4939_time_init(0); in rbtx4939_time_init()
46 ((((unsigned long)(addr) - IO_BASE) & 0xfff00000) == TXX9_CE(1))
73 c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000); in rbtx4939_pci_setup()
75 tx4927_pcic_setup(tx4939_pcic1ptr, c, 0); in rbtx4939_pci_setup()
83 0x01c0000000007608ULL, /* 64M ROM */
84 0x017f000000007049ULL, /* 1M IOC */
85 0x0180000000408608ULL, /* ISA */
86 0,
95 sp = TX4939_EBUSC_CR(0) & 0x30; in rbtx4939_ebusc_setup()
96 default_ebccr[0] |= sp; in rbtx4939_ebusc_setup()
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_phyreg.h11 #define RF_DATA 0x1d4
13 #define rPMAC_Reset 0x100
14 #define rPMAC_TxStart 0x104
15 #define rPMAC_TxLegacySIG 0x108
16 #define rPMAC_TxHTSIG1 0x10c
17 #define rPMAC_TxHTSIG2 0x110
18 #define rPMAC_PHYDebug 0x114
19 #define rPMAC_TxPacketNum 0x118
20 #define rPMAC_TxIdle 0x11c
21 #define rPMAC_TxMACHeader0 0x120
[all …]
/OK3568_Linux_fs/u-boot/configs/
H A Devb-rk3308_defconfig5 CONFIG_SYS_MALLOC_F_LEN=0x4000
8 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
17 CONFIG_SPL_STACK_R_ADDR=0xc00000
25 CONFIG_BOOTDELAY=0
31 CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
60 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks as…
86 CONFIG_DEBUG_UART_BASE=0xFF0C0000
98 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
99 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
H A Drk3308_defconfig5 CONFIG_SYS_MALLOC_F_LEN=0x4000
8 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
16 CONFIG_SPL_STACK_R_ADDR=0xc00000
25 CONFIG_BOOTDELAY=0
33 CONFIG_SPL_RELOC_TEXT_BASE=0x3001000
61 CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks as…
105 CONFIG_DEBUG_UART_BASE=0xFF0C0000
115 CONFIG_USB_GADGET_VENDOR_NUM=0x2207
116 CONFIG_USB_GADGET_PRODUCT_NUM=0x330d
/OK3568_Linux_fs/kernel/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189es/include/
H A DHal8188EPhyReg.h24 // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
26 // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
27 // 3. RF register 0x00-2E
35 // 1. Page1(0x100)
37 #define rPMAC_Reset 0x100
38 #define rPMAC_TxStart 0x104
39 #define rPMAC_TxLegacySIG 0x108
40 #define rPMAC_TxHTSIG1 0x10c
41 #define rPMAC_TxHTSIG2 0x110
42 #define rPMAC_PHYDebug 0x114
[all …]
H A DHal8188FPhyReg.h30 // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
32 // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
33 // 3. RF register 0x00-2E
41 // 1. Page1(0x100)
43 #define rPMAC_Reset 0x100
44 #define rPMAC_TxStart 0x104
45 #define rPMAC_TxLegacySIG 0x108
46 #define rPMAC_TxHTSIG1 0x10c
47 #define rPMAC_TxHTSIG2 0x110
48 #define rPMAC_PHYDebug 0x114
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/include/
H A DHal8188EPhyReg.h24 // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
26 // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
27 // 3. RF register 0x00-2E
35 // 1. Page1(0x100)
37 #define rPMAC_Reset 0x100
38 #define rPMAC_TxStart 0x104
39 #define rPMAC_TxLegacySIG 0x108
40 #define rPMAC_TxHTSIG1 0x10c
41 #define rPMAC_TxHTSIG2 0x110
42 #define rPMAC_PHYDebug 0x114
[all …]
H A DHal8188FPhyReg.h30 // BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
32 // 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
33 // 3. RF register 0x00-2E
41 // 1. Page1(0x100)
43 #define rPMAC_Reset 0x100
44 #define rPMAC_TxStart 0x104
45 #define rPMAC_TxLegacySIG 0x108
46 #define rPMAC_TxHTSIG1 0x10c
47 #define rPMAC_TxHTSIG2 0x110
48 #define rPMAC_PHYDebug 0x114
[all …]
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/bits/
H A Dfenv.h52 #define FE_TONEAREST 0x000000
53 #define FE_UPWARD 0x400000
54 #define FE_DOWNWARD 0x800000
55 #define FE_TOWARDZERO 0xc00000
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/bits/
H A Dfenv.h53 #define FE_TONEAREST 0
56 #define FE_UPWARD 0x400000
59 #define FE_DOWNWARD 0x800000
62 #define FE_TOWARDZERO 0xc00000
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dbcm47081-tplink-archer-c5-v2.dts18 memory@0 {
20 reg = <0x00000000 0x08000000>;
28 gpios = <&chipcommon 0 GPIO_ACTIVE_HIGH>;
102 boot@0 {
104 reg = <0x000000 0x040000>;
110 reg = <0x040000 0x200000>;
116 reg = <0x240000 0xc00000>;
121 reg = <0xff0000 0x010000>;
H A Darmada-390-db.dts24 reg = <0x00000000 0x80000000>; /* 2 GB */
28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
29 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
38 reg = <0x50>;
62 pcie@1,0 {
67 pcie@2,0 {
72 pcie@3,0 {
81 pinctrl-0 = <&spi1_pins>;
89 reg = <0>; /* Chip select 0 */
97 partition@0 {
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/
H A Darm,komeda.txt12 - #size-cells: Must be 0
43 #size-cells = <0>;
45 reg = <0xc00000 0x20000>;
46 interrupts = <0 168 4>;
49 iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
53 dp0_pipe0: pipeline@0 {
56 reg = <0>;
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/
H A Dfpu_control.h26 #if __GNUC_PREREQ (6,0)
33 __asm__ __volatile__ ("mrs %0, fpcr" : "=r" (fpcr))
36 __asm__ __volatile__ ("msr fpcr, %0" : : "r" (fpcr))
39 __asm__ __volatile__ ("mrs %0, fpsr" : "=r" (fpsr))
42 __asm__ __volatile__ ("msr fpsr, %0" : : "r" (fpsr))
49 #define _FPU_RESERVED 0xfe0fe0ff
50 #define _FPU_FPSR_RESERVED 0x0fffffe0
52 #define _FPU_DEFAULT 0x00000000
53 #define _FPU_FPSR_DEFAULT 0x00000000
58 0 0 0 0 1 1 1 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189fs/include/
H A DHal8192FPhyReg.h19 #define rSYM_WLBT_PAPE_SEL 0x64
21 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
23 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
24 * 3. RF register 0x00-2E
32 * 1. Page1(0x100)
34 #define rPMAC_Reset 0x100
35 #define rPMAC_TxStart 0x104
36 #define rPMAC_TxLegacySIG 0x108
37 #define rPMAC_TxHTSIG1 0x10c
38 #define rPMAC_TxHTSIG2 0x110
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8188fu/include/
H A DHal8710BPhyReg.h18 #define rSYM_WLBT_PAPE_SEL 0x64
20 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
22 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
23 * 3. RF register 0x00-2E
31 * 1. Page1(0x100)
33 #define rPMAC_Reset 0x100
34 #define rPMAC_TxStart 0x104
35 #define rPMAC_TxLegacySIG 0x108
36 #define rPMAC_TxHTSIG1 0x10c
37 #define rPMAC_TxHTSIG2 0x110
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8821cs/include/
H A DHal8192FPhyReg.h18 #define rSYM_WLBT_PAPE_SEL 0x64
20 * BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF
22 * 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00
23 * 3. RF register 0x00-2E
31 * 1. Page1(0x100)
33 #define rPMAC_Reset 0x100
34 #define rPMAC_TxStart 0x104
35 #define rPMAC_TxLegacySIG 0x108
36 #define rPMAC_TxHTSIG1 0x10c
37 #define rPMAC_TxHTSIG2 0x110
[all …]

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