1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2011 The Chromium OS Authors. 3*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef __CONFIG_H 7*4882a593Smuzhiyun #define __CONFIG_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #ifdef FTRACE 10*4882a593Smuzhiyun #define CONFIG_TRACE 11*4882a593Smuzhiyun #define CONFIG_TRACE_BUFFER_SIZE (16 << 20) 12*4882a593Smuzhiyun #define CONFIG_TRACE_EARLY_SIZE (8 << 20) 13*4882a593Smuzhiyun #define CONFIG_TRACE_EARLY 14*4882a593Smuzhiyun #define CONFIG_TRACE_EARLY_ADDR 0x00100000 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #endif 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD 19*4882a593Smuzhiyun #define CONFIG_IO_TRACE 20*4882a593Smuzhiyun #endif 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #ifndef CONFIG_TIMER 23*4882a593Smuzhiyun #define CONFIG_SYS_TIMER_RATE 1000000 24*4882a593Smuzhiyun #endif 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun #define CONFIG_LMB 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define CONFIG_FS_EXT4 29*4882a593Smuzhiyun #define CONFIG_EXT4_WRITE 30*4882a593Smuzhiyun #define CONFIG_HOST_MAX_DEVICES 4 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* 33*4882a593Smuzhiyun * Size of malloc() pool, before and after relocation 34*4882a593Smuzhiyun */ 35*4882a593Smuzhiyun #define CONFIG_MALLOC_F_ADDR 0x0010000 36*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */ 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP /* #undef to save memory */ 39*4882a593Smuzhiyun #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 40*4882a593Smuzhiyun #define CONFIG_DISPLAY_BOARDINFO_LATE 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* turn on command-line edit/c/auto */ 43*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 44*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun #define CONFIG_ENV_SIZE 8192 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* SPI - enable all SPI flash types for testing purposes */ 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun #define CONFIG_I2C_EDID 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun /* Memory things - we don't really want a memory test */ 53*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR 0x00000000 54*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START 0x00100000 55*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1000) 56*4882a593Smuzhiyun #define CONFIG_SYS_FDT_LOAD_ADDR 0x100 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #define CONFIG_PHYSMEM 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun /* Size of our emulated memory */ 61*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE 0 62*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_SIZE (128 << 20) 63*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0 64*4882a593Smuzhiyun #define CONFIG_SYS_MONITOR_BASE 0 65*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 1 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 68*4882a593Smuzhiyun 115200} 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun /* include default commands */ 71*4882a593Smuzhiyun #include <config_distro_defaults.h> 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun #define BOOT_TARGET_DEVICES(func) \ 74*4882a593Smuzhiyun func(HOST, host, 1) \ 75*4882a593Smuzhiyun func(HOST, host, 0) 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND "" 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun #include <config_distro_bootcmd.h> 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #define CONFIG_KEEP_SERVERADDR 82*4882a593Smuzhiyun #define CONFIG_UDP_CHECKSUM 83*4882a593Smuzhiyun #define CONFIG_TIMESTAMP 84*4882a593Smuzhiyun #define CONFIG_BOOTP_DNS 85*4882a593Smuzhiyun #define CONFIG_BOOTP_DNS2 86*4882a593Smuzhiyun #define CONFIG_BOOTP_SEND_HOSTNAME 87*4882a593Smuzhiyun #define CONFIG_BOOTP_SERVERIP 88*4882a593Smuzhiyun #define CONFIG_IP_DEFRAG 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun #ifndef SANDBOX_NO_SDL 91*4882a593Smuzhiyun #define CONFIG_SANDBOX_SDL 92*4882a593Smuzhiyun #endif 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun /* LCD and keyboard require SDL support */ 95*4882a593Smuzhiyun #ifdef CONFIG_SANDBOX_SDL 96*4882a593Smuzhiyun #define LCD_BPP LCD_COLOR16 97*4882a593Smuzhiyun #define CONFIG_LCD_BMP_RLE8 98*4882a593Smuzhiyun #define CONFIG_VIDEO_BMP_RLE8 99*4882a593Smuzhiyun #define CONFIG_SPLASH_SCREEN_ALIGN 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun #define CONFIG_KEYBOARD 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \ 104*4882a593Smuzhiyun "stdout=serial,vidconsole\0" \ 105*4882a593Smuzhiyun "stderr=serial,vidconsole\0" 106*4882a593Smuzhiyun #else 107*4882a593Smuzhiyun #define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \ 108*4882a593Smuzhiyun "stdout=serial,vidconsole\0" \ 109*4882a593Smuzhiyun "stderr=serial,vidconsole\0" 110*4882a593Smuzhiyun #endif 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun #define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \ 113*4882a593Smuzhiyun "eth1addr=00:00:11:22:33:45\0" \ 114*4882a593Smuzhiyun "eth3addr=00:00:11:22:33:46\0" \ 115*4882a593Smuzhiyun "eth5addr=00:00:11:22:33:47\0" \ 116*4882a593Smuzhiyun "ipaddr=1.2.3.4\0" 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun #define MEM_LAYOUT_ENV_SETTINGS \ 119*4882a593Smuzhiyun "bootm_size=0x10000000\0" \ 120*4882a593Smuzhiyun "kernel_addr_r=0x1000000\0" \ 121*4882a593Smuzhiyun "fdt_addr_r=0xc00000\0" \ 122*4882a593Smuzhiyun "ramdisk_addr_r=0x2000000\0" \ 123*4882a593Smuzhiyun "scriptaddr=0x1000\0" \ 124*4882a593Smuzhiyun "pxefile_addr_r=0x2000\0" 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun #define CONFIG_EXTRA_ENV_SETTINGS \ 127*4882a593Smuzhiyun SANDBOX_SERIAL_SETTINGS \ 128*4882a593Smuzhiyun SANDBOX_ETH_SETTINGS \ 129*4882a593Smuzhiyun BOOTENV \ 130*4882a593Smuzhiyun MEM_LAYOUT_ENV_SETTINGS 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun #define CONFIG_GZIP_COMPRESSED 133*4882a593Smuzhiyun #define CONFIG_BZIP2 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun #ifndef CONFIG_SPL_BUILD 136*4882a593Smuzhiyun #define CONFIG_SYS_IDE_MAXBUS 1 137*4882a593Smuzhiyun #define CONFIG_SYS_ATA_IDE0_OFFSET 0 138*4882a593Smuzhiyun #define CONFIG_SYS_IDE_MAXDEVICE 2 139*4882a593Smuzhiyun #define CONFIG_SYS_ATA_BASE_ADDR 0x100 140*4882a593Smuzhiyun #define CONFIG_SYS_ATA_DATA_OFFSET 0 141*4882a593Smuzhiyun #define CONFIG_SYS_ATA_REG_OFFSET 1 142*4882a593Smuzhiyun #define CONFIG_SYS_ATA_ALT_OFFSET 2 143*4882a593Smuzhiyun #define CONFIG_SYS_ATA_STRIDE 4 144*4882a593Smuzhiyun #endif 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun #define CONFIG_SCSI_AHCI_PLAT 147*4882a593Smuzhiyun #define CONFIG_SYS_SCSI_MAX_DEVICE 2 148*4882a593Smuzhiyun #define CONFIG_SYS_SCSI_MAX_SCSI_ID 8 149*4882a593Smuzhiyun #define CONFIG_SYS_SCSI_MAX_LUN 4 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun #define CONFIG_SYS_SATA_MAX_DEVICE 2 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun #define CONFIG_SYSTEMACE 154*4882a593Smuzhiyun #define CONFIG_SYS_SYSTEMACE_WIDTH 16 155*4882a593Smuzhiyun #define CONFIG_SYS_SYSTEMACE_BASE 0 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun #define CONFIG_MISC_INIT_F 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun #endif 160