| /OK3568_Linux_fs/kernel/drivers/pci/controller/dwc/ |
| H A D | pcie-dw-dmatest.c | 22 static int test_size = 0x20; 32 …E_PARM_DESC(chn_en, "Each bits for one dma channel, up to 2 channels, (default enable channel 0)"); 38 static unsigned int bus_addr = 0x3c000000; 40 …RM_DESC(bus_addr, "Dmatest chn0 bus_addr(remote), chn1 add offset 0x100000, (default 0x3c000000)"); 42 static unsigned int local_addr = 0x3c000000; 44 …DESC(local_addr, "Dmatest chn0 local_addr(local), chn1 add offset 0x100000, (default 0x3c000000)"); 48 MODULE_PARM_DESC(test_dev, "Choose dma_obj device,(default 0)"); 76 for (i = 0; i < PCIE_DW_MISC_DMATEST_DEV_MAX; i++) { in pcie_dw_dmatest_show() 126 if (ret < 0) in rk_pcie_ep_dma_frombus() 128 else if (ret == 0) in rk_pcie_ep_dma_frombus() [all …]
|
| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | rk3399-sdram-ddr3-4G-1600.dtsi | 9 0x2 10 0xa 11 0x3 12 0x2 13 0x1 14 0x0 15 0xf 16 0xf 17 0 18 0 [all …]
|
| H A D | rk3399-sdram-ddr3-1866.dtsi | 9 0x1 10 0xa 11 0x3 12 0x2 13 0x1 14 0x0 15 0xf 16 0xf 17 0 18 0 [all …]
|
| H A D | rk3399-sdram-ddr3-1600.dtsi | 9 0x1 10 0xa 11 0x3 12 0x2 13 0x1 14 0x0 15 0xf 16 0xf 17 0 18 0 [all …]
|
| H A D | rk3399-sdram-ddr3-1333.dtsi | 9 0x1 10 0xa 11 0x3 12 0x2 13 0x1 14 0x0 15 0xf 16 0xf 17 0 18 0 [all …]
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/top/ |
| H A D | gk104.c | 35 for (i = 0; i < 64; i++) { in gk104_top_oneinit() 39 type = ~0; in gk104_top_oneinit() 40 inst = 0; in gk104_top_oneinit() 43 data = nvkm_rd32(device, 0x022700 + (i * 0x04)); in gk104_top_oneinit() 45 switch (data & 0x00000003) { in gk104_top_oneinit() 46 case 0x00000000: /* NOT_VALID */ in gk104_top_oneinit() 48 case 0x00000001: /* DATA */ in gk104_top_oneinit() 49 inst = (data & 0x3c000000) >> 26; in gk104_top_oneinit() 50 info->addr = (data & 0x00fff000); in gk104_top_oneinit() 51 if (data & 0x00000004) in gk104_top_oneinit() [all …]
|
| /OK3568_Linux_fs/kernel/arch/mips/lantiq/falcon/ |
| H A D | prom.c | 25 #define PART_MASK 0x0FFFF000 27 #define REV_MASK 0xF0000000 29 #define SREV_MASK 0x03C00000 31 #define TYPE_MASK 0x3C000000 34 #define BOOT_REG_BASE (KSEG1 | 0x1F200000) 35 #define BOOT_RVEC (BOOT_REG_BASE | 0x00) 36 #define BOOT_NVEC (BOOT_REG_BASE | 0x04) 37 #define BOOT_EVEC (BOOT_REG_BASE | 0x08) 61 sprintf(i->rev_type, "%c%d%d", (i->srev & 0x4) ? ('B') : ('A'), in ltq_soc_detect() 62 i->rev & 0x7, (i->srev & 0x3) + 1); in ltq_soc_detect() [all …]
|
| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/soc/ti/ |
| H A D | k3-ringacc.yaml | 85 reg = <0x0 0x3c000000 0x0 0x400000>, 86 <0x0 0x38000000 0x0 0x400000>, 87 <0x0 0x31120000 0x0 0x100>, 88 <0x0 0x33000000 0x0 0x40000>; 91 ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
|
| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | bcm958522er.dts | 48 reg = <0x60000000 0x80000000>; 78 nand@0 { 80 reg = <0>; 91 partition@0 { 93 reg = <0x00000000 0x00200000>; 98 reg = <0x00200000 0x00400000>; 102 reg = <0x00600000 0x00a00000>; 106 reg = <0x01000000 0x03000000>; 110 reg = <0x04000000 0x3c000000>; 129 pinctrl-0 = <&nand_sel>; [all …]
|
| H A D | bcm958525er.dts | 48 reg = <0x60000000 0x80000000>; 78 nand@0 { 80 reg = <0>; 91 partition@0 { 93 reg = <0x00000000 0x00200000>; 98 reg = <0x00200000 0x00400000>; 102 reg = <0x00600000 0x00a00000>; 106 reg = <0x01000000 0x03000000>; 110 reg = <0x04000000 0x3c000000>; 129 pinctrl-0 = <&nand_sel>; [all …]
|
| H A D | bcm958525xmc.dts | 48 reg = <0x60000000 0x40000000>; 78 reg = <0x4c>; 83 reg = <0x52>; 89 reg = <0x68>; 94 nand@0 { 96 reg = <0>; 107 partition@0 { 109 reg = <0x00000000 0x00200000>; 114 reg = <0x00200000 0x00400000>; 118 reg = <0x00600000 0x00a00000>; [all …]
|
| H A D | bcm988312hr.dts | 48 reg = <0x60000000 0x80000000>; 78 nand@0 { 80 reg = <0>; 91 partition@0 { 93 reg = <0x00000000 0x00200000>; 98 reg = <0x00200000 0x00400000>; 102 reg = <0x00600000 0x00a00000>; 106 reg = <0x01000000 0x03000000>; 110 reg = <0x04000000 0x3c000000>; 129 pinctrl-0 = <&nand_sel>; [all …]
|
| H A D | bcm958623hr.dts | 48 reg = <0x60000000 0x80000000>; 82 nand@0 { 84 reg = <0>; 95 partition@0 { 97 reg = <0x00000000 0x00200000>; 102 reg = <0x00200000 0x00400000>; 106 reg = <0x00600000 0x00a00000>; 110 reg = <0x01000000 0x03000000>; 114 reg = <0x04000000 0x3c000000>; 133 pinctrl-0 = <&nand_sel>; [all …]
|
| H A D | bcm958622hr.dts | 48 reg = <0x60000000 0x80000000>; 82 nand@0 { 84 reg = <0>; 95 partition@0 { 97 reg = <0x00000000 0x00200000>; 102 reg = <0x00200000 0x00400000>; 106 reg = <0x00600000 0x00a00000>; 110 reg = <0x01000000 0x03000000>; 114 reg = <0x04000000 0x3c000000>; 133 pinctrl-0 = <&nand_sel>; [all …]
|
| H A D | bcm958625hr.dts | 48 reg = <0x60000000 0x20000000>; 93 nand@0 { 95 reg = <0>; 106 partition@0 { 108 reg = <0x00000000 0x00200000>; 113 reg = <0x00200000 0x00400000>; 117 reg = <0x00600000 0x00a00000>; 121 reg = <0x01000000 0x03000000>; 125 reg = <0x04000000 0x3c000000>; 144 pinctrl-0 = <&nand_sel>; [all …]
|
| H A D | bcm958625k.dts | 47 reg = <0x60000000 0x80000000>; 72 nand@0 { 74 reg = <0>; 85 partition@0 { 87 reg = <0x00000000 0x00200000>; 92 reg = <0x00200000 0x00400000>; 96 reg = <0x00600000 0x00a00000>; 100 reg = <0x01000000 0x03000000>; 104 reg = <0x04000000 0x3c000000>; 127 pinctrl-0 = <&nand_sel>, <&gpiobs>, <&pwmc>; [all …]
|
| /OK3568_Linux_fs/u-boot/board/freescale/ls2080ardb/ |
| H A D | README | 57 0x00_0000_0000 .. 0x00_000F_FFFF Boot Rom 58 0x00_0100_0000 .. 0x00_0FFF_FFFF CCSR 59 0x00_1800_0000 .. 0x00_181F_FFFF OCRAM 60 0x00_2000_0000 .. 0x00_2FFF_FFFF QSPI region #1 61 0x00_3000_0000 .. 0x00_3FFF_FFFF IFC region #1 62 0x00_8000_0000 .. 0x00_FFFF_FFFF DDR region #1 63 0x05_1000_0000 .. 0x05_FFFF_FFFF IFC region #2 64 0x80_8000_0000 .. 0xFF_FFFF_FFFF DDR region #2 72 0x30000000 - 0x37ffffff : 128MB : NOR flash 73 0x3C000000 - 0x40000000 : 64MB : CPLD [all …]
|
| /OK3568_Linux_fs/u-boot/include/configs/ |
| H A D | ls2080a_common.h | 21 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) 28 #define CONFIG_SYS_TEXT_BASE 0x80400000 30 #define CONFIG_SYS_TEXT_BASE 0x30100000 33 #define CONFIG_SYS_TEXT_BASE 0x20100000 34 #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ 35 #define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ 36 #define CONFIG_ENV_SECT_SIZE 0x40000 53 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL 54 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 56 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL [all …]
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/sdma0/ |
| H A D | sdma0_4_1_default.h | 26 #define mmSDMA0_UCODE_ADDR_DEFAULT 0x00000000 27 #define mmSDMA0_UCODE_DATA_DEFAULT 0x00000000 28 #define mmSDMA0_VM_CNTL_DEFAULT 0x00000000 29 #define mmSDMA0_VM_CTX_LO_DEFAULT 0x00000000 30 #define mmSDMA0_VM_CTX_HI_DEFAULT 0x00000000 31 #define mmSDMA0_ACTIVE_FCN_ID_DEFAULT 0x00000000 32 #define mmSDMA0_VM_CTX_CNTL_DEFAULT 0x00000000 33 #define mmSDMA0_VIRT_RESET_REQ_DEFAULT 0x00000000 34 #define mmSDMA0_CONTEXT_REG_TYPE0_DEFAULT 0xfffdf79f 35 #define mmSDMA0_CONTEXT_REG_TYPE1_DEFAULT 0x003fbcff [all …]
|
| H A D | sdma0_4_0_default.h | 26 #define mmSDMA0_UCODE_ADDR_DEFAULT 0x00000000 27 #define mmSDMA0_UCODE_DATA_DEFAULT 0x00000000 28 #define mmSDMA0_VM_CNTL_DEFAULT 0x00000000 29 #define mmSDMA0_VM_CTX_LO_DEFAULT 0x00000000 30 #define mmSDMA0_VM_CTX_HI_DEFAULT 0x00000000 31 #define mmSDMA0_ACTIVE_FCN_ID_DEFAULT 0x00000000 32 #define mmSDMA0_VM_CTX_CNTL_DEFAULT 0x00000000 33 #define mmSDMA0_VIRT_RESET_REQ_DEFAULT 0x00000000 34 #define mmSDMA0_VF_ENABLE_DEFAULT 0x00000000 35 #define mmSDMA0_CONTEXT_REG_TYPE0_DEFAULT 0xfffdf79f [all …]
|
| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3399pro-evb-v14-linux.dts | 20 reg = <0x0 0x3c000000 0x0 0x04000000>; 32 pinctrl-0 = <&i2c1_xfer>, <&cam_pwren_high>; 37 reg = <0x30>; 44 rockchip,camera-module-index = <0>; 63 vm149c: vm149c@0c { 66 reg = <0x0c>; 67 rockchip,camera-module-index = <0>; 74 reg = <0x10>; 82 pinctrl-0 = <&cif_clkout>; 83 rockchip,camera-module-index = <0>; [all …]
|
| /OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/sdma1/ |
| H A D | sdma1_4_0_default.h | 26 #define mmSDMA1_UCODE_ADDR_DEFAULT 0x00000000 27 #define mmSDMA1_UCODE_DATA_DEFAULT 0x00000000 28 #define mmSDMA1_VM_CNTL_DEFAULT 0x00000000 29 #define mmSDMA1_VM_CTX_LO_DEFAULT 0x00000000 30 #define mmSDMA1_VM_CTX_HI_DEFAULT 0x00000000 31 #define mmSDMA1_ACTIVE_FCN_ID_DEFAULT 0x00000000 32 #define mmSDMA1_VM_CTX_CNTL_DEFAULT 0x00000000 33 #define mmSDMA1_VIRT_RESET_REQ_DEFAULT 0x00000000 34 #define mmSDMA1_VF_ENABLE_DEFAULT 0x00000000 35 #define mmSDMA1_CONTEXT_REG_TYPE0_DEFAULT 0xfffdf79f [all …]
|
| /OK3568_Linux_fs/kernel/arch/arm/mach-pxa/include/mach/ |
| H A D | hardware.h | 19 #define UNCACHED_PHYS_0 0xfe000000 20 #define UNCACHED_PHYS_0_SIZE 0x00100000 25 * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff 26 * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff 27 * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff 28 * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff 29 * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff 30 * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff 31 * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff 36 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) [all …]
|
| /OK3568_Linux_fs/u-boot/board/freescale/ls2080aqds/ |
| H A D | README | 59 0x00_0000_0000 .. 0x00_000F_FFFF Boot Rom 60 0x00_0100_0000 .. 0x00_0FFF_FFFF CCSR 61 0x00_1800_0000 .. 0x00_181F_FFFF OCRAM 62 0x00_3000_0000 .. 0x00_3FFF_FFFF IFC region #1 63 0x00_8000_0000 .. 0x00_FFFF_FFFF DDR region #1 64 0x05_1000_0000 .. 0x05_FFFF_FFFF IFC region #2 65 0x80_8000_0000 .. 0xFF_FFFF_FFFF DDR region #2 73 0x30000000 - 0x37ffffff : 128MB : NOR flash 74 0x38000000 - 0x3BFFFFFF : 64MB : Promjet 75 0x3C000000 - 0x40000000 : 64MB : FPGA etc [all …]
|
| /OK3568_Linux_fs/u-boot/include/ |
| H A D | mpc83xx.h | 24 #define EXC_OFF_SYS_RESET 0x0100 32 #define CONFIG_DEFAULT_IMMR 0xFF400000 35 #define IMMRBAR 0x0000 36 #define IMMRBAR_BASE_ADDR 0xFFF00000 /* Base addr. mask */ 43 #define LBLAWBAR0 0x0020 44 #define LBLAWAR0 0x0024 45 #define LBLAWBAR1 0x0028 46 #define LBLAWAR1 0x002C 47 #define LBLAWBAR2 0x0030 48 #define LBLAWAR2 0x0034 [all …]
|