1*4882a593SmuzhiyunOverview 2*4882a593Smuzhiyun-------- 3*4882a593SmuzhiyunThe LS2080A Reference Design (RDB) is a high-performance computing, 4*4882a593Smuzhiyunevaluation, and development platform that supports the QorIQ LS2080A, LS2088A 5*4882a593SmuzhiyunLayerscape Architecture processor. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunThe LS2081A Reference Design (RDB) is a high-performance computing, 8*4882a593Smuzhiyunevaluation, and development platform that supports the QorIQ LS2081A 9*4882a593SmuzhiyunLayerscape Architecture processor.More details in below sections 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunLS2080A, LS2088A, LS2081A SoC Overview 12*4882a593Smuzhiyun-------------------------------------- 13*4882a593SmuzhiyunPlease refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A, 14*4882a593SmuzhiyunLS2081A, LS2088A SoC overview. 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun LS2080ARDB board Overview 17*4882a593Smuzhiyun ----------------------- 18*4882a593Smuzhiyun - SERDES Connections, 16 lanes supporting: 19*4882a593Smuzhiyun - PCI Express - 3.0 20*4882a593Smuzhiyun - SATA 3.0 21*4882a593Smuzhiyun - XFI 22*4882a593Smuzhiyun - DDR Controller 23*4882a593Smuzhiyun - Two ports of 72-bits (8-bits ECC) DDR4. Each port supports four 24*4882a593Smuzhiyun chip-selects and two DIMM connectors. Support is up to 2133MT/s. 25*4882a593Smuzhiyun - One port of 40-bits (8-bits ECC) DDR4 which supports four chip-selects 26*4882a593Smuzhiyun and two DIMM connectors. Support is up to 1600MT/s. 27*4882a593Smuzhiyun -IFC/Local Bus 28*4882a593Smuzhiyun - IFC rev. 2.0 implementation supporting Little Endian connection scheme. 29*4882a593Smuzhiyun - 128 MB NOR flash 16-bit data bus 30*4882a593Smuzhiyun - One 2 GB NAND flash with ECC support 31*4882a593Smuzhiyun - CPLD connection 32*4882a593Smuzhiyun - USB 3.0 33*4882a593Smuzhiyun - Two high speed USB 3.0 ports 34*4882a593Smuzhiyun - First USB 3.0 port configured as Host with Type-A connector 35*4882a593Smuzhiyun - Second USB 3.0 port configured as OTG with micro-AB connector 36*4882a593Smuzhiyun - SDHC adapter 37*4882a593Smuzhiyun - SD Card Rev 2.0 and Rev 3.0 38*4882a593Smuzhiyun - DSPI 39*4882a593Smuzhiyun - 128 MB high-speed flash Memory for boot code and storage (up to 108MHz) 40*4882a593Smuzhiyun - 4 I2C controllers 41*4882a593Smuzhiyun - Two SATA onboard connectors 42*4882a593Smuzhiyun - UART 43*4882a593Smuzhiyun - ARM JTAG support 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun LS2081ARDB board Overview 46*4882a593Smuzhiyun ------------------------- 47*4882a593Smuzhiyun LS2081ARDB board is similar to LS2080ARDB board 48*4882a593Smuzhiyun with few differences like 49*4882a593Smuzhiyun - Hosts LS2081A SoC 50*4882a593Smuzhiyun - Default boot source is QSPI-boot 51*4882a593Smuzhiyun - Does not have IFC interface 52*4882a593Smuzhiyun - RTC and QSPI flash devices are different 53*4882a593Smuzhiyun - Provides QIXIS access via I2C 54*4882a593Smuzhiyun 55*4882a593SmuzhiyunMemory map from core's view 56*4882a593Smuzhiyun---------------------------- 57*4882a593Smuzhiyun0x00_0000_0000 .. 0x00_000F_FFFF Boot Rom 58*4882a593Smuzhiyun0x00_0100_0000 .. 0x00_0FFF_FFFF CCSR 59*4882a593Smuzhiyun0x00_1800_0000 .. 0x00_181F_FFFF OCRAM 60*4882a593Smuzhiyun0x00_2000_0000 .. 0x00_2FFF_FFFF QSPI region #1 61*4882a593Smuzhiyun0x00_3000_0000 .. 0x00_3FFF_FFFF IFC region #1 62*4882a593Smuzhiyun0x00_8000_0000 .. 0x00_FFFF_FFFF DDR region #1 63*4882a593Smuzhiyun0x05_1000_0000 .. 0x05_FFFF_FFFF IFC region #2 64*4882a593Smuzhiyun0x80_8000_0000 .. 0xFF_FFFF_FFFF DDR region #2 65*4882a593Smuzhiyun 66*4882a593SmuzhiyunOther addresses are either reserved, or not used directly by U-Boot. 67*4882a593SmuzhiyunThis list should be updated when more addresses are used. 68*4882a593Smuzhiyun 69*4882a593SmuzhiyunIFC region map from core's view 70*4882a593Smuzhiyun------------------------------- 71*4882a593SmuzhiyunDuring boot i.e. IFC Region #1:- 72*4882a593Smuzhiyun 0x30000000 - 0x37ffffff : 128MB : NOR flash 73*4882a593Smuzhiyun 0x3C000000 - 0x40000000 : 64MB : CPLD 74*4882a593Smuzhiyun 75*4882a593SmuzhiyunAfter relocate to DDR i.e. IFC Region #2:- 76*4882a593Smuzhiyun 0x5_1000_0000..0x5_1fff_ffff Memory Hole 77*4882a593Smuzhiyun 0x5_2000_0000..0x5_3fff_ffff IFC CSx (CPLD, NAND and others 512MB) 78*4882a593Smuzhiyun 0x5_4000_0000..0x5_7fff_ffff ASIC or others 1GB 79*4882a593Smuzhiyun 0x5_8000_0000..0x5_bfff_ffff IFC CS0 1GB (NOR/Promjet) 80*4882a593Smuzhiyun 0x5_C000_0000..0x5_ffff_ffff IFC CS1 1GB (NOR/Promjet) 81*4882a593Smuzhiyun 82*4882a593SmuzhiyunBooting Options 83*4882a593Smuzhiyun--------------- 84*4882a593Smuzhiyuna) NOR boot 85*4882a593Smuzhiyunb) NAND boot 86*4882a593Smuzhiyunc) QSPI boot 87*4882a593Smuzhiyun 88*4882a593SmuzhiyunMemory map for NOR boot 89*4882a593Smuzhiyun------------------------- 90*4882a593SmuzhiyunImage Flash Offset 91*4882a593SmuzhiyunRCW+PBI 0x00000000 92*4882a593SmuzhiyunBoot firmware (U-Boot) 0x00100000 93*4882a593SmuzhiyunBoot firmware Environment 0x00300000 94*4882a593SmuzhiyunPPA firmware 0x00400000 95*4882a593SmuzhiyunSecure Headers 0x00600000 96*4882a593SmuzhiyunCortina PHY firmware 0x00980000 97*4882a593SmuzhiyunDPAA2 MC 0x00A00000 98*4882a593SmuzhiyunDPAA2 DPL 0x00D00000 99*4882a593SmuzhiyunDPAA2 DPC 0x00E00000 100*4882a593SmuzhiyunKernel.itb 0x01000000 101*4882a593Smuzhiyun 102*4882a593Smuzhiyuncfg_rcw_src switches needs to be changed for booting from different option. 103*4882a593SmuzhiyunRefer to board documentation for correct switch setting. 104*4882a593Smuzhiyun 105*4882a593SmuzhiyunQSPI boot details 106*4882a593Smuzhiyun=================== 107*4882a593SmuzhiyunSupported only for 108*4882a593Smuzhiyun LS2088ARDB RevF board with LS2088A SoC. 109*4882a593Smuzhiyun 110*4882a593SmuzhiyunImages needs to be copied to QSPI flash 111*4882a593Smuzhiyunas per memory map given below. 112*4882a593Smuzhiyun 113*4882a593SmuzhiyunMemory map for QSPI flash 114*4882a593Smuzhiyun------------------------- 115*4882a593SmuzhiyunImage Flash Offset 116*4882a593SmuzhiyunRCW+PBI 0x00000000 117*4882a593SmuzhiyunBoot firmware (U-Boot) 0x00100000 118*4882a593SmuzhiyunBoot firmware Environment 0x00300000 119*4882a593SmuzhiyunPPA firmware 0x00400000 120*4882a593SmuzhiyunCortina PHY firmware 0x00980000 121*4882a593SmuzhiyunDPAA2 MC 0x00A00000 122*4882a593SmuzhiyunDPAA2 DPL 0x00D00000 123*4882a593SmuzhiyunDPAA2 DPC 0x00E00000 124*4882a593SmuzhiyunKernel.itb 0x01000000 125*4882a593Smuzhiyun 126*4882a593SmuzhiyunBooting Linux flavors which do not support 48-bit VA (< Linux 3.18) 127*4882a593Smuzhiyun------------------------------------------------------------------- 128*4882a593SmuzhiyunOne needs to use appropriate bootargs to boot Linux flavors which do 129*4882a593Smuzhiyunnot support 48-bit VA (for e.g. < Linux 3.18) by appending mem=2048M, as shown 130*4882a593Smuzhiyunbelow: 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun=> setenv bootargs 'console=ttyS1,115200 root=/dev/ram 133*4882a593Smuzhiyun earlycon=uart8250,mmio,0x21c0600,115200 default_hugepagesz=2m hugepagesz=2m 134*4882a593Smuzhiyun hugepages=16 mem=2048M' 135*4882a593Smuzhiyun 136