1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (C) 2012 Thomas Langer <thomas.langer@lantiq.com> 5*4882a593Smuzhiyun * Copyright (C) 2012 John Crispin <john@phrozen.org> 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <linux/kernel.h> 9*4882a593Smuzhiyun #include <asm/cacheflush.h> 10*4882a593Smuzhiyun #include <asm/traps.h> 11*4882a593Smuzhiyun #include <asm/io.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <lantiq_soc.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #include "../prom.h" 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define SOC_FALCON "Falcon" 18*4882a593Smuzhiyun #define SOC_FALCON_D "Falcon-D" 19*4882a593Smuzhiyun #define SOC_FALCON_V "Falcon-V" 20*4882a593Smuzhiyun #define SOC_FALCON_M "Falcon-M" 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define COMP_FALCON "lantiq,falcon" 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun #define PART_SHIFT 12 25*4882a593Smuzhiyun #define PART_MASK 0x0FFFF000 26*4882a593Smuzhiyun #define REV_SHIFT 28 27*4882a593Smuzhiyun #define REV_MASK 0xF0000000 28*4882a593Smuzhiyun #define SREV_SHIFT 22 29*4882a593Smuzhiyun #define SREV_MASK 0x03C00000 30*4882a593Smuzhiyun #define TYPE_SHIFT 26 31*4882a593Smuzhiyun #define TYPE_MASK 0x3C000000 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* reset, nmi and ejtag exception vectors */ 34*4882a593Smuzhiyun #define BOOT_REG_BASE (KSEG1 | 0x1F200000) 35*4882a593Smuzhiyun #define BOOT_RVEC (BOOT_REG_BASE | 0x00) 36*4882a593Smuzhiyun #define BOOT_NVEC (BOOT_REG_BASE | 0x04) 37*4882a593Smuzhiyun #define BOOT_EVEC (BOOT_REG_BASE | 0x08) 38*4882a593Smuzhiyun ltq_soc_nmi_setup(void)39*4882a593Smuzhiyunvoid __init ltq_soc_nmi_setup(void) 40*4882a593Smuzhiyun { 41*4882a593Smuzhiyun extern void (*nmi_handler)(void); 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun ltq_w32((unsigned long)&nmi_handler, (void *)BOOT_NVEC); 44*4882a593Smuzhiyun } 45*4882a593Smuzhiyun ltq_soc_ejtag_setup(void)46*4882a593Smuzhiyunvoid __init ltq_soc_ejtag_setup(void) 47*4882a593Smuzhiyun { 48*4882a593Smuzhiyun extern void (*ejtag_debug_handler)(void); 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun ltq_w32((unsigned long)&ejtag_debug_handler, (void *)BOOT_EVEC); 51*4882a593Smuzhiyun } 52*4882a593Smuzhiyun ltq_soc_detect(struct ltq_soc_info * i)53*4882a593Smuzhiyunvoid __init ltq_soc_detect(struct ltq_soc_info *i) 54*4882a593Smuzhiyun { 55*4882a593Smuzhiyun u32 type; 56*4882a593Smuzhiyun i->partnum = (ltq_r32(FALCON_CHIPID) & PART_MASK) >> PART_SHIFT; 57*4882a593Smuzhiyun i->rev = (ltq_r32(FALCON_CHIPID) & REV_MASK) >> REV_SHIFT; 58*4882a593Smuzhiyun i->srev = ((ltq_r32(FALCON_CHIPCONF) & SREV_MASK) >> SREV_SHIFT); 59*4882a593Smuzhiyun i->compatible = COMP_FALCON; 60*4882a593Smuzhiyun i->type = SOC_TYPE_FALCON; 61*4882a593Smuzhiyun sprintf(i->rev_type, "%c%d%d", (i->srev & 0x4) ? ('B') : ('A'), 62*4882a593Smuzhiyun i->rev & 0x7, (i->srev & 0x3) + 1); 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun switch (i->partnum) { 65*4882a593Smuzhiyun case SOC_ID_FALCON: 66*4882a593Smuzhiyun type = (ltq_r32(FALCON_CHIPTYPE) & TYPE_MASK) >> TYPE_SHIFT; 67*4882a593Smuzhiyun switch (type) { 68*4882a593Smuzhiyun case 0: 69*4882a593Smuzhiyun i->name = SOC_FALCON_D; 70*4882a593Smuzhiyun break; 71*4882a593Smuzhiyun case 1: 72*4882a593Smuzhiyun i->name = SOC_FALCON_V; 73*4882a593Smuzhiyun break; 74*4882a593Smuzhiyun case 2: 75*4882a593Smuzhiyun i->name = SOC_FALCON_M; 76*4882a593Smuzhiyun break; 77*4882a593Smuzhiyun default: 78*4882a593Smuzhiyun i->name = SOC_FALCON; 79*4882a593Smuzhiyun break; 80*4882a593Smuzhiyun } 81*4882a593Smuzhiyun break; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun default: 84*4882a593Smuzhiyun unreachable(); 85*4882a593Smuzhiyun break; 86*4882a593Smuzhiyun } 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun board_nmi_handler_setup = ltq_soc_nmi_setup; 89*4882a593Smuzhiyun board_ejtag_handler_setup = ltq_soc_ejtag_setup; 90*4882a593Smuzhiyun } 91