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/OK3568_Linux_fs/kernel/arch/arm/mach-omap2/
H A Domap-headsmp.S22 #define AUX_CORE_BOOT0_PA 0x48281800
23 #define API_HYP_ENTRY 0x102
46 mrc p15, 0, r4, c0, c0, 5
47 and r4, r4, #0x0f
64 mrc p15, 0, r4, c0, c0, 5
65 and r4, r4, #0x0f
70 smc #0
82 hold: ldr r12,=0x103
84 smc #0 @ read from AuxCoreBoot0
86 mrc p15, 0, r4, c0, c0, 5
[all …]
H A Domap-smc.S30 smc #0
46 mov r1, #0x0 @ Process ID
47 mov r6, #0xff
48 mov r12, #0x00 @ Secure Service ID
49 mov r7, #0
50 mcr p15, 0, r7, c7, c5, 6
53 smc #0
68 mov r6, #0xff @ Indicate new Task call
76 ldr r12, =0x104
78 smc #0
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/display/dc/dce/
H A Ddmub_abm.c58 uint32_t fractional_pwm = (dc->dc->config.disable_fractional_pwm == false) ? 1 : 0; in dmub_abm_enable_fractional_pwm()
74 REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x103); in dmub_abm_init()
75 REG_WRITE(DC_ABM1_HG_SAMPLE_RATE, 0x101); in dmub_abm_init()
76 REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x103); in dmub_abm_init()
77 REG_WRITE(DC_ABM1_LS_SAMPLE_RATE, 0x101); in dmub_abm_init()
78 REG_WRITE(BL1_PWM_BL_UPDATE_SAMPLE_RATE, 0x101); in dmub_abm_init()
80 REG_SET_3(DC_ABM1_HG_MISC_CTRL, 0, in dmub_abm_init()
81 ABM1_HG_NUM_OF_BINS_SEL, 0, in dmub_abm_init()
83 ABM1_HG_BIN_BITWIDTH_SIZE_SEL, 0); in dmub_abm_init()
85 REG_SET_3(DC_ABM1_IPCSC_COEFF_SEL, 0, in dmub_abm_init()
[all …]
H A Ddce_abm.c52 #define MCP_ABM_LEVEL_SET 0x65
53 #define MCP_ABM_PIPE_SET 0x66
54 #define MCP_BL_SET 0x67
61 uint32_t rampingBoundary = 0xFFFF; in dce_abm_set_pipe()
66 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe()
80 REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, 0, in dce_abm_set_pipe()
93 unsigned int backlight_8_bit = 0; in dmcu_set_backlight_level()
96 if (backlight_pwm_u16_16 & 0x10000) in dmcu_set_backlight_level()
98 backlight_8_bit = 0xFF; in dmcu_set_backlight_level()
101 backlight_8_bit = (backlight_pwm_u16_16 >> 8) & 0xFF; in dmcu_set_backlight_level()
[all …]
/OK3568_Linux_fs/u-boot/include/
H A Dmicrel.h3 #define MII_KSZ9021_EXT_COMMON_CTRL 0x100
4 #define MII_KSZ9021_EXT_STRAP_STATUS 0x101
5 #define MII_KSZ9021_EXT_OP_STRAP_OVERRIDE 0x102
6 #define MII_KSZ9021_EXT_OP_STRAP_STATUS 0x103
7 #define MII_KSZ9021_EXT_RGMII_CLOCK_SKEW 0x104
8 #define MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW 0x105
9 #define MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW 0x106
10 #define MII_KSZ9021_EXT_ANALOG_TEST 0x107
12 #define MII_KSZ9031_MOD_REG 0x0000
14 #define MII_KSZ9031_MOD_DATA_NO_POST_INC 0x4000
[all …]
/OK3568_Linux_fs/kernel/drivers/media/usb/au0828/
H A Dau0828-reg.h11 #define REG_000 0x000
12 #define REG_001 0x001
13 #define REG_002 0x002
14 #define REG_003 0x003
16 #define AU0828_SENSORCTRL_100 0x100
17 #define AU0828_SENSORCTRL_VBI_103 0x103
20 #define AU0828_I2C_TRIGGER_200 0x200
21 #define AU0828_I2C_STATUS_201 0x201
22 #define AU0828_I2C_CLK_DIVIDER_202 0x202
23 #define AU0828_I2C_DEST_ADDR_203 0x203
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dusb_a9g20-dab-mmx.dtsi21 i2c-gpio@0 {
69 #size-cells = <0>;
74 linux,code = <0x100>;
80 linux,code = <0x101>;
86 linux,code = <0x102>;
92 linux,code = <0x103>;
H A Dat91-foxg20.dts21 reg = <0x20000000 0x4000000>;
37 timer@0 {
39 reg = <0>, <1>;
54 pinctrl-0 = <
68 pinctrl-0 =
121 pinctrl_i2c0: i2c0-0 {
140 i2c-gpio-0 {
142 pinctrl-0 = <&pinctrl_i2c0>;
164 linux,code = <0x103>;
H A Dat91sam9260ek.dts21 reg = <0x20000000 0x4000000>;
37 timer@0 {
39 reg = <0>, <1>;
54 pinctrl-0 = <
69 pinctrl-0 =
85 pinctrl-0 = <&pinctrl_ssc0_tx>;
94 cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
121 atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
153 linux,code = <0x103>;
165 i2c-gpio-0 {
[all …]
H A Dexynos5420-cpus.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0>;
40 reg = <0x1>;
52 reg = <0x2>;
64 reg = <0x3>;
76 reg = <0x100>;
88 reg = <0x101>;
100 reg = <0x102>;
112 reg = <0x103>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/broadcom/stingray/
H A Dstingray-pcie.dtsi8 reg = <0 0x60400000 0 0x1000>;
11 bus-range = <0x0 0x1>;
16 ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>;
20 msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */
21 <0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */
22 <0x101 &gic_its 0x2080 0x1>, /* PF1 */
23 <0x110 &gic_its 0x20c8 0x8>, /* PF1-VF8-15 */
24 <0x102 &gic_its 0x2100 0x1>, /* PF2 */
25 <0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */
26 <0x103 &gic_its 0x2180 0x1>, /* PF3 */
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/amlogic/
H A Dmeson-g12b.dtsi13 #address-cells = <0x2>;
14 #size-cells = <0x0>;
46 cpu0: cpu@0 {
49 reg = <0x0 0x0>;
59 reg = <0x0 0x1>;
69 reg = <0x0 0x100>;
79 reg = <0x0 0x101>;
89 reg = <0x0 0x102>;
99 reg = <0x0 0x103>;
/OK3568_Linux_fs/app/forlinx/flapp/src/plugins/screen/
H A Dibacklight.cpp35 bOpen = m_fd>0; in open()
46 if(m_fd>0) in close()
52 int ret =0; in setValue()
54 lseek(m_fd, 0, SEEK_SET); in setValue()
64 lseek(m_fd, 0, SEEK_SET); in getValue()
80 DISP_GET_OUTPUT_TYPE = 0x09,
82 DISP_LCD_GET_BRIGHTNESS = 0x103,
83 DISP_LCD_SET_BRIGHTNESS = 0x102
90 for(i = 0; i < 2; i++) in getValue()
92 args[0] = i; in getValue()
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/include/asm/
H A Dreg_fsl_emb.h15 asm volatile("mfpmr %0," __stringify(rn) \
17 #define mtpmr(rn, v) asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v))
21 #define PMRN_PMC0 0x010 /* Performance Monitor Counter 0 */
22 #define PMRN_PMC1 0x011 /* Performance Monitor Counter 1 */
23 #define PMRN_PMC2 0x012 /* Performance Monitor Counter 2 */
24 #define PMRN_PMC3 0x013 /* Performance Monitor Counter 3 */
25 #define PMRN_PMC4 0x014 /* Performance Monitor Counter 4 */
26 #define PMRN_PMC5 0x015 /* Performance Monitor Counter 5 */
27 #define PMRN_PMLCA0 0x090 /* PM Local Control A0 */
28 #define PMRN_PMLCA1 0x091 /* PM Local Control A1 */
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/
H A Dmt6755.dtsi30 #size-cells = <0>;
32 cpu0: cpu@0 {
36 reg = <0x000>;
43 reg = <0x001>;
50 reg = <0x002>;
57 reg = <0x003>;
64 reg = <0x100>;
71 reg = <0x101>;
78 reg = <0x102>;
85 reg = <0x103>;
[all …]
H A Dmt6795.dtsi30 #size-cells = <0>;
32 cpu0: cpu@0 {
36 reg = <0x000>;
43 reg = <0x001>;
50 reg = <0x002>;
57 reg = <0x003>;
64 reg = <0x100>;
71 reg = <0x101>;
78 reg = <0x102>;
85 reg = <0x103>;
[all …]
/OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/arm64/ampere/emag/
H A Dcache.json43 "EventCode": "0x01",
49 "EventCode": "0x02",
55 "EventCode": "0x03",
61 "EventCode": "0x04",
67 "EventCode": "0x05",
73 "EventCode": "0x14",
79 "EventCode": "0x16",
85 "EventCode": "0x17",
91 "EventCode": "0x18",
97 "EventCode": "0x25",
[all …]
/OK3568_Linux_fs/kernel/fs/cifs/
H A Dcifspdu.h30 #define LANMAN_PROT 0
34 #define CIFS_PROT 0
37 #define BAD_PROT 0xFFFF
40 * Note some commands have minimal (wct=0,bcc=0), or uninteresting, responses
44 #define SMB_COM_CREATE_DIRECTORY 0x00 /* trivial response */
45 #define SMB_COM_DELETE_DIRECTORY 0x01 /* trivial response */
46 #define SMB_COM_CLOSE 0x04 /* triv req/rsp, timestamp ignored */
47 #define SMB_COM_FLUSH 0x05 /* triv req/rsp */
48 #define SMB_COM_DELETE 0x06 /* trivial response */
49 #define SMB_COM_RENAME 0x07 /* trivial response */
[all …]
/OK3568_Linux_fs/kernel/include/uapi/sound/
H A Dtlv.h17 #define SNDRV_CTL_TLVT_CONTAINER 0 /* one level down - group of TLVs */
28 #define SNDRV_CTL_TLVT_CHMAP_FIXED 0x101 /* fixed channel position */
29 #define SNDRV_CTL_TLVT_CHMAP_VAR 0x102 /* channels freely swappable */
30 #define SNDRV_CTL_TLVT_CHMAP_PAIRED 0x103 /* pair-wise swappable */
46 #define SNDRV_CTL_TLVO_TYPE 0
56 #define SNDRV_CTL_TLVD_DB_SCALE_MASK 0xffff
57 #define SNDRV_CTL_TLVD_DB_SCALE_MUTE 0x10000
62 ((mute) ? SNDRV_CTL_TLVD_DB_SCALE_MUTE : 0))
H A Dskl-tplg-interface.h16 * Default types range from 0~12. type can range from 0 to 0xff
19 #define SKL_CONTROL_TYPE_BYTE_TLV 0x100
20 #define SKL_CONTROL_TYPE_MIC_SELECT 0x102
21 #define SKL_CONTROL_TYPE_MULTI_IO_SELECT 0x103
22 #define SKL_CONTROL_TYPE_MULTI_IO_SELECT_DMIC 0x104
30 /* Reserve event type 0 for no event handlers */
32 SKL_EVENT_NONE = 0,
57 SKL_CH_CFG_MONO = 0,
74 SKL_MODULE_TYPE_MIXER = 0,
85 SKL_AFFINITY_CORE_0 = 0,
[all …]
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/aarch64-none-linux-gnu/libc/usr/include/sound/
H A Dtlv.h17 #define SNDRV_CTL_TLVT_CONTAINER 0 /* one level down - group of TLVs */
28 #define SNDRV_CTL_TLVT_CHMAP_FIXED 0x101 /* fixed channel position */
29 #define SNDRV_CTL_TLVT_CHMAP_VAR 0x102 /* channels freely swappable */
30 #define SNDRV_CTL_TLVT_CHMAP_PAIRED 0x103 /* pair-wise swappable */
46 #define SNDRV_CTL_TLVO_TYPE 0
56 #define SNDRV_CTL_TLVD_DB_SCALE_MASK 0xffff
57 #define SNDRV_CTL_TLVD_DB_SCALE_MUTE 0x10000
62 ((mute) ? SNDRV_CTL_TLVD_DB_SCALE_MUTE : 0))
/OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/include/sound/
H A Dtlv.h17 #define SNDRV_CTL_TLVT_CONTAINER 0 /* one level down - group of TLVs */
28 #define SNDRV_CTL_TLVT_CHMAP_FIXED 0x101 /* fixed channel position */
29 #define SNDRV_CTL_TLVT_CHMAP_VAR 0x102 /* channels freely swappable */
30 #define SNDRV_CTL_TLVT_CHMAP_PAIRED 0x103 /* pair-wise swappable */
46 #define SNDRV_CTL_TLVO_TYPE 0
56 #define SNDRV_CTL_TLVD_DB_SCALE_MASK 0xffff
57 #define SNDRV_CTL_TLVD_DB_SCALE_MUTE 0x10000
62 ((mute) ? SNDRV_CTL_TLVD_DB_SCALE_MUTE : 0))
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/
H A Dqoriq-mpic4.3.dtsi2 * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
37 #address-cells = <0>;
39 reg = <0x40000 0x40000>;
42 clock-frequency = <0x0>;
47 reg = <0x41100 0x100 0x41300 4>;
48 interrupts = <0 0 3 0
49 1 0 3 0
50 2 0 3 0
51 3 0 3 0>;
56 reg = <0x41600 0x200 0x44148 4>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dat91sam9g20ek_common.dtsi17 reg = <0x20000000 0x4000000>;
55 pinctrl-0 =
80 pinctrl-0 = <
95 pinctrl-0 = <&pinctrl_ssc0_tx>;
99 cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
100 mtd_dataflash@0 {
113 atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
132 at91bootstrap@0 {
134 reg = <0x0 0x20000>;
139 reg = <0x20000 0x40000>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/powerpc/fsl/
H A Dmsi-pic.txt45 reg = <0x41600 0x80>;
46 msi-available-ranges = <0 0x100>;
48 0xe0 0
49 0xe1 0
50 0xe2 0
51 0xe3 0
52 0xe4 0
53 0xe5 0
54 0xe6 0
55 0xe7 0>;
[all …]

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