1*4882a593Smuzhiyun #ifndef _MICREL_H 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun #define MII_KSZ9021_EXT_COMMON_CTRL 0x100 4*4882a593Smuzhiyun #define MII_KSZ9021_EXT_STRAP_STATUS 0x101 5*4882a593Smuzhiyun #define MII_KSZ9021_EXT_OP_STRAP_OVERRIDE 0x102 6*4882a593Smuzhiyun #define MII_KSZ9021_EXT_OP_STRAP_STATUS 0x103 7*4882a593Smuzhiyun #define MII_KSZ9021_EXT_RGMII_CLOCK_SKEW 0x104 8*4882a593Smuzhiyun #define MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW 0x105 9*4882a593Smuzhiyun #define MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW 0x106 10*4882a593Smuzhiyun #define MII_KSZ9021_EXT_ANALOG_TEST 0x107 11*4882a593Smuzhiyun /* Register operations */ 12*4882a593Smuzhiyun #define MII_KSZ9031_MOD_REG 0x0000 13*4882a593Smuzhiyun /* Data operations */ 14*4882a593Smuzhiyun #define MII_KSZ9031_MOD_DATA_NO_POST_INC 0x4000 15*4882a593Smuzhiyun #define MII_KSZ9031_MOD_DATA_POST_INC_RW 0x8000 16*4882a593Smuzhiyun #define MII_KSZ9031_MOD_DATA_POST_INC_W 0xC000 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #define MII_KSZ9031_EXT_RGMII_CTRL_SIG_SKEW 0x4 19*4882a593Smuzhiyun #define MII_KSZ9031_EXT_RGMII_RX_DATA_SKEW 0x5 20*4882a593Smuzhiyun #define MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW 0x6 21*4882a593Smuzhiyun #define MII_KSZ9031_EXT_RGMII_CLOCK_SKEW 0x8 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #define MII_KSZ9031_FLP_BURST_TX_LO 0x3 24*4882a593Smuzhiyun #define MII_KSZ9031_FLP_BURST_TX_HI 0x4 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* Registers */ 27*4882a593Smuzhiyun #define MMD_ACCESS_CONTROL 0xd 28*4882a593Smuzhiyun #define MMD_ACCESS_REG_DATA 0xe 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun struct phy_device; 31*4882a593Smuzhiyun int ksz9021_phy_extended_write(struct phy_device *phydev, int regnum, u16 val); 32*4882a593Smuzhiyun int ksz9021_phy_extended_read(struct phy_device *phydev, int regnum); 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun int ksz9031_phy_extended_write(struct phy_device *phydev, int devaddr, 35*4882a593Smuzhiyun int regnum, u16 mode, u16 val); 36*4882a593Smuzhiyun int ksz9031_phy_extended_read(struct phy_device *phydev, int devaddr, 37*4882a593Smuzhiyun int regnum, u16 mode); 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #endif 40