| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interconnect/ |
| H A D | qcom,msm8916.yaml | 54 reg = <0x00400000 0x62000>; 63 reg = <0x00500000 0x11000>; 72 reg = <0x00580000 0x14000>;
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| H A D | qcom,qcs404.yaml | 53 reg = <0x00400000 0x80000>; 62 reg = <0x00500000 0x15080>; 71 reg = <0x00580000 0x23080>;
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| /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/ |
| H A D | a3m071.dts | 26 ranges = <0 0xf0000000 0x0000c000>; 27 reg = <0xf0000000 0x00000100>; 28 bus-frequency = <0>; /* From boot loader */ 29 system-frequency = <0>; /* From boot loader */ 41 reg = <0x2000 0x100>; 42 interrupts = <2 1 0>; 63 reg = <0x2c00 0x100>; 64 interrupts = <2 4 0>; 73 reg = <0x03>; 94 ranges = <0 0 0xfc000000 0x02000000 [all …]
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| /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/ |
| H A D | c293pcie.dts | 46 reg = <0xf 0xffe1e000 0 0x2000>; 47 ranges = <0x0 0x0 0xf 0xec000000 0x04000000 48 0x1 0x0 0xf 0xff800000 0x00010000 49 0x2 0x0 0xf 0xffdf0000 0x00010000>; 54 ranges = <0x0 0xf 0xffe00000 0x100000>; 58 reg = <0xf 0xffe0a000 0 0x1000>; 59 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000 60 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>; 61 pcie@0 { 62 ranges = <0x2000000 0x0 0x80000000 [all …]
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| H A D | p1010rdb.dtsi | 36 nor@0,0 { 40 reg = <0x0 0x0 0x2000000>; 46 reg = <0x00040000 0x00040000>; 52 reg = <0x00080000 0x00700000>; 58 reg = <0x00800000 0x01400000>; 66 reg = <0x01f00000 0x00100000>; 72 ifc_nand: nand@1,0 { 76 reg = <0x1 0x0 0x10000>; 79 cpld@3,0 { 83 reg = <0x3 0x0 0x0000020>; [all …]
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| H A D | p1025twr.dtsi | 43 nor@0,0 { 47 reg = <0x0 0x0 0x4000000>; 51 partition@0 { 54 reg = <0x0 0x00040000>; 61 reg = <0x00040000 0x00040000>; 67 reg = <0x00080000 0x00580000>; 73 reg = <0x00600000 0x038c0000>; 80 reg = <0x03ec0000 0x00040000>; 89 reg = <0x03f00000 0x00100000>; 96 display@2,0 { [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | r8a7791-koelsch.dts | 68 reg = <0 0x40000000 0 0x40000000>; 73 reg = <2 0x00000000 0 0x40000000>; 85 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 113 gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; 199 states = <3300000 1>, <1800000 0>; 222 states = <3300000 1>, <1800000 0>; 245 states = <3300000 1>, <1800000 0>; 250 #clock-cells = <0>; 284 #clock-cells = <0>; 301 #clock-cells = <0>; [all …]
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| /OK3568_Linux_fs/kernel/crypto/ |
| H A D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6, 68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591, 69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56, 70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec, 71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa, 72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb, 73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45, 74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b, 75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c, 76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83, [all …]
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/ |
| H A D | qcs404.dtsi | 22 #clock-cells = <0>; 28 #clock-cells = <0>; 35 #size-cells = <0>; 40 reg = <0x100>; 54 reg = <0x101>; 68 reg = <0x102>; 82 reg = <0x103>; 101 CPU_SLEEP_0: cpu-sleep-0 { 104 arm,psci-suspend-param = <0x40000003>; 158 reg = <0 0x80000000 0 0>; [all …]
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| H A D | msm8916.dtsi | 30 reg = <0 0 0 0>; 39 reg = <0x0 0x86000000 0x0 0x300000>; 44 reg = <0x0 0x86300000 0x0 0x100000>; 49 reg = <0x0 0x86400000 0x0 0x100000>; 54 reg = <0x0 0x86500000 0x0 0x180000>; 59 reg = <0x0 0x86680000 0x0 0x80000>; 65 reg = <0x0 0x86700000 0x0 0xe0000>; 72 reg = <0x0 0x867e0000 0x0 0x20000>; 77 reg = <0x0 0x86800000 0x0 0x2b00000>; 82 reg = <0x0 0x89300000 0x0 0x600000>; [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/freescale/fman/ |
| H A D | fman_port.c | 50 #define DFLT_FQ_ID 0x00FFFFFF 53 #define PORT_BMI_FIFO_UNITS 0x100 60 #define PORT_IC_OFFSET_UNITS 0x10 64 #define BMI_PORT_REGS_OFFSET 0 65 #define QMI_PORT_REGS_OFFSET 0x400 66 #define HWP_PORT_REGS_OFFSET 0x800 85 #define DFLT_PORT_EXTRA_NUM_OF_FIFO_BUFS 0 88 #define QMI_DEQ_CFG_SUBPORTAL_MASK 0x1f 90 #define QMI_PORT_CFG_EN 0x80000000 91 #define QMI_PORT_STATUS_DEQ_FD_BSY 0x20000000 [all …]
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| /OK3568_Linux_fs/external/mpp/mpp/hal/rkenc/h265e/ |
| H A D | hal_h265e_vepu540c.c | 45 } while (0) 48 RK_U32 hw_status; /* 0:corret, 1:error */ 108 0, 0, 0, 0, 117 0, 1, 2, 3, 122 0x00000049, 0x0000005c, 0x00000074, 0x00000092, 0x000000b8, 0x000000e8, 0x00000124, 0x00000170, 123 0x000001cf, 0x00000248, 0x000002df, 0x0000039f, 0x0000048f, 0x000005bf, 0x0000073d, 0x0000091f, 124 0x00000b7e, 0x00000e7a, 0x0000123d, 0x000016fb, 0x00001cf4, 0x0000247b, 0x00002df6, 0x000039e9, 125 0x000048f6, 0x00005bed, 0x000073d1, 0x000091ec, 0x0000b7d9, 0x0000e7a2, 0x000123d7, 0x00016fb2, 126 0x0001cf44, 0x000247ae, 0x0002df64, 0x00039e89, 0x00048f5c, 0x0005bec8, 0x00073d12, 0x00091eb8, 127 0x000b7d90, 0x000e7a23, 0x00123d71, 0x0016fb20, 0x001cf446, 0x00247ae1, 0x002df640, 0x0039e88c, [all …]
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| H A D | hal_h265e_vepu541.c | 44 } while (0) 50 RK_U32 hw_status; /* 0:corret, 1:error */ 116 0x50800080, 0x00330000, 0xA1000100, 0x00660000, 0x42000200, 0x00CC0001, 117 0x84000400, 0x01980002, 0x08000800, 0x03300005, 0x10001000, 0x0660000A, 118 0x20002000, 0x0CC00014, 0x40004000, 0x19800028, 0x80008000, 0x33000050, 119 0x00010000, 0x660000A1, 0x00020000, 0xCC000142, 0xFF83FFFF, 0x000001FF 123 0, 0, 0, 0, 132 0, 1, 2, 2, 144 static RK_U16 atr_thd[4] = {0, 0, 0, 0}; 146 static RK_U8 lvl16_4_atr_wgt[12] = {0}; [all …]
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| H A D | hal_h265e_vepu580.c | 48 } while (0) 51 RK_U32 hw_status; /* 0:corret, 1:error */ 144 0x50800080, 0x00330000, 0xA1000100, 0x00660000, 0x42000200, 0x00CC0001, 145 0x84000400, 0x01980002, 0x08000800, 0x03300005, 0x10001000, 0x0660000A, 146 0x20002000, 0x0CC00014, 0x40004000, 0x19800028, 0x80008000, 0x33000050, 147 0x00010000, 0x660000A1, 0x00020000, 0xCC000142, 0xFF83FFFF, 0x000001FF 151 0, 0, 0, 0, 158 0, 2, 4, 6, 167 0, 2, 3, 4, 180 0x00000183, 0x000001b2, 0x000001e7, 0x00000223, 0x00000266, 0x000002b1, 0x00000305, 0x00000364, [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/sun/ |
| H A D | niu.h | 10 #define PIO 0x000000UL 11 #define FZC_PIO 0x080000UL 12 #define FZC_MAC 0x180000UL 13 #define FZC_IPP 0x280000UL 14 #define FFLP 0x300000UL 15 #define FZC_FFLP 0x380000UL 16 #define PIO_VADDR 0x400000UL 17 #define ZCP 0x500000UL 18 #define FZC_ZCP 0x580000UL 19 #define DMC 0x600000UL [all …]
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