Home
last modified time | relevance | path

Searched +full:0 +full:x00020000 (Results 1 – 25 of 1043) sorted by relevance

12345678910>>...42

/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/phydm/halrf/rtl8822c/
H A Dhalhwimg8822c_rf.c29 #define ODM_WIN 0x08
44 #define CUT_DONT_CARE 0xf
45 #define RFE_DONT_CARE 0xff
46 #define PARA_IF 0x8
47 #define PARA_ELSE_IF 0x9
48 #define PARA_ELSE 0xa
49 #define PARA_END 0xb
50 #define PARA_CHK 0x4
61 u32 cut_para = 0, rfe_para = 0; in halbb_sel_headline()
62 u32 compare_target = 0; in halbb_sel_headline()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x80000015, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/sun4i/
H A Dsun8i_csc.c25 0x000004A8, 0x00000000, 0x00000662, 0xFFFC8451,
26 0x000004A8, 0xFFFFFE6F, 0xFFFFFCC0, 0x00021E4D,
27 0x000004A8, 0x00000811, 0x00000000, 0xFFFBACA9,
30 0x000004A8, 0x00000000, 0x0000072B, 0xFFFC1F99,
31 0x000004A8, 0xFFFFFF26, 0xFFFFFDDF, 0x00013383,
32 0x000004A8, 0x00000873, 0x00000000, 0xFFFB7BEF,
37 0x00000400, 0x00000000, 0x0000059B, 0xFFFD322E,
38 0x00000400, 0xFFFFFEA0, 0xFFFFFD25, 0x00021DD5,
39 0x00000400, 0x00000716, 0x00000000, 0xFFFC74BD,
42 0x00000400, 0x00000000, 0x0000064C, 0xFFFCD9B4,
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/etnaviv/
H A Dcommon.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
43 #define PIPE_ID_PIPE_3D 0x00000000
44 #define PIPE_ID_PIPE_2D 0x00000001
45 #define SYNC_RECIPIENT_FE 0x00000001
46 #define SYNC_RECIPIENT_RA 0x00000005
47 #define SYNC_RECIPIENT_PE 0x00000007
48 #define SYNC_RECIPIENT_DE 0x0000000b
49 #define SYNC_RECIPIENT_BLT 0x00000010
50 #define ENDIAN_MODE_NO_SWAP 0x00000000
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/
H A Dk3-am65.dtsi68 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
69 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
70 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
71 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
72 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
73 <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* MSMC SRAM */
74 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
76 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
77 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
78 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
[all …]
H A Dk3-j7200.dtsi39 #size-cells = <0>;
53 cpu0: cpu@0 {
55 reg = <0x000>;
58 i-cache-size = <0xc000>;
61 d-cache-size = <0x8000>;
69 reg = <0x001>;
72 i-cache-size = <0xc000>;
75 d-cache-size = <0x8000>;
85 cache-size = <0x100000>;
125 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
H A Dk3-j721e.dtsi40 #size-cells = <0>;
54 cpu0: cpu@0 {
56 reg = <0x000>;
59 i-cache-size = <0xC000>;
62 d-cache-size = <0x8000>;
70 reg = <0x001>;
73 i-cache-size = <0xC000>;
76 d-cache-size = <0x8000>;
86 cache-size = <0x100000>;
127 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
/OK3568_Linux_fs/kernel/sound/pci/
H A Dsis7019.h17 #define SIS_GCR 0x00
18 #define SIS_GCR_MACRO_POWER_DOWN 0x80000000
19 #define SIS_GCR_MODEM_ENABLE 0x00010000
20 #define SIS_GCR_SOFTWARE_RESET 0x00000001
23 #define SIS_GIER 0x04
24 #define SIS_GIER_MODEM_TIMER_IRQ_ENABLE 0x00100000
25 #define SIS_GIER_MODEM_RX_DMA_IRQ_ENABLE 0x00080000
26 #define SIS_GIER_MODEM_TX_DMA_IRQ_ENABLE 0x00040000
27 #define SIS_GIER_AC97_GPIO1_IRQ_ENABLE 0x00020000
28 #define SIS_GIER_AC97_GPIO0_IRQ_ENABLE 0x00010000
[all …]
/OK3568_Linux_fs/u-boot/board/terasic/de0-nano-soc/qts/
H A Diocsr_config.h16 0x00000000,
17 0x00000000,
18 0x0FF00000,
19 0xC0000000,
20 0x0000003F,
21 0x00008000,
22 0x00020080,
23 0x18060000,
24 0x08000000,
25 0x00018020,
[all …]
/OK3568_Linux_fs/u-boot/board/terasic/de10-nano/qts/
H A Diocsr_config.h16 0x00000000,
17 0x00000000,
18 0x0FF00000,
19 0xC0000000,
20 0x0000003F,
21 0x00008000,
22 0x00020080,
23 0x18060000,
24 0x08000000,
25 0x00018020,
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/renesas/
H A Dravb.h38 #define RAVB_TXTSTAMP_VALID 0x00000001 /* TX timestamp valid */
39 #define RAVB_TXTSTAMP_ENABLED 0x00000010 /* Enable TX timestamping */
41 #define RAVB_RXTSTAMP_VALID 0x00000001 /* RX timestamp valid */
42 #define RAVB_RXTSTAMP_TYPE 0x00000006 /* RX type mask */
43 #define RAVB_RXTSTAMP_TYPE_V2_L2_EVENT 0x00000002
44 #define RAVB_RXTSTAMP_TYPE_ALL 0x00000006
45 #define RAVB_RXTSTAMP_ENABLED 0x00000010 /* Enable RX timestamping */
49 CCC = 0x0000,
50 DBAT = 0x0004,
51 DLR = 0x0008,
[all …]
/OK3568_Linux_fs/u-boot/board/terasic/de1-soc/qts/
H A Diocsr_config.h16 0x00000000,
17 0x00000000,
18 0x0FF00000,
19 0xC0000000,
20 0x0000003F,
21 0x00008000,
22 0x00060180,
23 0x18060000,
24 0x18000000,
25 0x00018060,
[all …]
/OK3568_Linux_fs/kernel/arch/m68k/include/asm/
H A Dmcf8390.h39 #define NE2000_ADDR 0x40000300
40 #define NE2000_ODDOFFSET 0x00010000
41 #define NE2000_ADDRSIZE 0x00020000
42 #define NE2000_IRQ_VECTOR 0xf0
49 #define NE2000_ADDR 0x40000300
50 #define NE2000_ODDOFFSET 0x00010000
51 #define NE2000_ADDRSIZE 0x00020000
52 #define NE2000_IRQ_VECTOR 0x1c
59 #define NE2000_ADDR 0x30000300
60 #define NE2000_ADDRSIZE 0x00001000
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-ixp4xx/
H A Domixp-setup.c40 .size = 0x00020000,
41 .offset = 0,
44 .size = 0x00020000,
45 .offset = 0x00020000,
48 .size = 0x00020000,
49 .offset = 0x00040000,
52 .size = 0x00020000,
53 .offset = 0x00060000,
56 .size = 0x00020000,
57 .offset = 0x00080000,
[all …]
/OK3568_Linux_fs/u-boot/board/sr1500/qts/
H A Diocsr_config.h16 0x00100000,
17 0x40000000,
18 0x0FF00000,
19 0xC0000000,
20 0x0000003F,
21 0x00008000,
22 0x000E0180,
23 0x18060000,
24 0x18000000,
25 0x00018060,
[all …]
/OK3568_Linux_fs/u-boot/include/
H A Dfsl_dspi.h17 u32 mcr; /* 0x00 */
18 u32 resv0; /* 0x04 */
19 u32 tcr; /* 0x08 */
20 u32 ctar[8]; /* 0x0C - 0x28 */
21 u32 sr; /* 0x2C */
22 u32 irsr; /* 0x30 */
23 u32 tfr; /* 0x34 - PUSHR */
24 u32 rfr; /* 0x38 - POPR */
26 u32 tfdr[4]; /* 0x3C */
27 u8 resv2[0x30]; /* 0x40 */
[all …]
/OK3568_Linux_fs/u-boot/arch/m68k/include/asm/coldfire/
H A Ddspi.h15 u32 mcr; /* 0x00 */
16 u32 resv0; /* 0x04 */
17 u32 tcr; /* 0x08 */
18 u32 ctar[8]; /* 0x0C - 0x28 */
19 u32 sr; /* 0x2C */
20 u32 irsr; /* 0x30 */
21 u32 tfr; /* 0x34 - PUSHR */
22 u16 resv1; /* 0x38 */
23 u16 rfr; /* 0x3A - POPR */
25 u32 tfdr[4]; /* 0x3C */
[all …]
/OK3568_Linux_fs/u-boot/include/configs/
H A Dedb93xx.h39 #define CONFIG_ENV_SECT_SIZE 0x00020000
43 #define CONFIG_ENV_SECT_SIZE 0x00020000
47 #define CONFIG_ENV_SECT_SIZE 0x00020000
51 #define CONFIG_ENV_SECT_SIZE 0x00040000
55 #define CONFIG_ENV_SECT_SIZE 0x00020000
59 #define CONFIG_ENV_SECT_SIZE 0x00040000
63 #define CONFIG_ENV_SECT_SIZE 0x00040000
67 #define CONFIG_ENV_SECT_SIZE 0x00020000
84 #define CONFIG_CONS_INDEX 0
87 #define CONFIG_SYS_SERIAL0 0x808C0000
[all …]
/OK3568_Linux_fs/u-boot/board/terasic/sockit/qts/
H A Diocsr_config.h16 0x00000000,
17 0x00000000,
18 0x0FF00000,
19 0xC0000000,
20 0x0000003F,
21 0x00008000,
22 0x00060180,
23 0x18060000,
24 0x18000000,
25 0x00018060,
[all …]
/OK3568_Linux_fs/u-boot/board/aries/mcvevk/qts/
H A Diocsr_config.h16 0x00000000,
17 0x00000000,
18 0x0FF00000,
19 0xC0000000,
20 0x0000003F,
21 0x00008000,
22 0x00000000,
23 0x18060000,
24 0x00000060,
25 0x00000000,
[all …]
/OK3568_Linux_fs/kernel/arch/powerpc/include/asm/
H A Dkeylargo.h10 /* "Pangea" chipset has keylargo device-id 0x25 while core99
11 * has device-id 0x22. The rev. of the pangea one is 0, so we
12 * fake an artificial rev. in keylargo_rev by oring 0x100
14 #define KL_PANGEA_REV 0x100
17 #define KEYLARGO_MBCR 0x34 /* KL Only, Media bay control/status */
18 #define KEYLARGO_FCR0 0x38
19 #define KEYLARGO_FCR1 0x3c
20 #define KEYLARGO_FCR2 0x40
21 #define KEYLARGO_FCR3 0x44
22 #define KEYLARGO_FCR4 0x48
[all …]
/OK3568_Linux_fs/u-boot/board/engicam/common/
H A Dspl.c49 return 0; in spl_start_uboot()
56 * 0x30 == 40 Ohm
57 * 0x28 == 48 Ohm
59 #define IMX6DQ_DRIVE_STRENGTH 0x30
60 #define IMX6SDL_DRIVE_STRENGTH 0x28
87 .dram_sdba2 = 0x00000000,
103 .grp_ddrmode_ctl = 0x00020000,
104 .grp_ddrpke = 0x00000000,
105 .grp_ddrmode = 0x00020000,
107 .grp_ddr_type = 0x000c0000,
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/via/
H A Dvia_3d_reg.h27 #define HC_REG_BASE 0x0400
29 #define HC_REG_TRANS_SPACE 0x0040
31 #define HC_ParaN_MASK 0xffffffff
32 #define HC_Para_MASK 0x00ffffff
33 #define HC_SubA_MASK 0xff000000
37 #define HC_REG_TRANS_SET 0x003c
38 #define HC_ParaSubType_MASK 0xff000000
39 #define HC_ParaType_MASK 0x00ff0000
40 #define HC_ParaOS_MASK 0x0000ff00
41 #define HC_ParaAdr_MASK 0x000000ff
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/
H A Dbcmsrom_tbl.h51 #define SRFL_CCODE 0x10 /* value is in country code format */
52 #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */
53 #define SRFL_LEDDC 0x40 /* value is an LED duty cycle */
54 #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
55 #define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST
79 {"devid", 0xffffff00, SRFL_PRHEX, PCI_F0DEVID, 0xffff},
81 {"devid", 0xffffff00, SRFL_PRHEX, SROM_DEVID_PCIE, 0xffff},
83 {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
85 {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
86 {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/include/
H A Dbcmsrom_tbl.h51 #define SRFL_CCODE 0x10 /* value is in country code format */
52 #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */
53 #define SRFL_LEDDC 0x40 /* value is an LED duty cycle */
54 #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
55 #define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST
79 {"devid", 0xffffff00, SRFL_PRHEX, PCI_F0DEVID, 0xffff},
81 {"devid", 0xffffff00, SRFL_PRHEX, SROM_DEVID_PCIE, 0xffff},
83 {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
85 {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
86 {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
[all …]

12345678910>>...42