| /OK3568_Linux_fs/kernel/drivers/clk/baikal-t1/ |
| H A D | ccu-div.c | 62 unsigned long div) in ccu_div_lock_delay_ns()
72 unsigned long div) in ccu_div_calc_freq()
77 static int ccu_div_var_update_clkdiv(struct ccu_div *div, in ccu_div_var_update_clkdiv()
114 struct ccu_div *div = to_ccu_div(hw); in ccu_div_var_enable() local
143 struct ccu_div *div = to_ccu_div(hw); in ccu_div_gate_enable() local
156 struct ccu_div *div = to_ccu_div(hw); in ccu_div_gate_disable() local
166 struct ccu_div *div = to_ccu_div(hw); in ccu_div_gate_is_enabled() local
176 struct ccu_div *div = to_ccu_div(hw); in ccu_div_buf_enable() local
189 struct ccu_div *div = to_ccu_div(hw); in ccu_div_buf_disable() local
200 struct ccu_div *div = to_ccu_div(hw); in ccu_div_buf_is_enabled() local
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| /OK3568_Linux_fs/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rv1108.c | 29 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
66 const struct pll_div *div) in rkclk_set_pll()
147 uint8_t div; in rv1108_mac_set_clk() local
172 u32 div; in rv1108_sfc_set_clk() local
191 u32 div, val; in rv1108_saradc_get_clk() local
216 u32 div, val; in rv1108_aclk_vio1_get_clk() local
242 u32 div, val; in rv1108_aclk_vio0_get_clk() local
277 u32 div, val; in rv1108_dclk_vop_get_clk() local
305 u32 div, val; in rv1108_aclk_bus_get_clk() local
333 u32 div, val; in rv1108_aclk_peri_get_clk() local
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| H A D | clk_rk3562.c | 20 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
203 u32 sel, con, div; in rk3562_bus_get_rate() local
238 u32 sel, div; in rk3562_bus_set_rate() local
277 u32 sel, con, div; in rk3562_peri_get_rate() local
312 u32 sel, div; in rk3562_peri_set_rate() local
351 u32 sel, con, div; in rk3562_i2c_get_rate() local
395 u32 sel, div; in rk3562_i2c_set_rate() local
445 u32 reg, con, fracdiv, div, src, p_src, p_rate; in rk3562_uart_get_rate() local
523 u32 reg, clk_src, uart_src, div; in rk3562_uart_set_rate() local
624 u32 sel, con, div, mask, shift; in rk3562_pwm_get_rate() local
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| H A D | clk_rk3588.c | 22 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
285 u32 con, sel, div, rate, prate; in rk3588_top_get_clk() local
655 u32 div, sel, con, prate; in rk3588_adc_get_clk() local
746 u32 sel, con, div, prate; in rk3588_mmc_get_clk() local
814 int src_clk, div; in rk3588_mmc_set_clk() local
900 u32 div, con, parent; in rk3588_aux16m_get_clk() local
921 u32 div; in rk3588_aux16m_set_clk() local
949 u32 div, sel, con, parent; in rk3588_aclk_vop_get_clk() local
1000 int src_clk, div; in rk3588_aclk_vop_set_clk() local
1063 u32 div, sel, con, parent; in rk3588_dclk_vop_get_clk() local
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| H A D | clk_rv1126.c | 30 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
217 u32 div, con; in rv1126_i2c_get_pmuclk() local
264 u32 div, sel, con; in rv1126_pwm_get_pmuclk() local
341 u32 div, con; in rv1126_spi_get_pmuclk() local
369 u32 div, con; in rv1126_pdpmu_get_pmuclk() local
599 u32 con, div; in rv1126_pdcore_get_clk() local
623 u32 con, div, sel, parent; in rv1126_pdbus_get_clk() local
717 u32 con, div, parent; in rv1126_pdphp_get_clk() local
769 u32 con, div; in rv1126_pdaudio_get_clk() local
794 u32 div, con; in rv1126_i2c_get_clk() local
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| H A D | clk_rk3328.c | 25 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
170 u32 div, con; in rk3328_i2c_get_clk() local
262 u8 div; in rk3328_gmac2io_set_clk() local
286 u8 div; in rk3328_gmac2phy_src_set_clk() local
319 u32 div, con, con_id; in rk3328_mmc_get_clk() local
387 u32 div, con, mux, p_rate; in rk3328_spi_get_clk() local
403 u32 div = priv->gpll_hz / hz; in rk3328_spi_set_clk() local
417 u32 div, con; in rk3328_pwm_get_clk() local
428 u32 div = priv->gpll_hz / hz; in rk3328_pwm_set_clk() local
441 u32 div, val; in rk3328_saradc_get_clk() local
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| H A D | clk_rk1808.c | 30 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
98 u32 div, con; in rk1808_i2c_get_clk() local
191 u32 div, con, con_id; in rk1808_mmc_get_clk() local
271 u32 div, con; in rk1808_sfc_get_clk() local
297 u32 div, con; in rk1808_saradc_get_clk() local
324 u32 div, con; in rk1808_pwm_get_clk() local
386 u32 div, con; in rk1808_tsadc_get_clk() local
412 u32 div, con; in rk1808_spi_get_clk() local
475 u32 div, con, parent; in rk1808_vop_get_clk() local
600 u8 div; in rk1808_mac_set_clk() local
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| H A D | clk_rk3528.c | 21 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
240 u32 div, mask, shift; in rk3528_ppll_matrix_get_rate() local
282 u32 id, div, mask, shift; in rk3528_ppll_matrix_set_rate() local
327 u32 sel, div, mask, shift, con; in rk3528_cgpll_matrix_get_rate() local
435 u32 sel, div, mask, shift, con; in rk3528_cgpll_matrix_set_rate() local
848 u32 div, con; in rk3528_adc_get_clk() local
878 u32 div, mask, shift; in rk3528_adc_set_clk() local
909 u32 div, sel, con; in rk3528_sdmmc_get_clk() local
932 u32 div, sel; in rk3528_sdmmc_set_clk() local
958 u32 div, sel, con, parent; in rk3528_sfc_get_clk() local
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| H A D | clk_rk3308.c | 29 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
200 u32 div, con, con_id; in rk3308_i2c_get_clk() local
266 u8 div; in rk3308_mac_set_clk() local
310 u32 div, con, con_id; in rk3308_mmc_get_clk() local
384 u32 div, con; in rk3308_saradc_get_clk() local
412 u32 div, con; in rk3308_tsadc_get_clk() local
440 u32 div, con, con_id; in rk3308_spi_get_clk() local
499 u32 div, con; in rk3308_pwm_get_clk() local
528 u32 div, pll_sel, vol_sel, con, parent; in rk3308_vop_get_clk() local
565 u32 i, div, best_div = 0, best_sel = 0; in rk3308_vop_set_clk() local
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| H A D | clk_rk3128.c | 23 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
144 uint div, mux; in rockchip_mmc_get_clk() local
226 u32 div, con, parent; in rk3128_peri_get_clk() local
307 u32 div, con, parent; in rk3128_bus_get_clk() local
377 u32 div, con, parent; in rk3128_spi_get_clk() local
389 int div; in rk3128_spi_set_clk() local
404 u32 div, val; in rk3128_saradc_get_clk() local
473 u32 div, con, parent; in rk3128_vop_get_rate() local
502 u32 div, val; in rk3128_crypto_get_rate() local
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| H A D | clk_rk3036.c | 47 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
63 const struct pll_div *div) in rkclk_set_pll()
246 uint div, mux; in rockchip_mmc_get_clk() local
313 u32 div, con; in rk3036_spi_get_clk() local
325 int div; in rk3036_spi_set_clk() local
339 u32 con, div, sel, parent; in rockchip_dclk_lcdc_get_clk() local
371 u32 con, div, sel, parent; in rockchip_aclk_lcdc_get_clk() local
404 u32 div, con, parent; in rk3036_peri_get_clk() local
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| H A D | clk_rk3368.c | 62 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
141 static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div) in pll_para_config()
250 const struct pll_div *div) in rkclk_set_pll()
295 u32 div, con, con_id, rate; in rk3368_mmc_get_clk() local
358 u32 div = DIV_ROUND_UP(parent_rate, rate); in rk3368_mmc_find_best_rate_and_parent() local
390 u32 con_id, mux = 0, div = 0; in rk3368_mmc_set_clk() local
462 u8 div; in rk3368_gmac_set_clk() local
517 u32 div, val; in rk3368_spi_get_clk() local
565 u32 div, val; in rk3368_saradc_get_clk() local
590 u32 div, con, parent; in rk3368_bus_get_clk() local
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| H A D | clk_px30.c | 51 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
300 u32 div, con; in px30_i2c_get_clk() local
522 u32 div, con; in px30_nandc_get_clk() local
554 u32 div, con, con_id; in px30_mmc_get_clk() local
627 u32 div, con; in px30_sfc_get_clk() local
653 u32 div, con; in px30_pwm_get_clk() local
706 u32 div, con; in px30_saradc_get_clk() local
732 u32 div, con; in px30_tsadc_get_clk() local
758 u32 div, con; in px30_spi_get_clk() local
811 u32 div, con, parent; in px30_vop_get_clk() local
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| H A D | clk_rk322x.c | 22 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
145 uint div, mux; in rk322x_mmc_get_clk() local
195 u8 div; in rk322x_mac_set_clk() local
273 u32 div, con, parent; in rk322x_bus_get_clk() local
351 u32 div, con, parent; in rk322x_peri_get_clk() local
424 u32 div, con, parent; in rk322x_spi_get_clk() local
436 int div; in rk322x_spi_set_clk() local
451 u32 div, con, sel, parent; in rk322x_vop_get_clk() local
532 u32 div, con, parent; in rk322x_crypto_get_clk() local
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| /OK3568_Linux_fs/kernel/drivers/clk/ti/ |
| H A D | divider.c | 80 unsigned int div) in _get_table_val()
90 static unsigned int _get_val(struct clk_omap_divider *divider, u8 div) in _get_val()
105 unsigned int div, val; in ti_clk_divider_recalc_rate() local
128 unsigned int div) in _is_valid_table_div()
138 static bool _is_valid_div(struct clk_omap_divider *divider, unsigned int div) in _is_valid_div()
152 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); in _div_round_up() local
237 int div; in ti_clk_divider_round_rate() local
247 unsigned int div, value; in ti_clk_divider_set_rate() local
318 struct clk_omap_divider *div) in _register_divider()
396 struct clk_omap_divider *div) in ti_clk_get_div_table()
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| /OK3568_Linux_fs/kernel/drivers/clk/ |
| H A D | clk-divider.c | 105 unsigned int div) in _get_table_val()
116 unsigned int div, unsigned long flags, u8 width) in _get_val()
134 unsigned int div; in divider_recalc_rate() local
162 unsigned int div) in _is_valid_table_div()
172 static bool _is_valid_div(const struct clk_div_table *table, unsigned int div, in _is_valid_div()
182 static int _round_up_table(const struct clk_div_table *table, int div) in _round_up_table()
200 static int _round_down_table(const struct clk_div_table *table, int div) in _round_down_table()
222 int div = DIV_ROUND_UP_ULL((u64)parent_rate, rate); in _div_round_up() local
275 static int _next_div(const struct clk_div_table *table, int div, in _next_div()
350 int div; in divider_round_rate_parent() local
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| /OK3568_Linux_fs/kernel/drivers/clk/berlin/ |
| H A D | berlin2-div.c | 67 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_is_enabled() local
85 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_enable() local
104 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_disable() local
121 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_set_parent() local
152 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_get_parent() local
179 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_recalc_rate() local
236 struct berlin2_div *div; in berlin2_div_register() local
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| /OK3568_Linux_fs/kernel/drivers/clk/imx/ |
| H A D | clk-divider-gate.c | 21 struct clk_divider *div = to_clk_divider(hw); in to_clk_divider_gate() local
29 struct clk_divider *div = to_clk_divider(hw); in clk_divider_gate_recalc_rate_ro() local
45 struct clk_divider *div = to_clk_divider(hw); in clk_divider_gate_recalc_rate() local
77 struct clk_divider *div = to_clk_divider(hw); in clk_divider_gate_set_rate() local
106 struct clk_divider *div = to_clk_divider(hw); in clk_divider_enable() local
129 struct clk_divider *div = to_clk_divider(hw); in clk_divider_disable() local
146 struct clk_divider *div = to_clk_divider(hw); in clk_divider_is_enabled() local
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| H A D | clk-pllv3.c | 114 u32 div = (readl_relaxed(pll->base) >> pll->div_shift) & pll->div_mask; in clk_pllv3_recalc_rate() local
132 u32 val, div; in clk_pllv3_set_rate() local
162 u32 div = readl_relaxed(pll->base) & pll->div_mask; in clk_pllv3_sys_recalc_rate() local
173 u32 div; in clk_pllv3_sys_round_rate() local
190 u32 val, div; in clk_pllv3_sys_set_rate() local
219 u32 div = readl_relaxed(pll->base) & pll->div_mask; in clk_pllv3_av_recalc_rate() local
234 u32 div; in clk_pllv3_av_round_rate() local
266 u32 val, div; in clk_pllv3_av_set_rate() local
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-s5pc1xx/ |
| H A D | clock.c | 138 unsigned long div; in s5pc110_get_arm_clk() local
158 unsigned long div; in s5pc100_get_arm_clk() local
181 uint div, d0_bus_ratio; in get_hclk() local
198 uint div, d1_bus_ratio, pclkd1_ratio; in get_pclkd1() local
219 unsigned int div; in get_hclk_sys() local
248 unsigned int div; in get_pclk_sys() local
324 void set_mmc_clk(int dev_index, unsigned int div) in set_mmc_clk()
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| /OK3568_Linux_fs/kernel/drivers/clk/mxs/ |
| H A D | clk-div.c | 38 struct clk_div *div = to_clk_div(hw); in clk_div_recalc_rate() local
46 struct clk_div *div = to_clk_div(hw); in clk_div_round_rate() local
54 struct clk_div *div = to_clk_div(hw); in clk_div_set_rate() local
73 struct clk_div *div; in mxs_clk_div() local
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| /OK3568_Linux_fs/kernel/drivers/clk/qcom/ |
| H A D | clk-regmap-mux-div.c | 23 int mux_div_set_src_div(struct clk_regmap_mux_div *md, u32 src, u32 div) in mux_div_set_src_div()
60 u32 *div) in mux_div_get_src_div()
92 unsigned int i, div, max_div; in mux_div_determine_rate() local
129 u32 div, max_div, best_src = 0, best_div = 0; in __mux_div_set_rate_and_parent() local
167 u32 i, div, src = 0; in mux_div_get_parent() local
206 u32 div, src; in mux_div_recalc_rate() local
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| /OK3568_Linux_fs/kernel/drivers/clk/bcm/ |
| H A D | clk-kona.c | 58 static inline u64 scaled_div_value(struct bcm_clk_div *div, u32 reg_div) in scaled_div_value()
68 u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value, u32 billionths) in scaled_div_build()
83 scaled_div_min(struct bcm_clk_div *div) in scaled_div_min()
92 u64 scaled_div_max(struct bcm_clk_div *div) in scaled_div_max()
109 divider(struct bcm_clk_div *div, u64 scaled_div) in divider()
119 scale_rate(struct bcm_clk_div *div, u32 rate) in scale_rate()
564 static u64 divider_read_scaled(struct ccu_data *ccu, struct bcm_clk_div *div) in divider_read_scaled()
592 struct bcm_clk_div *div, struct bcm_clk_trig *trig) in __div_commit()
648 struct bcm_clk_div *div, struct bcm_clk_trig *trig) in div_init()
656 struct bcm_clk_div *div, struct bcm_clk_trig *trig, in divider_write()
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| /OK3568_Linux_fs/kernel/drivers/clk/sunxi/ |
| H A D | clk-sunxi.c | 35 u8 div; in sun4i_get_pll1_factors() local
159 u8 div; in sun8i_a23_get_pll1_factors() local
203 u8 div; in sun4i_get_pll5_factors() local
230 u8 div; in sun6i_a31_get_pll6_factors() local
251 u32 div; in sun5i_a13_get_ahb_factors() local
290 u8 div, calcp, calcm = 1; in sun6i_get_ahb1_factors() local
348 int div; in sun4i_get_apb1_factors() local
386 u8 div, calcm, calcp; in sun7i_a20_get_out_factors() local
890 } div[SUNXI_DIVS_MAX_QTY]; member
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| /OK3568_Linux_fs/kernel/drivers/clk/tegra/ |
| H A D | clk-tegra20-emc.c | 57 u32 val, div; in emc_recalc_rate() local
75 u32 val, div; in emc_set_parent() local
105 u32 val, div; in emc_set_rate() local
138 u32 val, div; in emc_set_rate_and_parent() local
175 int div; in emc_determine_rate() local
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