| #
d55257ee |
| 27-Apr-2020 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: nand: Support using BBT in flash
Change-Id: I67c8859a711156d1264f783ec2749139999228f3 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
e9e0746f |
| 27-Apr-2020 |
Joseph Chen <chenjh@rock-chips.com> |
Merge branch 'next-dev' into thunder-boot
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| #
85c83705 |
| 27-Apr-2020 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: nand: Fix nanddev_neraseblocks()
nanddev_neraseblocks() currently returns the number pages per LUN instead of the total number of eraseblocks.
Change-Id: Id5ec7cd7170dae28acbfa568941ffea8e8907
mtd: nand: Fix nanddev_neraseblocks()
nanddev_neraseblocks() currently returns the number pages per LUN instead of the total number of eraseblocks.
Change-Id: Id5ec7cd7170dae28acbfa568941ffea8e8907361 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
87a1a21d |
| 16-Aug-2018 |
Boris Brezillon <boris.brezillon@bootlin.com> |
UPSTREAM: mtd: nand: Pass mode information to nand_page_io_req
The NAND sub-layers are likely to need the MTD_OPS_XXX mode information in order to decide if they should enable/disable ECC or how the
UPSTREAM: mtd: nand: Pass mode information to nand_page_io_req
The NAND sub-layers are likely to need the MTD_OPS_XXX mode information in order to decide if they should enable/disable ECC or how they should place the OOB bytes in the provided OOB buffer.
Add a field to nand_page_io_req to pass this information.
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Change-Id: Idb70434140c0304cfc97d7f3c52cbeca349fdff8 Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit f86787280b37e381f8d82f48583434d62dd16e27)
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| #
ed99f773 |
| 16-Aug-2018 |
Boris Brezillon <boris.brezillon@bootlin.com> |
UPSTREAM: mtd: nand: Add core infrastructure to deal with NAND devices
Add an intermediate layer to abstract NAND device interface so that some logic can be shared between SPI NANDs, parallel/raw NA
UPSTREAM: mtd: nand: Add core infrastructure to deal with NAND devices
Add an intermediate layer to abstract NAND device interface so that some logic can be shared between SPI NANDs, parallel/raw NANDs, OneNANDs, ...
Change-Id: I0c2b2e3ddae912756a35aac2741dd1ce8a243b35 Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit b95db8d33a1e920801816e47ffc5c6f18acce024)
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| #
b48ce100 |
| 21-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
UPSTREAM: mtd: nand: introduce NAND_ROW_ADDR_3 flag
Several drivers check ->chipsize to see if the third row address cycle is needed. Instead of embedding magic sizes such as 32MB, 128MB in drivers
UPSTREAM: mtd: nand: introduce NAND_ROW_ADDR_3 flag
Several drivers check ->chipsize to see if the third row address cycle is needed. Instead of embedding magic sizes such as 32MB, 128MB in drivers, introduce a new flag NAND_ROW_ADDR_3 for clean-up. Since nand_scan_ident() knows well about the device, it can handle this properly. The flag is set if the row address bit width is greater than 16.
Delete comments such as "One more address cycle for ..." because intention is now clear enough from the code.
Change-Id: I46c6ce88e75faf27564297bcd8f69f34407feff7 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Wenyou Yang <wenyou.yang@microchip.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 14157f861437ebe2d624b0a845b91bbdf8ca9a2d] Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit e6001371d1603f00a98af9e6dd73abdbbffd2784)
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| #
2416d1a3 |
| 21-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
UPSTREAM: mtd: nand: add generic helpers to check, match, maximize ECC settings
Driver are responsible for setting up ECC parameters correctly. Those include: - Check if ECC parameters specified (
UPSTREAM: mtd: nand: add generic helpers to check, match, maximize ECC settings
Driver are responsible for setting up ECC parameters correctly. Those include: - Check if ECC parameters specified (usually by DT) are valid - Meet the chip's ECC requirement - Maximize ECC strength if NAND_ECC_MAXIMIZE flag is set
The logic can be generalized by factoring out common code.
This commit adds 3 helpers to the NAND framework: nand_check_ecc_caps - Check if preset step_size and strength are valid nand_match_ecc_req - Match the chip's requirement nand_maximize_ecc - Maximize the ECC strength
To use the helpers above, a driver needs to provide: - Data array of supported ECC step size and strength - A hook that calculates ECC bytes from the combination of step_size and strength.
By using those helpers, code duplication among drivers will be reduced.
Change-Id: I74551caae9c08de925327b8550221e5c75d123c2 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 2c8f8afa7f92acb07641bf95b940d384ed1d0294] Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 470c29d1c28d23bdd86456bc431b8f26f8727903)
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| #
61083dd4 |
| 21-Nov-2017 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
UPSTREAM: mtd: nand: Pass the CS line to ->setup_data_interface()
Some NAND controllers can assign different NAND timings to different CS lines. Pass the CS line information to ->setup_data_interfac
UPSTREAM: mtd: nand: Pass the CS line to ->setup_data_interface()
Some NAND controllers can assign different NAND timings to different CS lines. Pass the CS line information to ->setup_data_interface() so that the NAND controller driver knows which CS line is concerned by the setup_data_interface() request.
Change-Id: I752cbd4374e56b0370bdbfa3ecb207f6ec1f5145 Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 104e442a67cfba4d0cc982384761befb917fb6a1] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 52cde35b9645e60a0c8e4040136476c4f9804110)
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| #
206756d4 |
| 21-Nov-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
UPSTREAM: mtd: nand: allow drivers to request minimum alignment for passed buffer
In some cases, nand_do_{read,write}_ops is passed with unaligned ops->datbuf. Drivers using DMA will be unhappy abo
UPSTREAM: mtd: nand: allow drivers to request minimum alignment for passed buffer
In some cases, nand_do_{read,write}_ops is passed with unaligned ops->datbuf. Drivers using DMA will be unhappy about unaligned buffer.
The new struct member, buf_align, represents the minimum alignment the driver require for the buffer. If the buffer passed from the upper MTD layer does not have enough alignment, nand_do_*_ops will use bufpoi.
Change-Id: I83feb4e3fe7d612b3fc2ec46008f540834f2c185 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 477544c62a84d3bacd9f90ba75ffc16c04d78071] Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 436fb2b84dc24853298f1768c596f7ee02d582d7)
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| #
79393803 |
| 21-Nov-2017 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
UPSTREAM: mtd: nand: Drop the ->errstat() hook
The ->errstat() hook is no longer implemented NAND controller drivers. Get rid of it before someone starts abusing it.
Change-Id: I6920981bf0c7c0fad9b
UPSTREAM: mtd: nand: Drop the ->errstat() hook
The ->errstat() hook is no longer implemented NAND controller drivers. Get rid of it before someone starts abusing it.
Change-Id: I6920981bf0c7c0fad9b017f83a3a075ad898d9be Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 7d135bcced20be2b50128432c5426a7278ec4f6d] [masahiro: modify davinci_nand.c for U-Boot] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 94b50a8aae1a6e1514cb39ecb2d2aec0824582f6)
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| #
271c54fd |
| 21-Nov-2017 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
UPSTREAM: mtd: nand: Drop unused cached programming support
Cached programming is always skipped, so drop the associated code until we decide to really support it.
Change-Id: Ife766710fad3e88ccc2e1
UPSTREAM: mtd: nand: Drop unused cached programming support
Cached programming is always skipped, so drop the associated code until we decide to really support it.
Change-Id: Ife766710fad3e88ccc2e156aeb7f46924c44fd2d Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 0b4773fd1649e0d418275557723a7ef54f769dc9] [masahiro: modify davinci_nand.c for U-Boot] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 4d75596e6d27315a05253d85e870d28cda972d45)
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| #
5f649222 |
| 21-Nov-2017 |
Marc Gonzalez <marc_gonzalez@sigmadesigns.com> |
UPSTREAM: mtd: nand: Support controllers with custom page
If your controller already sends the required NAND commands when reading or writing a page, then the framework is not supposed to send READ0
UPSTREAM: mtd: nand: Support controllers with custom page
If your controller already sends the required NAND commands when reading or writing a page, then the framework is not supposed to send READ0 and SEQIN/PAGEPROG respectively.
Change-Id: I55b5e5f4fbe1f417b60794c234ffdb48c7900d70 Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 3371d663bb4579f1b2003a92162edd6d90edd089] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 1fb87de83dd6e76307e110100f265deb2d8d8163)
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| #
c47e7cbb |
| 21-Nov-2017 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
UPSTREAM: mtd: nand: Add a few more timings to nand_sdr_timings
Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the nand_sdr_timings struct. Assign default/safe values for the staticall
UPSTREAM: mtd: nand: Add a few more timings to nand_sdr_timings
Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the nand_sdr_timings struct. Assign default/safe values for the statically defined timings, and extract them from the ONFI parameter table if the NAND is ONFI compliant.
Change-Id: Id5d29cfbab072d3500f23a997e63b1ba6e5b64ff Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> [Linux commit: 204e7ecd47e26cc12d9e8e8a7e7a2eeb9573f0ba Fixup commit: 6d29231000bbe0fb9e4893a9c68151ffdd3b5469] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 6f84b26b53afa207092a8906fa08f4c78d65afb6)
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| #
36efa0cc |
| 21-Nov-2017 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
UPSTREAM: mtd: nand: Fix data interface configuration logic
When changing from one data interface setting to another, one has to ensure a specific sequence which is described in the ONFI spec.
One
UPSTREAM: mtd: nand: Fix data interface configuration logic
When changing from one data interface setting to another, one has to ensure a specific sequence which is described in the ONFI spec.
One of these constraints is that the CE line has go high after a reset before a command can be sent with the new data interface setting, which is not guaranteed by the current implementation.
Rework the nand_reset() function and all the call sites to make sure the CE line is asserted and released when required.
Also make sure to actually apply the new data interface setting on the first die.
Change-Id: I5c8bd5b3342823510771c9fbb9fa637208cce037 Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Fixes: d8e725dd8311 ("mtd: nand: automate NAND timings selection") Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> [Linux commit: 73f907fd5fa56b0066d199bdd7126bbd04f6cd7b] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 3d841b3214565640ada80baa0f73885cddd216be)
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| #
38657f6e |
| 21-Nov-2017 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
UPSTREAM: mtd: nand: automate NAND timings selection
The NAND framework provides several helpers to query timing modes supported by a NAND chip, but this implies that all NAND controller drivers hav
UPSTREAM: mtd: nand: automate NAND timings selection
The NAND framework provides several helpers to query timing modes supported by a NAND chip, but this implies that all NAND controller drivers have to implement the same timings selection dance. Also currently NAND devices can be resetted at arbitrary places which also resets the timing for ONFI chips to timing mode 0.
Provide a common logic to select the best timings based on ONFI or ->onfi_timing_mode_default information. Hook this into nand_reset() to make sure the new timing is applied each time during a reset.
NAND controller willing to support timings adjustment should just implement the ->setup_data_interface() method.
Change-Id: I9a70d62e3e7144d348ee98bb15cc70f2d229eb65 Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [Linux commit: d8e725dd831186a3595036b2b1df9f68cbc6efa3] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 27c4792cd233ba68fa15aaa885d0f53db7b5728a)
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| #
0f9f2da3 |
| 21-Nov-2017 |
Sascha Hauer <s.hauer@pengutronix.de> |
UPSTREAM: mtd: nand: Expose data interface for ONFI mode 0
The nand layer will need ONFI mode 0 to use it as timing mode before and right after reset.
Change-Id: If79882c9ae5256c817f331157bf108148b
UPSTREAM: mtd: nand: Expose data interface for ONFI mode 0
The nand layer will need ONFI mode 0 to use it as timing mode before and right after reset.
Change-Id: If79882c9ae5256c817f331157bf108148b214b39 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 6e1f9708dbf3c50a8da93c1952a01a7a2acb5e66] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit b893e83330662393ff40d4dc8cb2733599beb26a)
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| #
e56ea81c |
| 21-Nov-2017 |
Sascha Hauer <s.hauer@pengutronix.de> |
UPSTREAM: mtd: nand: convert ONFI mode into data interface
struct nand_data_interface is the designated type to pass to the NAND drivers to configure the timing. To simplify further patches convert
UPSTREAM: mtd: nand: convert ONFI mode into data interface
struct nand_data_interface is the designated type to pass to the NAND drivers to configure the timing. To simplify further patches convert the onfi_sdr_timings array from type struct nand_sdr_timings nand_data_interface.
Change-Id: I9c9422bf02986844e3f6b57381ca62ed9c5a66b7 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: b1dd3ca203fccd111926c3f6ac59bf903ec62b05] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 46deff57da190fee1a902ecfbf951cd4cfe8494e)
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| #
2b175343 |
| 21-Nov-2017 |
Sascha Hauer <s.hauer@pengutronix.de> |
UPSTREAM: mtd: nand: Create a NAND reset function
When NAND devices are resetted some initialization may have to be done, like for example they have to be configured for the timing mode that shall b
UPSTREAM: mtd: nand: Create a NAND reset function
When NAND devices are resetted some initialization may have to be done, like for example they have to be configured for the timing mode that shall be used. To get a common place where this initialization can be implemented create a nand_reset() function. This currently only issues a NAND_CMD_RESET to the NAND device. The places issuing this command manually are replaced with a call to nand_reset().
Change-Id: Id5e060d521d5f7835e928633515e6f4a02ba72fa Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Linux commit: 2f94abfe35b210e7711af9202a3dcfc9e779219a] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 1728eb577dc1de459196ca45068f3feced77a198)
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| #
5e8564cf |
| 21-Nov-2017 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
UPSTREAM: mtd: nand: Add an option to maximize the ECC strength
The generic NAND DT bindings allows one to tweak the ECC strength and step size to their need. It can be used to lower the ECC strengt
UPSTREAM: mtd: nand: Add an option to maximize the ECC strength
The generic NAND DT bindings allows one to tweak the ECC strength and step size to their need. It can be used to lower the ECC strength to match a bootloader/firmware config, but might also be used to get a better reliability.
In the latter case, the user might want to use the maximum ECC strength without having to explicitly calculate the exact value (this value not only depends on the OOB size, but also on the NAND controller, and can be tricky to extract).
Add a generic 'nand-ecc-maximize' DT property and the associated NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best ECC strength and step-size on their own.
Change-Id: I9303c1f99c9abc0656cf25825bb2d70b40aaf00d Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> [Linux commit: ba78ee00e1ff84de9b3ad33edbd3ec599099ee82] [masahiro: of_property_read_bool -> fdt_getprop for U-Boot] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 19d30ded88fb8b89c8426e6d95ded19ba900f314)
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| #
b5bf5cb3 |
| 21-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: use #include <...> to include public headers
We are supposed to use #include <...> to include headers in the public include paths. We should use #include "..." only for headers in local d
treewide: use #include <...> to include public headers
We are supposed to use #include <...> to include headers in the public include paths. We should use #include "..." only for headers in local directories.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
fd42e1b5 |
| 25-Jul-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-nand-flash
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| #
c1fe6b5b |
| 15-Jun-2016 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
mtd: nand: Increase the max OOB size
Some NANDs are now exposing 1664 OOB bytes per page. Adjust the NAND_MAX_OOBSIZE value accordingly.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electro
mtd: nand: Increase the max OOB size
Some NANDs are now exposing 1664 OOB bytes per page. Adjust the NAND_MAX_OOBSIZE value accordingly.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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| #
42bd19ce |
| 15-Jun-2016 |
Brian Norris <computersforpeace@gmail.com> |
mtd: nand: add common DT init code
These are already-documented common bindings for NAND chips. Let's handle them in nand_base.
If NAND controller drivers need to act on this data before bringing u
mtd: nand: add common DT init code
These are already-documented common bindings for NAND chips. Let's handle them in nand_base.
If NAND controller drivers need to act on this data before bringing up the NAND chip (e.g., fill out ECC callback functions, change HW modes, etc.), then they can do so between calling nand_scan_ident() and nand_scan_tail().
The original commit has been slightly reworked to use the fdtdec_xxx() helpers (instead of the of_xxxx() ones).
Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
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| #
dc557e9a |
| 18-Jun-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
715b3a9b |
| 04-Jun-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-nand-flash
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