usb: dwc3: Disable suspend usb2 phy for rockchip platform

The rockchip SoCs need to disable usb2 phy enter suspend
mode which depends on the dwc3 suspend condition, otherwise
the usb2 phy doesn't ge

usb: dwc3: Disable suspend usb2 phy for rockchip platform

The rockchip SoCs need to disable usb2 phy enter suspend
mode which depends on the dwc3 suspend condition, otherwise
the usb2 phy doesn't get out of suspend and cause U-Boot
panic with the following log when scan some udisks.

XHCI timeout on event type 33... cannot recover.
BUG: failure at drivers/usb/host/xhci-ring.c:474/xhci_wait_for_event()!
BUG!

Change-Id: I54e5e1bafc93ebac4ce4076d6a60bf1e5d36ef3d
Signed-off-by: William Wu <william.wu@rock-chips.com>

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UPSTREAM: usb: dwc3: gadget: fix crash in dwc3_gadget_giveback()

If the ep0 stalls or request are dequeued when gagdet is stopped,
the request dma may not be mapped yet and dwc3_flush_cache() may be

UPSTREAM: usb: dwc3: gadget: fix crash in dwc3_gadget_giveback()

If the ep0 stalls or request are dequeued when gagdet is stopped,
the request dma may not be mapped yet and dwc3_flush_cache() may be
called with a NULL pointer.

Check req->request.dma before calling dwc3_flush_cache() and later
the usb_gadget_unmap_request() functions since it means that
usb_gadget_map_request() hasn't been called yet.

Fixes: fd15b58c1a9 ("dwc3: flush cache only if there is a buffer attached to a request")
Change-Id: I08df172aaea16bd09f3c9596576d3b45f7338caa
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20240528-topic-sm8x50-dwc3-gadget-crash-fix-v1-1-58434ab4b3d3@linaro.org
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>
(cherry picked from commit 85ced6f4745f529098cae38a5bd3144035a1318c)

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usb: dwc3-generic: Add rk3576 support

RK3576 share glue and ctrl in a single node. Use glue_get_ctrl_dev to
return the glue node as the ctrl node.

Signed-off-by: Frank Wang <frank.wang@rock-chips.c

usb: dwc3-generic: Add rk3576 support

RK3576 share glue and ctrl in a single node. Use glue_get_ctrl_dev to
return the glue node as the ctrl node.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Change-Id: I6fd1cd2accd4b0becc927309d089a1f51ac685ad

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UPSTREAM: usb: dwc3-generic: Export glue structures and functions

In order to allow external SoC-dependent glue drivers to use dwc3-generic
functions, push the glue structures and export the functio

UPSTREAM: usb: dwc3-generic: Export glue structures and functions

In order to allow external SoC-dependent glue drivers to use dwc3-generic
functions, push the glue structures and export the functions to a header
file.

The exported structures and functions are:

- struct dwc3_glue_data
- struct dwc3_glue_ops
- dwc3_glue_bind()
- dwc3_glue_probe()
- dwc3_glue_remove()

The SoC-dependent glue drivers can only define their own wrapper driver
and specify these functions. The drivers can also add their own compatible
strings and configure functions.

Change-Id: I0464fa8121a8ffc4d473f03be9940c5874f193be
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit ef2313b8a26e83c92a14b43b3b3bb1c7af017d98)

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UPSTREAM: usb: dwc3-generic: Add clock initialization in child DT node

Same as the reset cotnrol, should add a clock initialization in child DT
node, if the glue node doesn't have any clocks.

Chang

UPSTREAM: usb: dwc3-generic: Add clock initialization in child DT node

Same as the reset cotnrol, should add a clock initialization in child DT
node, if the glue node doesn't have any clocks.

Change-Id: I7739e7e22f4063ede652ee8c09cb8254015f99c1
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit 7c71c684ce697dcb79efb7f027d820a6ab82228b)

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UPSTREAM: usb: dwc3-generic: Allow different controller DT node pattern

The most of devicetree has the following USB node structure.
The controller node is placed as a child node of the glue node.
C

UPSTREAM: usb: dwc3-generic: Allow different controller DT node pattern

The most of devicetree has the following USB node structure.
The controller node is placed as a child node of the glue node.
Current dwc3-generic driver works on this premise.

glue {
/* glue node */
usb {
/* controller node */
};
};

However, UniPhier original devicetree has the following USB node structure.
The controller node is separately placed from the glue node.

usb {
/* controller node */
};
glue {
/* glue node */
};

In dwc_glue_bind(), this patch provides .glue_get_ctrl_dev() callback to
get such a controller node and binds the driver related to the node.

If this callback isn't defined, dwc_glue_bind() looks for the controller
nodes from the child nodes, as before.

Change-Id: I49d00bf54cbe7d48a09fb3f24bfee0bee7a04a8f
Suggested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit f7b7c721332c2e262035d306296d53c2511763a0)

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UPSTREAM: usb: dwc3: Rename .select_dr_mode to .glue_configure

Rename the select_dr_mode callback to glue_configure, the callback is
used for more than enforcing controller mode even on the TI chips

UPSTREAM: usb: dwc3: Rename .select_dr_mode to .glue_configure

Rename the select_dr_mode callback to glue_configure, the callback is
used for more than enforcing controller mode even on the TI chips, so
change the name to a more generic one. No functional change.

Change-Id: Ia08f59500c1840dd7505c94f1e10dc206783053e
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Angus Ainslie <angus@akkea.ca>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(cherry picked from commit f1ef95591c29c1324415dc0a61254160d7d9290a)

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usb: dwc3: gadget: Fix non-multiple maxpacket len for out req

If the length of OUT request isn't a multiple of
MaxPacketSize, the current code round up to multiple
of MaxPacketSize as the OUT transf

usb: dwc3: gadget: Fix non-multiple maxpacket len for out req

If the length of OUT request isn't a multiple of
MaxPacketSize, the current code round up to multiple
of MaxPacketSize as the OUT transfer's buffer size,
but in the transfer complete handler, it still use
the original req length to calculate the actual length
of the transfer, and get a wrong actual length.

This patch use the transfer's buffer size to calculate
the actual length of the OUT request.

Fixes: 5433dc646a26 ("usb: dwc3: gadget: fix TRB buffer to multiple of MaxPacketSize")
Change-Id: I5132ee53044d16edd1bd26ccec3e4d98aba1d7c5
Signed-off-by: William Wu <william.wu@rock-chips.com>

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usb: dwc3: gadget: Print usb speed info

Some rockchip platforms support rockusb max speed at usb3.
For usb2 enumeration, print 'high-speed'.
For usb3 enumeration, print 'super-speed'.

Change-Id: I6

usb: dwc3: gadget: Print usb speed info

Some rockchip platforms support rockusb max speed at usb3.
For usb2 enumeration, print 'high-speed'.
For usb3 enumeration, print 'super-speed'.

Change-Id: I6f54d30c1234fa1676c225ae76431598e4653380
Signed-off-by: William Wu <william.wu@rock-chips.com>

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usb: rockusb: Add support for usb3 download

This patch improve the usb gadget drivers and the usb
dwc3 controller drivers to support rockusb usb3 download
images.

With this patch, it can support:
1

usb: rockusb: Add support for usb3 download

This patch improve the usb gadget drivers and the usb
dwc3 controller drivers to support rockusb usb3 download
images.

With this patch, it can support:
1. Maskrom usbplug usb2 switch to usb3 automatically
if the boards and the upgrade tool support usb3.

2. Loader enter usb3 automatically if the boards support usb3.

3. Force Maskrom/Loader usb fall back to usb2 if wait
for usb3 enumeration time out.

Signed-off-by: Jianwei Zheng <jianwei.zheng@rock-chips.com>
Signed-off-by: william.wu <william.wu@rock-chips.com>
Change-Id: I9ad13fb42ae59cc9075545e22627f237f0eb1f32

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usb: dwc3: gadget: fix dcache invalidate for event buffer

The second parameter of invalidate_dcache_range() is the end address
to invalidate up to not the invalidation length, so wrap a new API
dwc3

usb: dwc3: gadget: fix dcache invalidate for event buffer

The second parameter of invalidate_dcache_range() is the end address
to invalidate up to not the invalidation length, so wrap a new API
dwc3_invalidate_cache() make the driver easy to use.

Move up the invalidation operation into event buffer check instead of
event buffer process to reduce the invoked times.

Fixes: 0e7e455ba5bd ("usb: dwc3: invalidate dcache before read event buffer")
Change-Id: I299740e5d15e1f1841d5b33cd1cd2f9e34ebcc12
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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usb: dwc3: fix the the gadget max_speed

The maximum_speed of the dwc is always valid since it configured from
DTB or dwc3_device structure, and the gadget max_speed should keep same
with the dwc dev

usb: dwc3: fix the the gadget max_speed

The maximum_speed of the dwc is always valid since it configured from
DTB or dwc3_device structure, and the gadget max_speed should keep same
with the dwc device maximum_speed, so fix it.

Change-Id: If207f8f10b8362728577d4e49981c74634e88ecf
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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usb: dwc3: disable usb3 phy entering suspend mode

For some Rokchip SoCs like RK3588, if the USB3 PHY enters suspend mode
in U-Boot would cause the PHY initialize abortively in Linux Kernel.
So disab

usb: dwc3: disable usb3 phy entering suspend mode

For some Rokchip SoCs like RK3588, if the USB3 PHY enters suspend mode
in U-Boot would cause the PHY initialize abortively in Linux Kernel.
So disable the DWC3_GUSB3PIPECTL_SUSPHY feature in dwc3 core init
process to fix it.

Change-Id: I14d9446c7d6b408544a05ad3a70a63ed3318564e
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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usb: dwc3: invalidate dcache before read event buffer

The dcache of the event buffer contents may be dirty when cpu read them
in interrupt thread after the controller has been touched, so invalidate

usb: dwc3: invalidate dcache before read event buffer

The dcache of the event buffer contents may be dirty when cpu read them
in interrupt thread after the controller has been touched, so invalidate
the dcache before read to fix it.

Change-Id: Ib8c4865ddf0fda03f799540eb96772e23257ec75
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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usb: dwc3: gadget: start new transfer on XFER_COMPLETE

In current code, the next transfer in dwc3 queue needs to wait for a
following XFERNOTREADY event coming after the current transfer is
complete

usb: dwc3: gadget: start new transfer on XFER_COMPLETE

In current code, the next transfer in dwc3 queue needs to wait for a
following XFERNOTREADY event coming after the current transfer is
completed. However, the gadget in U-Boot awlays uses polling method
to check the DWC3 interrupt, so the gadget class driver is required
to poll dwc3 interrupt twice to check the XFERCOMPLETE and XFERNOTREADY
event separately in ping-pong buffer usage scenario.

So let start the new transfer in dwc3 request list right away when the
time we get to XFERCOMPLETE event for non-sync transfer, instead of
waiting for the following XFER_NOT_READY event.

Change-Id: I113c6551606acd4fc0d0fbafb84d066179eec587
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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usb: dwc3-generic: support host mode if dr_mode is otg

The Rockchip DWC3 controller only support DRD mode (Dual Role
Device), but not support OTG mode. So if the dr_mode in DTS is
configured to OTG,

usb: dwc3-generic: support host mode if dr_mode is otg

The Rockchip DWC3 controller only support DRD mode (Dual Role
Device), but not support OTG mode. So if the dr_mode in DTS is
configured to OTG, then we force it to Host mode. This patch
does not affect the device function of OTG, such as rockusb.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I806623aa9b0bb8b595417755db7d9c6b6c4f38f1

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usb: dwc3: do not use 3.0 clock when operating in 2.0 mode

In the 3.0 device core, if the core is programmed to operate in
2.0 only, then setting the GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK makes
the int

usb: dwc3: do not use 3.0 clock when operating in 2.0 mode

In the 3.0 device core, if the core is programmed to operate in
2.0 only, then setting the GUCTL1.DEV_FORCE_20_CLK_FOR_30_CLK makes
the internal 2.0(utmi/ulpi) clock to be routed as the 3.0 (pipe)
clock. Enabling this feature allows the pipe3 clock to be not-running
when forcibly operating in 2.0 device mode.

Change-Id: Ib93da14b5309ec094b952e03f8514817910fedfa
Signed-off-by: William Wu <william.wu@rock-chips.com>

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usb: dwc3: add make compatible for rockchip platform

RK3399 Type-C PHY is required that must hold whole USB3.0 OTG controller
in resetting to hold pipe power state in P2 before initializing the PHY.

usb: dwc3: add make compatible for rockchip platform

RK3399 Type-C PHY is required that must hold whole USB3.0 OTG controller
in resetting to hold pipe power state in P2 before initializing the PHY.
This commit fixed it and added device compatible for rockchip platform.

Change-Id: I2a546ac91632ea29d9ea88e94bfde948c387b834
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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FROMLIST: usb: Migrate to support live DT for some driver

Use ofnode_ instead of fdt_ APIs so that the drivers can support live DT.
This patch updates usb_get_dr_mode() and usb_get_maximum_speed() t

FROMLIST: usb: Migrate to support live DT for some driver

Use ofnode_ instead of fdt_ APIs so that the drivers can support live DT.
This patch updates usb_get_dr_mode() and usb_get_maximum_speed() to use
ofnode as parameter instead of fdt offset. And all the drivers who use
these APIs update to use live dt APIs at the same time.

Change-Id: I41a3fa52e8fdb99f7fc36b1bc0eb21ae82f90e63
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
(am from http://patchwork.ozlabs.org/patch/1248682/)

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usb: dwc3: amend UTMI/UTMIW phy interface setup

Let move 8/16-bit UTMI+ interface initialization into DWC3 core init
that is convenient for both DM_USB and u-boot traditional process.

Change-Id: I7

usb: dwc3: amend UTMI/UTMIW phy interface setup

Let move 8/16-bit UTMI+ interface initialization into DWC3 core init
that is convenient for both DM_USB and u-boot traditional process.

Change-Id: I7fe45af396098749b2acf4a885dff875dcbc6f63
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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usb: dwc3: add dis_u2_freeclk_exists_quirk

Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when

usb: dwc3: add dis_u2_freeclk_exists_quirk

Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when the clock control input is active.

Refer to commit 27f83eeb6b42("usb: dwc3: add dis_u2_freeclk_exists_quirk")
in Linux Rockchip Kernel.

Change-Id: Id90ac25a7e82bbf7918cc9658797c23008871852
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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usb: dwc3: add dis_enblslpm_quirk

Add a quirk to clear the GUSB2PHYCFG.ENBLSLPM bit, which controls
whether the PHY receives the suspend signal from the controller.

Refer to commit ec791d149bca("us

usb: dwc3: add dis_enblslpm_quirk

Add a quirk to clear the GUSB2PHYCFG.ENBLSLPM bit, which controls
whether the PHY receives the suspend signal from the controller.

Refer to commit ec791d149bca("usb: dwc3: Add dis_enblslpm_quirk")
in Linux Kernel.

Change-Id: If8bffb5a8dc1b02e4b3100dc722d14a3d9b74992
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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usb: dwc3: gadget: fix TRB buffer to multiple of MaxPacketSize

According to the chapter 8.2.3.3 of DWC3 Databook, the total size
of a Buffer Descriptor must be a multiple of MaxPacketSize for OUT
en

usb: dwc3: gadget: fix TRB buffer to multiple of MaxPacketSize

According to the chapter 8.2.3.3 of DWC3 Databook, the total size
of a Buffer Descriptor must be a multiple of MaxPacketSize for OUT
endpoints. This commit fixes it.

Change-Id: I7a4ae8ee73561c06cb4927cb83b4ae18a3f46c43
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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usb: dwc3: gadget: always enable CSP

CSP bit of TRB Control is useful for protocols such CDC EEM/ECM/NCM
where we're transferring in blocks of MTU-sized requests (usually MTU
is 1500 bytes).

We kno

usb: dwc3: gadget: always enable CSP

CSP bit of TRB Control is useful for protocols such CDC EEM/ECM/NCM
where we're transferring in blocks of MTU-sized requests (usually MTU
is 1500 bytes).

We know we will always have a short packet after two (for HS)
wMaxPacketSize packets and, usually, we will have a long(-ish) queue of
requests (for our g_ether gadget, we have at least 10 requests).

Instead of always stopping the queue processing to interrupt, giveback
and restart, let's tell dwc3 to interrupt but continue processing
following request if we have anything already pending in the queue.

Refer to commit ca4d44ea2a91 ("usb: dwc3: gadget: always enable CSP")
in Linux Kernel.

Change-Id: Icce79fa174f6d7f040e1c332fe6792a1922c5a04
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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usb: dwc3: add dis-u1u2-quirk to reject enter U1 and U2

The DWC3 with Innosilicon USB 3.0 PHY on Rockchip platforms
(e.g. rk3328, rk1808) has problem to exit to U0 state from
U1 or U2 state when DWC

usb: dwc3: add dis-u1u2-quirk to reject enter U1 and U2

The DWC3 with Innosilicon USB 3.0 PHY on Rockchip platforms
(e.g. rk3328, rk1808) has problem to exit to U0 state from
U1 or U2 state when DWC3 work as peripheral mode. This patch
adds a quirk to reject transition to U1 and U2 state to
workaround this issue.

Refer to commit aaa5c055cc06 ("usb: dwc3: add dis-u1u2-quirk to
reject enter U1 and U2") in Rockchip Linux Kernel-4.4 .

Change-Id: I1f4176caab3ccdc31ba7eb06684267833bf804db
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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