1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Generic DWC3 Glue layer 4 * 5 * Copyright (C) 2016 - 2018 Xilinx, Inc. 6 * 7 * Based on dwc3-omap.c. 8 */ 9 10 #include <common.h> 11 #include <asm-generic/io.h> 12 #include <dm.h> 13 #include <dm/device-internal.h> 14 #include <dm/lists.h> 15 #include <dwc3-uboot.h> 16 #include <linux/usb/ch9.h> 17 #include <linux/usb/gadget.h> 18 #include <malloc.h> 19 #include <usb.h> 20 #include "core.h" 21 #include "gadget.h" 22 #include <reset.h> 23 #include <clk.h> 24 #include <usb/xhci.h> 25 26 #include "dwc3-generic.h" 27 28 struct dwc3_generic_plat { 29 fdt_addr_t base; 30 u32 maximum_speed; 31 enum usb_dr_mode dr_mode; 32 }; 33 34 struct dwc3_generic_priv { 35 void *base; 36 struct dwc3 dwc3; 37 struct phy *phys; 38 int num_phys; 39 }; 40 41 struct dwc3_generic_host_priv { 42 struct xhci_ctrl xhci_ctrl; 43 struct dwc3_generic_priv gen_priv; 44 }; 45 46 static int dwc3_generic_probe(struct udevice *dev, 47 struct dwc3_generic_priv *priv) 48 { 49 int rc; 50 struct dwc3_generic_plat *plat = dev_get_platdata(dev); 51 struct dwc3 *dwc3 = &priv->dwc3; 52 struct dwc3_glue_data *glue = dev_get_platdata(dev->parent); 53 54 dwc3->dev = dev; 55 dwc3->maximum_speed = plat->maximum_speed; 56 dwc3->dr_mode = plat->dr_mode; 57 #if CONFIG_IS_ENABLED(OF_CONTROL) 58 dwc3_of_parse(dwc3); 59 #endif 60 61 /* 62 * It must hold whole USB3.0 OTG controller in resetting to hold pipe 63 * power state in P2 before initializing TypeC PHY on RK3399 platform. 64 */ 65 if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) { 66 reset_assert_bulk(&glue->resets); 67 udelay(1); 68 } 69 70 rc = dwc3_setup_phy(dev, &priv->phys, &priv->num_phys); 71 if (rc) 72 return rc; 73 74 if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) 75 reset_deassert_bulk(&glue->resets); 76 77 priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE); 78 dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START; 79 80 81 rc = dwc3_init(dwc3); 82 if (rc) { 83 unmap_physmem(priv->base, MAP_NOCACHE); 84 return rc; 85 } 86 87 return 0; 88 } 89 90 static int dwc3_generic_remove(struct udevice *dev, 91 struct dwc3_generic_priv *priv) 92 { 93 struct dwc3 *dwc3 = &priv->dwc3; 94 95 dwc3_remove(dwc3); 96 dwc3_shutdown_phy(dev, priv->phys, priv->num_phys); 97 unmap_physmem(dwc3->regs, MAP_NOCACHE); 98 99 return 0; 100 } 101 102 static int dwc3_generic_ofdata_to_platdata(struct udevice *dev) 103 { 104 struct dwc3_generic_plat *plat = dev_get_platdata(dev); 105 ofnode node = dev->node; 106 107 plat->base = dev_read_addr(dev); 108 109 plat->maximum_speed = usb_get_maximum_speed(node); 110 if (plat->maximum_speed == USB_SPEED_UNKNOWN) { 111 pr_info("No USB maximum speed specified. Using super speed\n"); 112 plat->maximum_speed = USB_SPEED_SUPER; 113 } 114 115 plat->dr_mode = usb_get_dr_mode(node); 116 if (plat->dr_mode == USB_DR_MODE_UNKNOWN) { 117 pr_err("Invalid usb mode setup\n"); 118 return -ENODEV; 119 } else if (plat->dr_mode != USB_DR_MODE_HOST && 120 !strcmp(dev->driver->name, "dwc3-generic-host")) { 121 pr_info("Set dr_mode to HOST\n"); 122 plat->dr_mode = USB_DR_MODE_HOST; 123 } 124 125 return 0; 126 } 127 128 #if CONFIG_IS_ENABLED(DM_USB_GADGET) 129 int dm_usb_gadget_handle_interrupts(struct udevice *dev) 130 { 131 struct dwc3_generic_priv *priv = dev_get_priv(dev); 132 struct dwc3 *dwc3 = &priv->dwc3; 133 134 dwc3_gadget_uboot_handle_interrupt(dwc3); 135 136 return 0; 137 } 138 139 static int dwc3_generic_peripheral_probe(struct udevice *dev) 140 { 141 struct dwc3_generic_priv *priv = dev_get_priv(dev); 142 143 return dwc3_generic_probe(dev, priv); 144 } 145 146 static int dwc3_generic_peripheral_remove(struct udevice *dev) 147 { 148 struct dwc3_generic_priv *priv = dev_get_priv(dev); 149 150 return dwc3_generic_remove(dev, priv); 151 } 152 153 U_BOOT_DRIVER(dwc3_generic_peripheral) = { 154 .name = "dwc3-generic-peripheral", 155 .id = UCLASS_USB_GADGET_GENERIC, 156 .ofdata_to_platdata = dwc3_generic_ofdata_to_platdata, 157 .probe = dwc3_generic_peripheral_probe, 158 .remove = dwc3_generic_peripheral_remove, 159 .priv_auto_alloc_size = sizeof(struct dwc3_generic_priv), 160 .platdata_auto_alloc_size = sizeof(struct dwc3_generic_plat), 161 }; 162 #endif 163 164 #if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD) 165 static int dwc3_generic_host_probe(struct udevice *dev) 166 { 167 struct xhci_hcor *hcor; 168 struct xhci_hccr *hccr; 169 struct dwc3_generic_host_priv *priv = dev_get_priv(dev); 170 int rc; 171 172 rc = dwc3_generic_probe(dev, &priv->gen_priv); 173 if (rc) 174 return rc; 175 176 hccr = (struct xhci_hccr *)priv->gen_priv.base; 177 hcor = (struct xhci_hcor *)(priv->gen_priv.base + 178 HC_LENGTH(xhci_readl(&(hccr)->cr_capbase))); 179 180 return xhci_register(dev, hccr, hcor); 181 } 182 183 static int dwc3_generic_host_remove(struct udevice *dev) 184 { 185 struct dwc3_generic_host_priv *priv = dev_get_priv(dev); 186 int rc; 187 188 rc = xhci_deregister(dev); 189 if (rc) 190 return rc; 191 192 return dwc3_generic_remove(dev, &priv->gen_priv); 193 } 194 195 U_BOOT_DRIVER(dwc3_generic_host) = { 196 .name = "dwc3-generic-host", 197 .id = UCLASS_USB, 198 .ofdata_to_platdata = dwc3_generic_ofdata_to_platdata, 199 .probe = dwc3_generic_host_probe, 200 .remove = dwc3_generic_host_remove, 201 .priv_auto_alloc_size = sizeof(struct dwc3_generic_host_priv), 202 .platdata_auto_alloc_size = sizeof(struct dwc3_generic_plat), 203 .ops = &xhci_usb_ops, 204 .flags = DM_FLAG_ALLOC_PRIV_DMA, 205 }; 206 #endif 207 208 void dwc3_ti_glue_configure(struct udevice *dev, int index, 209 enum usb_dr_mode mode) 210 { 211 #define USBOTGSS_UTMI_OTG_STATUS 0x0084 212 #define USBOTGSS_UTMI_OTG_OFFSET 0x0480 213 214 /* UTMI_OTG_STATUS REGISTER */ 215 #define USBOTGSS_UTMI_OTG_STATUS_SW_MODE BIT(31) 216 #define USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT BIT(9) 217 #define USBOTGSS_UTMI_OTG_STATUS_TXBITSTUFFENABLE BIT(8) 218 #define USBOTGSS_UTMI_OTG_STATUS_IDDIG BIT(4) 219 #define USBOTGSS_UTMI_OTG_STATUS_SESSEND BIT(3) 220 #define USBOTGSS_UTMI_OTG_STATUS_SESSVALID BIT(2) 221 #define USBOTGSS_UTMI_OTG_STATUS_VBUSVALID BIT(1) 222 enum dwc3_omap_utmi_mode { 223 DWC3_OMAP_UTMI_MODE_UNKNOWN = 0, 224 DWC3_OMAP_UTMI_MODE_HW, 225 DWC3_OMAP_UTMI_MODE_SW, 226 }; 227 228 u32 use_id_pin; 229 u32 host_mode; 230 u32 reg; 231 u32 utmi_mode; 232 u32 utmi_status_offset = USBOTGSS_UTMI_OTG_STATUS; 233 234 struct dwc3_glue_data *glue = dev_get_platdata(dev); 235 void *base = map_physmem(glue->regs, 0x10000, MAP_NOCACHE); 236 237 if (device_is_compatible(dev, "ti,am437x-dwc3")) 238 utmi_status_offset += USBOTGSS_UTMI_OTG_OFFSET; 239 240 utmi_mode = dev_read_u32_default(dev, "utmi-mode", 241 DWC3_OMAP_UTMI_MODE_UNKNOWN); 242 if (utmi_mode != DWC3_OMAP_UTMI_MODE_HW) { 243 debug("%s: OTG is not supported. defaulting to PERIPHERAL\n", 244 dev->name); 245 mode = USB_DR_MODE_PERIPHERAL; 246 } 247 248 switch (mode) { 249 case USB_DR_MODE_PERIPHERAL: 250 use_id_pin = 0; 251 host_mode = 0; 252 break; 253 case USB_DR_MODE_HOST: 254 use_id_pin = 0; 255 host_mode = 1; 256 break; 257 case USB_DR_MODE_OTG: 258 default: 259 use_id_pin = 1; 260 host_mode = 0; 261 break; 262 } 263 264 reg = readl(base + utmi_status_offset); 265 266 reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SW_MODE); 267 if (!use_id_pin) 268 reg |= USBOTGSS_UTMI_OTG_STATUS_SW_MODE; 269 270 writel(reg, base + utmi_status_offset); 271 272 reg &= ~(USBOTGSS_UTMI_OTG_STATUS_SESSEND | 273 USBOTGSS_UTMI_OTG_STATUS_VBUSVALID | 274 USBOTGSS_UTMI_OTG_STATUS_IDDIG); 275 276 reg |= USBOTGSS_UTMI_OTG_STATUS_SESSVALID | 277 USBOTGSS_UTMI_OTG_STATUS_POWERPRESENT; 278 279 if (!host_mode) 280 reg |= USBOTGSS_UTMI_OTG_STATUS_IDDIG | 281 USBOTGSS_UTMI_OTG_STATUS_VBUSVALID; 282 283 writel(reg, base + utmi_status_offset); 284 285 unmap_physmem(base, MAP_NOCACHE); 286 } 287 288 struct dwc3_glue_ops ti_ops = { 289 .glue_configure = dwc3_ti_glue_configure, 290 }; 291 292 static int dwc3_glue_bind_common(struct udevice *parent, ofnode node) 293 { 294 const char *name = ofnode_get_name(node); 295 const char *driver = NULL; 296 enum usb_dr_mode dr_mode; 297 struct udevice *dev; 298 int ret; 299 300 debug("%s: subnode name: %s\n", __func__, name); 301 302 /* if the parent node doesn't have a mode check the leaf */ 303 dr_mode = usb_get_dr_mode(dev_ofnode(parent)); 304 if (!dr_mode) 305 dr_mode = usb_get_dr_mode(node); 306 307 switch (dr_mode) { 308 case USB_DR_MODE_OTG: 309 #if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_USB_XHCI_HCD) 310 debug("%s: dr_mode: force to HOST\n", __func__); 311 driver = "dwc3-generic-host"; 312 break; 313 #endif 314 case USB_DR_MODE_PERIPHERAL: 315 #if CONFIG_IS_ENABLED(DM_USB_GADGET) 316 debug("%s: dr_mode: OTG or Peripheral\n", __func__); 317 driver = "dwc3-generic-peripheral"; 318 #endif 319 break; 320 #if defined(CONFIG_SPL_USB_HOST) || !defined(CONFIG_SPL_BUILD) 321 case USB_DR_MODE_HOST: 322 debug("%s: dr_mode: HOST\n", __func__); 323 driver = "dwc3-generic-host"; 324 break; 325 #endif 326 default: 327 debug("%s: unsupported dr_mode\n", __func__); 328 return -ENODEV; 329 }; 330 331 if (!driver) 332 return -ENXIO; 333 334 ret = device_bind_driver_to_node(parent, driver, name, 335 node, &dev); 336 if (ret) { 337 debug("%s: not able to bind usb device mode\n", 338 __func__); 339 return ret; 340 } 341 342 return 0; 343 } 344 345 int dwc3_glue_bind(struct udevice *parent) 346 { 347 struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(parent); 348 ofnode node; 349 int ret; 350 351 if (ops && ops->glue_get_ctrl_dev) { 352 ret = ops->glue_get_ctrl_dev(parent, &node); 353 if (ret) 354 return ret; 355 356 return dwc3_glue_bind_common(parent, node); 357 } 358 359 ofnode_for_each_subnode(node, dev_ofnode(parent)) { 360 ret = dwc3_glue_bind_common(parent, node); 361 if (ret == -ENXIO) 362 continue; 363 if (ret) 364 return ret; 365 } 366 367 return 0; 368 } 369 370 static int dwc3_glue_reset_init(struct udevice *dev, 371 struct dwc3_glue_data *glue) 372 { 373 int ret; 374 375 ret = reset_get_bulk(dev, &glue->resets); 376 if (ret == -ENOTSUPP || ret == -ENOENT) 377 return 0; 378 else if (ret) 379 return ret; 380 381 ret = reset_deassert_bulk(&glue->resets); 382 if (ret) { 383 reset_release_bulk(&glue->resets); 384 return ret; 385 } 386 387 return 0; 388 } 389 390 static int dwc3_glue_clk_init(struct udevice *dev, 391 struct dwc3_glue_data *glue) 392 { 393 int ret; 394 395 ret = clk_get_bulk(dev, &glue->clks); 396 if (ret == -ENOSYS || ret == -ENOENT) 397 return 0; 398 if (ret) 399 return ret; 400 401 #if CONFIG_IS_ENABLED(CLK) 402 ret = clk_enable_bulk(&glue->clks); 403 if (ret) { 404 clk_release_bulk(&glue->clks); 405 return ret; 406 } 407 #endif 408 409 return 0; 410 } 411 412 int dwc3_glue_probe(struct udevice *dev) 413 { 414 struct dwc3_glue_ops *ops = (struct dwc3_glue_ops *)dev_get_driver_data(dev); 415 struct dwc3_glue_data *glue = dev_get_platdata(dev); 416 struct udevice *child = NULL; 417 int index = 0; 418 int ret; 419 420 glue->regs = dev_read_addr(dev); 421 422 ret = dwc3_glue_clk_init(dev, glue); 423 if (ret) 424 return ret; 425 426 ret = dwc3_glue_reset_init(dev, glue); 427 if (ret) 428 return ret; 429 430 ret = device_find_first_child(dev, &child); 431 if (ret) 432 return ret; 433 434 if (glue->clks.count == 0) { 435 ret = dwc3_glue_clk_init(child, glue); 436 if (ret) 437 return ret; 438 } 439 440 if (glue->resets.count == 0) { 441 ret = dwc3_glue_reset_init(child, glue); 442 if (ret) 443 return ret; 444 } 445 446 while (child) { 447 enum usb_dr_mode dr_mode; 448 449 dr_mode = usb_get_dr_mode(child->node); 450 device_find_next_child(&child); 451 if (ops && ops->glue_configure) 452 ops->glue_configure(dev, index, dr_mode); 453 index++; 454 } 455 456 return 0; 457 } 458 459 int dwc3_glue_remove(struct udevice *dev) 460 { 461 struct dwc3_glue_data *glue = dev_get_platdata(dev); 462 463 reset_release_bulk(&glue->resets); 464 465 clk_release_bulk(&glue->clks); 466 467 return 0; 468 } 469 470 static const struct udevice_id dwc3_glue_ids[] = { 471 { .compatible = "xlnx,zynqmp-dwc3" }, 472 { .compatible = "ti,keystone-dwc3"}, 473 { .compatible = "ti,dwc3", .data = (ulong)&ti_ops }, 474 { .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops }, 475 { .compatible = "rockchip,rk3328-dwc3" }, 476 { .compatible = "rockchip,rk3399-dwc3" }, 477 { } 478 }; 479 480 U_BOOT_DRIVER(dwc3_generic_wrapper) = { 481 .name = "dwc3-generic-wrapper", 482 .id = UCLASS_NOP, 483 .of_match = dwc3_glue_ids, 484 .bind = dwc3_glue_bind, 485 .probe = dwc3_glue_probe, 486 .remove = dwc3_glue_remove, 487 .platdata_auto_alloc_size = sizeof(struct dwc3_glue_data), 488 489 }; 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