xref: /rk3399_rockchip-uboot/arch/arm/dts/rk3568-u-boot.dtsi (revision 3b2dd5de375e8ce0e0c9a9ffb2c5965a7582c4ea)
1/*
2 * (C) Copyright 2020 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7/ {
8	aliases {
9		mmc0 = &sdhci;
10		mmc1 = &sdmmc0;
11		mmc2 = &sdmmc1;
12	};
13
14	chosen {
15		stdout-path = &uart2;
16		u-boot,spl-boot-order = &sdhci, &spi_nand, &spi_nor;
17	};
18};
19
20&uart2 {
21	clock-frequency = <24000000>;
22	u-boot,dm-spl;
23	status = "okay";
24};
25
26&grf {
27	u-boot,dm-pre-reloc;
28	status = "okay";
29};
30
31&pmugrf {
32	u-boot,dm-pre-reloc;
33	status = "okay";
34};
35
36&usb2phy0_grf {
37	u-boot,dm-pre-reloc;
38	status = "okay";
39};
40
41&usb2phy1_grf {
42	u-boot,dm-pre-reloc;
43	status = "okay";
44};
45
46&usbdrd30 {
47	u-boot,dm-pre-reloc;
48	status = "okay";
49};
50
51&usbdrd_dwc3 {
52	u-boot,dm-pre-reloc;
53	status = "okay";
54};
55
56&usbhost30 {
57	u-boot,dm-pre-reloc;
58	status = "okay";
59};
60
61&usbhost_dwc3 {
62	u-boot,dm-pre-reloc;
63	status = "okay";
64};
65
66&usb_host0_ehci {
67	u-boot,dm-pre-reloc;
68	status = "okay";
69};
70
71&usb_host0_ohci {
72	u-boot,dm-pre-reloc;
73	status = "okay";
74};
75
76&usb_host1_ehci {
77	u-boot,dm-pre-reloc;
78	status = "okay";
79};
80
81&usb_host1_ohci {
82	u-boot,dm-pre-reloc;
83	status = "okay";
84};
85
86&usb2phy0 {
87	u-boot,dm-pre-reloc;
88	status = "okay";
89};
90
91&u2phy0_otg {
92	u-boot,dm-pre-reloc;
93	status = "okay";
94};
95
96&u2phy0_host {
97	u-boot,dm-pre-reloc;
98	status = "okay";
99};
100
101&usb2phy1 {
102	u-boot,dm-pre-reloc;
103	status = "okay";
104};
105
106&u2phy1_otg {
107	u-boot,dm-pre-reloc;
108	status = "okay";
109};
110
111&u2phy1_host {
112	u-boot,dm-pre-reloc;
113	status = "okay";
114};
115
116&cru {
117	u-boot,dm-pre-reloc;
118	status = "okay";
119};
120
121&pmucru {
122	u-boot,dm-pre-reloc;
123	status = "okay";
124};
125
126&sfc {
127	u-boot,dm-spl;
128	/delete-property/ assigned-clocks;
129	/delete-property/ assigned-clock-rates;
130	status = "okay";
131
132	#address-cells = <1>;
133	#size-cells = <0>;
134	spi_nand: flash@0 {
135		u-boot,dm-spl;
136		compatible = "spi-nand";
137		reg = <0>;
138		spi-tx-bus-width = <1>;
139		spi-rx-bus-width = <4>;
140		spi-max-frequency = <96000000>;
141	};
142
143	spi_nor: flash@1 {
144		u-boot,dm-spl;
145		compatible = "jedec,spi-nor";
146		label = "sfc_nor";
147		reg = <0>;
148		spi-tx-bus-width = <1>;
149		spi-rx-bus-width = <4>;
150		spi-max-frequency = <100000000>;
151	};
152};
153
154&saradc {
155	u-boot,dm-spl;
156	status = "okay";
157};
158
159&sdmmc0 {
160	u-boot,dm-spl;
161	status = "okay";
162};
163
164&sdmmc1 {
165	u-boot,dm-spl;
166	status = "okay";
167};
168
169&sdhci {
170	bus-width = <8>;
171	u-boot,dm-spl;
172	mmc-hs200-1_8v;
173	status = "okay";
174};
175
176