1 /* 2 * (C) Copyright 2022 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_RV1106_COMMON_H 8 #define __CONFIG_RV1106_COMMON_H 9 10 #define CFG_CPUID_OFFSET 0xa 11 12 #include "rockchip-common.h" 13 14 #define COUNTER_FREQUENCY 24000000 15 #define CONFIG_SYS_MALLOC_LEN (16 << 20) 16 #define CONFIG_SYS_CBSIZE 1024 17 #define CONFIG_SYS_NS16550_MEM32 18 19 #define CONFIG_SYS_TEXT_BASE 0x00200000 20 #define CONFIG_SYS_INIT_SP_ADDR 0x00400000 21 #define CONFIG_SYS_LOAD_ADDR 0x00e00800 22 #define CONFIG_SYS_BOOTM_LEN (64 << 20) 23 #define GICD_BASE 0xff1f1000 24 #define GICC_BASE 0xff1f2000 25 #define CONFIG_SYS_SDRAM_BASE 0 26 #define SDRAM_MAX_SIZE 0xff000000 27 #define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1 MiB */ 28 #define CONFIG_PERIPH_DEVICE_START_ADDR (CONFIG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE) 29 #define CONFIG_PERIPH_DEVICE_END_ADDR SZ_4G 30 31 /* SPL */ 32 #define CONFIG_SPL_FRAMEWORK 33 #define CONFIG_SPL_TEXT_BASE 0x00000000 34 #define CONFIG_SPL_MAX_SIZE 0x28000 35 #define CONFIG_SPL_BSS_START_ADDR 0x001fe000 36 #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 37 #define CONFIG_SPL_STACK 0x001fe000 38 39 /* secure otp */ 40 #define OTP_UBOOT_ROLLBACK_OFFSET 0xe0 41 #define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */ 42 #define OTP_ALL_ONES_NUM_BITS 32 43 #define OTP_SECURE_BOOT_ENABLE_ADDR 0x80 44 #define OTP_SECURE_BOOT_ENABLE_SIZE 2 45 #define OTP_RSA_HASH_ADDR 0x90 46 #define OTP_RSA_HASH_SIZE 32 47 48 /* MMC/SD IP block */ 49 #define CONFIG_BOUNCE_BUFFER 50 51 #ifndef CONFIG_SPL_BUILD 52 /* usb mass storage */ 53 #define CONFIG_USB_FUNCTION_MASS_STORAGE 54 #define CONFIG_ROCKUSB_G_DNL_PID 0x110c 55 56 #define CONFIG_LIB_HW_RAND 57 #define CONFIG_PREBOOT 58 59 #if CONFIG_USB_FUNCTION_DFU 60 #define CONFIG_SET_DFU_ALT_INFO 61 #endif 62 63 #ifdef CONFIG_ENV_MEM_LAYOUT 64 #define ENV_MEM_LAYOUT_SETTINGS CONFIG_ENV_MEM_LAYOUT_SETTINGS 65 #else 66 /* 67 * Image: 0 - 8M 68 * zImage: 8 - 12M 69 * fdt: 12 - 13M 70 * ramdisk: 14 ... 71 */ 72 #define ENV_MEM_LAYOUT_SETTINGS \ 73 "scriptaddr=0x00b00000\0" \ 74 "pxefile_addr_r=0x00c00000\0" \ 75 "fdt_addr_r=0x00c00000\0" \ 76 "kernel_addr_c=0x00808000\0" \ 77 "kernel_addr_r=0x00008000\0" \ 78 "ramdisk_addr_r=0x000e00000\0" 79 #endif 80 81 #define CONFIG_EXTRA_ENV_SETTINGS \ 82 ENV_MEM_LAYOUT_SETTINGS \ 83 ROCKCHIP_DEVICE_SETTINGS \ 84 RKIMG_DET_BOOTDEV 85 86 #undef RKIMG_BOOTCOMMAND 87 #ifdef CONFIG_FIT_SIGNATURE 88 #define RKIMG_BOOTCOMMAND \ 89 "boot_fit;" 90 #else 91 #define RKIMG_BOOTCOMMAND \ 92 "boot_fit;" \ 93 "boot_android ${devtype} ${devnum};" 94 #endif 95 96 /* Update define for tiny image */ 97 #ifdef CONFIG_ROCKCHIP_IMAGE_TINY 98 #undef RKIMG_BOOTCOMMAND 99 #undef RKIMG_DET_BOOTDEV 100 #undef CONFIG_EXTRA_ENV_SETTINGS 101 #undef CONFIG_AUTO_COMPLETE 102 #undef CONFIG_SYS_LONGHELP 103 #undef CONFIG_ZLIB 104 #undef CONFIG_GZIP 105 /* TODO: #define CONFIG_LIB_HW_RAND */ 106 107 #define RKIMG_BOOTCOMMAND "boot_fit;" 108 #define CONFIG_EXTRA_ENV_SETTINGS ENV_MEM_LAYOUT_SETTINGS 109 #endif 110 #endif /* !CONFIG_SPL_BUILD */ 111 112 #endif 113