feat(cpufeat): enable FEAT_PAuth to FEAT_STATE_CHECKED

FEAT_PAuth is the second to last feature to be a boolean choice - it's
either unconditionally compiled in and must be present in hardware or
it

feat(cpufeat): enable FEAT_PAuth to FEAT_STATE_CHECKED

FEAT_PAuth is the second to last feature to be a boolean choice - it's
either unconditionally compiled in and must be present in hardware or
it's not compiled in. FEAT_PAuth is architected to be backwards
compatible - a subset of the branch guarding instructions (pacia/autia)
execute as NOPs when PAuth is not present. That subset is used with
`-mbranch-protection=standard` and -march pre-8.3. This patch adds the
necessary logic to also check accesses of the non-backward compatible
registers and allow a fully checked implementation.

Note that a checked support requires -march to be pre 8.3, as otherwise
the compiler will include branch protection instructions that are not
NOPs without PAuth (eg retaa) which cannot be checked.

Change-Id: Id942c20cae9d15d25b3d72b8161333642574ddaa
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge "fix(rd1ae): rename legacy MPAM build option" into integration

Merge "fix(build): update clang target for aarch64" into integration

Merge "fix(stm32mp15-fdts): update clocks config for prtt1x board family" into integration

Merge "feat(stm32mp15-fdts): add Linux Automation GmbH Fairy Tux 2" into integration

feat(stm32mp15-fdts): add Linux Automation GmbH Fairy Tux 2

The Linux Automation Test FairyTux [1] is an embedded
software development tool built around the Octavo Systems OSD32MP15x SiP.

The devic

feat(stm32mp15-fdts): add Linux Automation GmbH Fairy Tux 2

The Linux Automation Test FairyTux [1] is an embedded
software development tool built around the Octavo Systems OSD32MP15x SiP.

The device boots from eMMC.

[1]: https://linux-automation.com/en/products/fairy-tux.html

Change-Id: Ib50dab1b7a840275b0f3a5e2b9f2f99bec4a5636
Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>

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Merge changes from topic "sm/rpkm" into integration

* changes:
docs(rmmd): document the EL3-RMM IDE KM Interface
feat(trp): test el3-rmm ide km interface
feat(rmmd): el3-rmm ide key management

Merge changes from topic "sm/rpkm" into integration

* changes:
docs(rmmd): document the EL3-RMM IDE KM Interface
feat(trp): test el3-rmm ide km interface
feat(rmmd): el3-rmm ide key management interface

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refactor(measured-boot): refine event log lib docs

Add comments for all exported functions and move these descriptions to
the header file. Moving the descriptions to the header file allows the
docum

refactor(measured-boot): refine event log lib docs

Add comments for all exported functions and move these descriptions to
the header file. Moving the descriptions to the header file allows the
documentation to be easily accessible to any code that includes the
header file, without having to look through the source file where the
function implementation is located.

Change-Id: I78ad777cb3de1707f9e9df59c721cd6370317c05
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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refactor(fvp): explicitly handle event log errors

Following the patch that introduced errno returns in the event log APIs,
ensure that errors are properly handled within FVP instead of being
ignored

refactor(fvp): explicitly handle event log errors

Following the patch that introduced errno returns in the event log APIs,
ensure that errors are properly handled within FVP instead of being
ignored.

Change-Id: I5e736b81d9a17ff10dbab6e65bc6506b71c7c9bd
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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feat(measured-boot): make event log lib standalone

Remove dependencies on TF-A so the library can be conveniently exported
by other projets. The main changes are to remove explicit error
handling, a

feat(measured-boot): make event log lib standalone

Remove dependencies on TF-A so the library can be conveniently exported
by other projets. The main changes are to remove explicit error
handling, and ensure that functions instead return errno codes that
consumers can rely on instead. Some work has also been done to make the
function naming a little more consistent.

Change-Id: Ic182dfe7dd6f56a4b73e0da4c9051813938cfe44
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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fix(xilinx): resolve misra rule 2.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.2.3:
- A project should not contain unused type declarations.
- Fix:
- Removed unuse

fix(xilinx): resolve misra rule 2.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.2.3:
- A project should not contain unused type declarations.
- Fix:
- Removed unused code.

Change-Id: Ica5982fe83485da79ac18d45b44e66f5f37fb6e7
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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fix(xilinx): resolve misra rule 2.7 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.2.7:
- There should be no unused parameters in functions.
- Fix:
- Type casted unuse

fix(xilinx): resolve misra rule 2.7 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.2.7:
- There should be no unused parameters in functions.
- Fix:
- Type casted unused parameters to void.

Change-Id: I940109631dbabfbd960c1bc7b183cf865ff312c9
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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fix(xilinx): resolve misra rule 8.6 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.6:
- An identifier with external linkage shall have exactly one external
definit

fix(xilinx): resolve misra rule 8.6 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.6:
- An identifier with external linkage shall have exactly one external
definition.
- Fix:
- Removed redundant function declarations since it is not defined.

Change-Id: If003efbfa08ee6ff4f545605ef34dfd16f33b664
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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fix(xilinx): resolve misra rule 11.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.11.3:
- A cast shall not be performed between a pointer to object type and a
poin

fix(xilinx): resolve misra rule 11.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.11.3:
- A cast shall not be performed between a pointer to object type and a
pointer to a different object type.
- Fix:
- Removed unnecessary cast of pointers.

Change-Id: Iba5dbec0784dcaa86e3a00bd213cbc2711d12029
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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fix(xilinx): resolve misra rule 2.2 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.2.2:
- There shall be no dead code.
- Fix:
- Moved code to macro protected section.

fix(xilinx): resolve misra rule 2.2 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.2.2:
- There shall be no dead code.
- Fix:
- Moved code to macro protected section.

Change-Id: I58b340aa452b67ba765dfe33ff7eb64a4eac8624
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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fix(xilinx): resolve misra rule 15.7 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.15.7:
- All if...else if constructs shall be terminated with an else statement.
- Fix

fix(xilinx): resolve misra rule 15.7 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.15.7:
- All if...else if constructs shall be terminated with an else statement.
- Fix:
- Convert the final else if into an else statement to comply with
MISRA guidelines

Change-Id: I1f54d955958538529a10f146a506ce2a3474f8d7
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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Merge "docs(maintainers): update Arm Total Compute maintainers" into integration

perf(cpufeat): centralise PAuth key saving

prepare_el3_entry() is meant to be the one-stop shop for all the context
we must fiddle with to enter EL3 proper. However, PAuth is the one
exception, happ

perf(cpufeat): centralise PAuth key saving

prepare_el3_entry() is meant to be the one-stop shop for all the context
we must fiddle with to enter EL3 proper. However, PAuth is the one
exception, happening right after. Absorb it into prepare_el3_entry(),
handling the BL1/BL31 difference.

This is a good time to also move the key saving into the enable
function, also to centralise. With this it becomes apparent that saving
keys just before CPU_SUSPEND is redundant as they will be reinitialised
when the core wakes up.

Note that the key loading, now in save_gp_pmcr_pauth_regs, does not end
in an isb. The effects of the key change are not needed until the isb
in the caller, so this isb is not needed.

Change-Id: Idd286bea91140c106ab4c933c5c44b0bc2050ca2
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor(cpufeat): convert FEAT_PAuth setup to C

An oversimplified view of FEAT_PAuth is that it's a symmetric encryption
of the LR. PAC instructions execute as NOPs until explicitly turned on.
So i

refactor(cpufeat): convert FEAT_PAuth setup to C

An oversimplified view of FEAT_PAuth is that it's a symmetric encryption
of the LR. PAC instructions execute as NOPs until explicitly turned on.
So in a function that turns PAuth on, the signing would have executed as
a NOP and the authentication will encrypt the address, leading to a
failure. That's why enablement is in assembly - we have full control of
when pointer authentications happen.

However, assembly is hard to read, is opaque to the compiler for
optimisations, and we need to call into C anyway for the platform hook
to get the key. So convert it to C. We can instruct the compiler to not
generate branch protection for the enable function only and as long as
the caller doesn't do branch protection (and all callers are entrypoints
written in assembly) everything will work.

Change-Id: I8917a26e1293033c910e3058664e3ca9207359b7
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor(cpufeat): prepare FEAT_PAuth for FEATURE_DETECTION

Convert the old style is_armv8_3_pauth_present() to the new style
is_feat_pauth_{present, supported}() helpers and hook FEATURE_DETECTION

refactor(cpufeat): prepare FEAT_PAuth for FEATURE_DETECTION

Convert the old style is_armv8_3_pauth_present() to the new style
is_feat_pauth_{present, supported}() helpers and hook FEATURE_DETECTION
into it. This is in preparation for converting FEAT_PAuth to FEAT_STATE.

Change-Id: Iec8c3477fafb2cdae67d39ae4da2cca76a67511a
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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chore(tc): remove TC2 platform variant

Remove TC2 platform support which was deprecated in the last release.

Change-Id: Ibf4a94a0168151ebc66eaca044a143c51e974a1f
Signed-off-by: Manish V Badarkhe <M

chore(tc): remove TC2 platform variant

Remove TC2 platform support which was deprecated in the last release.

Change-Id: Ibf4a94a0168151ebc66eaca044a143c51e974a1f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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docs(maintainers): update Arm Total Compute maintainers

Add Artem Kopotev and Oleksandr Tarhunakov

Change-Id: Ic4ca4790f1a4f82ffdb91841b9d9112f9ce9e856
Signed-off-by: Artem Kopotev <artem.kopotev@a

docs(maintainers): update Arm Total Compute maintainers

Add Artem Kopotev and Oleksandr Tarhunakov

Change-Id: Ic4ca4790f1a4f82ffdb91841b9d9112f9ce9e856
Signed-off-by: Artem Kopotev <artem.kopotev@arm.com>

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Merge changes from topic "xlnx_versal2_ipi" into integration

* changes:
feat(versal2): add bufferless IPI Support
chore(versal2): use BIT_32() macro

Merge changes from topic "hm/handoff-aarch32" into integration

* changes:
feat(fvp): support AArch32 booting with handoff
feat(arm): support AArch32 booting with handoff

Merge "fix(tsp): use %u to display unsigned values" into integration