| c120613f | 06-Dec-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1710 from soby-mathew/sm/smc_save_x0_x3
BL31: Use helper function to save registers in SMC handler |
| 24e48063 | 06-Dec-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1709 from joannafarley-arm/jf/copyrights-updates
Change copyright guidelines |
| 8dc395e3 | 06-Dec-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1706 from Yann-lms/mmc_init_check
MMC init check and STM32MP1 MMC driver improvements |
| a46cdc05 | 16-Aug-2018 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
plat/arm/sgi: Add board support for SGI-Clark.Helios platform
SGI-Clark.Helios platform is similar to SGI-Clark.Ares platform. The difference between these two platforms is the CPU type and the numb
plat/arm/sgi: Add board support for SGI-Clark.Helios platform
SGI-Clark.Helios platform is similar to SGI-Clark.Ares platform. The difference between these two platforms is the CPU type and the number of CPUs. Add the base support for SGI-Clark.Helios platform.
Change-Id: I2b04cb3fb953907848b4fab016e3648899ca4256 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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| 187ae315 | 22-Nov-2018 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
plat/arm/sgi: override 'plat_psci_ops_t' for SGI-Clark.Helios platform
For SGI-Clark.Helios platform, at present, only the CPU power ON/OFF ops are supported. So override the PSCI ops to allow callb
plat/arm/sgi: override 'plat_psci_ops_t' for SGI-Clark.Helios platform
For SGI-Clark.Helios platform, at present, only the CPU power ON/OFF ops are supported. So override the PSCI ops to allow callbacks only for CPU power ON/OFF operations.
Change-Id: Idc0a3deb78cb850310cbe849d77604fa9881579c Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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| 982261f7 | 16-Oct-2018 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
plat/arm/sgi: add platform support for SGI-Clark.Helios platform
SGI-Clark.Helios platform is based on multi-threaded CPUs and uses an additional thread power domain level as well.
Define a power d
plat/arm/sgi: add platform support for SGI-Clark.Helios platform
SGI-Clark.Helios platform is based on multi-threaded CPUs and uses an additional thread power domain level as well.
Define a power domain tree descriptor 'sgi_clark_helios_pd_tree_desc' for SGI-Clark.Helios platform and let the function 'plat_get_power_domain_tree_desc' pick up the correct power domain tree descriptor based on the platform.
Change-Id: Ibc6d551b570bc740053316a3608c455679d9155b Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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| a6de3db7 | 11-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
plat: rcar: Generate FCNL reserved memory node
Generate a /reserved-memory node for FCNL in the DT passed to subsequent stages, so they will know how the FCNL is configured.
Signed-off-by: Marek Va
plat: rcar: Generate FCNL reserved memory node
Generate a /reserved-memory node for FCNL in the DT passed to subsequent stages, so they will know how the FCNL is configured.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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| ac49c5fb | 11-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
plat: rcar: Generate platform compatible string
Generate /compatible string for the platform, so that the subsequent stages know which platform they are running on. This could be useful when ie. bui
plat: rcar: Generate platform compatible string
Generate /compatible string for the platform, so that the subsequent stages know which platform they are running on. This could be useful when ie. building U-Boot that contains DTs for multiple platforms and can thus decide on which platform it is running. This would ultimately allow single bootloader binary for all Gen3 platforms.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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| 1d85c4bd | 02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
plat: rcar: Pass DTB with DRAM layout from BL2 to next stages
Pass DTB containing DRAM layout from BL2 to BL33 via register x3, so that the BL33 can simply consume it and get accurate DRAM layout in
plat: rcar: Pass DTB with DRAM layout from BL2 to next stages
Pass DTB containing DRAM layout from BL2 to BL33 via register x3, so that the BL33 can simply consume it and get accurate DRAM layout info. BL33 is in most usecases U-Boot.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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| 85185151 | 02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
plat: rcar: Use array in the DRAM size reporting
Use array of start-size tuples for the DRAM banks and call single function which iterates over this array to report the DRAM info. This is in prepara
plat: rcar: Use array in the DRAM size reporting
Use array of start-size tuples for the DRAM banks and call single function which iterates over this array to report the DRAM info. This is in preparation for expanding this to generate FDT for the next stage.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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| 10b7a4ae | 02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
plat: rcar: Print DRAM configuration after init
Print the DRAM configuration only after the DRAM was initialized. This will be useful when deduplicating code populating FDT passed to U-Boot, since i
plat: rcar: Print DRAM configuration after init
Print the DRAM configuration only after the DRAM was initialized. This will be useful when deduplicating code populating FDT passed to U-Boot, since it will contain the same macros as bl2_advertise_dram_size().
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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| e1eddfea | 02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
plat: rcar: Fill in memory information for M3W, M3N
Make the DRAM configuration debug print consistent for all supported SoCs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> |
| 7bf24ae3 | 02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
plat: rcar: Drop H3 v3.0 check on DRAM debug print
There is nothing preventing H3 older than v3.0 from printing the DRAM configuration, just like v3.0 and newer. Drop the check and let all H3 revisi
plat: rcar: Drop H3 v3.0 check on DRAM debug print
There is nothing preventing H3 older than v3.0 from printing the DRAM configuration, just like v3.0 and newer. Drop the check and let all H3 revisions print DRAM configuration in BL2.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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| 3b507aab | 02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
plat: rcar: Add E3 1GBx4 debug print
RCAR_DRAM_DDR3L_MEMCONF = 2 means E3 with 1GBx4 memory configuration. Add debug print for this configuration for completeness sake.
Signed-off-by: Marek Vasut <
plat: rcar: Add E3 1GBx4 debug print
RCAR_DRAM_DDR3L_MEMCONF = 2 means E3 with 1GBx4 memory configuration. Add debug print for this configuration for completeness sake.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
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| 358ed930 | 02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
plat: rcar: Move DRAM layout print to separate function
Just move the DRAM layout information into separate function, no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> |
| 77ab969a | 28-Nov-2018 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
plat/arm/sgi: Use NT_FW_CONFIG instead of HW_CONFIG
With the two new APIs 'plat_arm_sgi_get_platform_id' and 'plat_arm_sgi_get_config_id' that are available now, BL31 need not depend on hw_config de
plat/arm/sgi: Use NT_FW_CONFIG instead of HW_CONFIG
With the two new APIs 'plat_arm_sgi_get_platform_id' and 'plat_arm_sgi_get_config_id' that are available now, BL31 need not depend on hw_config device tree to identify the platform. In addition to this, the existing hardware description in hw_config can be limited to use by BL33 and not by the operating system.
So the hardware description from hw_config dts can be moved into nt_fw_config dts and the use of hw_config dts can be removed.
Change-Id: I873b7e1e72823d3ec5d253a848e85ae724f09e49 Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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| 19b56cf4 | 05-Dec-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1711 from antonio-nino-diaz-arm/an/fix-imx
tzc380: Fix some asserts |
| df54406d | 05-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
tzc380: Fix some asserts
This driver can be compiled in release builds, but GCC generates warnings for some comparisons and that prevents the firmware from being built in debug builds.
Change-Id: I
tzc380: Fix some asserts
This driver can be compiled in release builds, but GCC generates warnings for some comparisons and that prevents the firmware from being built in debug builds.
Change-Id: Ic52e1b4a11896ecf086864fbe2b5bfc143ec9b1b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 01fc1c24 | 16-Nov-2018 |
Soby Mathew <soby.mathew@arm.com> |
BL31: Use helper function to save registers in SMC handler
Use the helper function `save_gp_registers` to save the register state to cpu_context on entry to EL3 in SMC handler. This has the effect o
BL31: Use helper function to save registers in SMC handler
Use the helper function `save_gp_registers` to save the register state to cpu_context on entry to EL3 in SMC handler. This has the effect of saving x0 - x3 as well into the cpu_context which was not done previously but it unifies the register save sequence in BL31.
Change-Id: I5753c942263a5f9178deda3dba896e3220f3dd83 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| 36bc633e | 05-Dec-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1653 from JackyBai/master
Add NXP i.MX8MQ basic support |
| b79da224 | 13-Nov-2018 |
Joanna Farley <joanna.farley@arm.com> |
Change copyright guidelines
Copyright guidance has been changed for migration of the ARM run project to trustedfirmware.org where the project governance is different.
Change-Id: I059177453fb357843e
Change copyright guidelines
Copyright guidance has been changed for migration of the ARM run project to trustedfirmware.org where the project governance is different.
Change-Id: I059177453fb357843eced93c2a55b3705a379683 Signed-off-by: Joanna Farley <joanna.farley@arm.com>
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| 81136819 | 27-Oct-2018 |
Bai Ping <ping.bai@nxp.com> |
plat: imx: Add i.MX8MQ basic support
i.MX8MQ is new SOC of NXP's i.MX8M family based on A53. It can provide industry-leading audio, voice and video processing for applications that scale from consum
plat: imx: Add i.MX8MQ basic support
i.MX8MQ is new SOC of NXP's i.MX8M family based on A53. It can provide industry-leading audio, voice and video processing for applications that scale from consumer home audio to industrial building automation and mobile computers
this patchset add the basic supoort to boot up the 4 X A53. more feature will be added later.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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| 03ce1620 | 04-Dec-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1703 from oscardagrach/hikey960-dmac-fix
hikey960: initialize EDMAC and channels |
| ae4a99b9 | 04-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Merge pull request #1705 from chandnich/platform-id
plat/arm/sgi: Use platform specific functions to get platform ids |
| 6d422c3e | 04-Dec-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1702 from MISL-EBU-System-SW/patches-18.12
Update code with latest changes from Marvell LSP 18.12 |