Tegra: fix MISRA defects in tegra_bl31_setup.c

Main fixes:

Add parentheses to avoid implicit operator precedence [Rule 12.1]

Fixed if statement conditional to be essentially boolean [Rule 14.4]

A

Tegra: fix MISRA defects in tegra_bl31_setup.c

Main fixes:

Add parentheses to avoid implicit operator precedence [Rule 12.1]

Fixed if statement conditional to be essentially boolean [Rule 14.4]

Added curly braces ({}) around if statements in order to
make them compound [Rule 15.6]

Voided non c-library functions whose return types are not used [Rule 17.7]

Bug 200272157

Change-Id: Ic3ab5a3de95aeb6d2265df940f7fb35ea0f19ab0
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>

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Tegra: gpcdma: driver for general purpose DMA

This patch adds the driver for the general purpose DMA hardware
block on newer Tegra SoCs. The GPCDMA is a special purpose DMA
used to speed up memory c

Tegra: gpcdma: driver for general purpose DMA

This patch adds the driver for the general purpose DMA hardware
block on newer Tegra SoCs. The GPCDMA is a special purpose DMA
used to speed up memory copy operations to/from DRAM and TZSRAM.

This patch introduces a macro 'USE_GPC_DMA' to allow platforms
to override CPU based memory operations.

Change-Id: I3170d409c83b77e785437b1002a8d70188fabbeb
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra210: SE: remove logic to enable atomic save/restore

This patch removes the logic to set the bit that enables atomic context
save/restore when we enter System suspend. The bootrom enables this b

Tegra210: SE: remove logic to enable atomic save/restore

This patch removes the logic to set the bit that enables atomic context
save/restore when we enter System suspend. The bootrom enables this bit
during cold boot and exit from System Suspend, so we can remove this
setting from the driver.

Change-Id: Id4e08d5048155c970f5e31d9c9dd676c07182ade
Signed-off-by: Samuel Payne <spayne@nvidia.com>

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Tegra186: sip_calls: fix defects flagged by MISRA scan

Main fixes:

Added explicit casts (e.g. 0U) to integers in order for them to be
compatible with whatever operation they're used in [Rule 10.1]

Tegra186: sip_calls: fix defects flagged by MISRA scan

Main fixes:

Added explicit casts (e.g. 0U) to integers in order for them to be
compatible with whatever operation they're used in [Rule 10.1]

Convert object type to match the type of function parameters
[Rule 10.3]

Force operands of an operator to the same type category [Rule 10.4]

Expressions resulting from the expansion of macro parameters
shall be enclosed in parentheses[Rule 20.7]

Change-Id: Ibdae1d18d299562ca2b96b2318b914601c9926b1
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>

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docs: warp7: Update WaRP7 description for TBB

This patch updates the WaRP7 build descriptions for booting WaRP7 in
Trusted Board Boot mode. TBB is the only mode we really intend to support
for this

docs: warp7: Update WaRP7 description for TBB

This patch updates the WaRP7 build descriptions for booting WaRP7 in
Trusted Board Boot mode. TBB is the only mode we really intend to support
for this board so rather than maintain documentation for the old way of
doing it, this patch updates the description for TBB mode only.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

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warp7: Enable Trusted Board Boot for WaRP7

This patch enables Trusted Board Boot for warp7. A subsequent patch
contains build/run instructions.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@lina

warp7: Enable Trusted Board Boot for WaRP7

This patch enables Trusted Board Boot for warp7. A subsequent patch
contains build/run instructions.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Jun Nie <jun.nie@linaro.org>

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stm32mp1: set ETZPC controlled peripherals and GPIOZ as non-secure

Change-Id: I604b38ffa40e04c6e2aaede28e9f61335bbffdc0
Signed-off-by: Yann Gautier <yann.gautier@st.com>

stm322mp1: add BSEC service

This service, called with SMC from Non secure world, allows access to
some configurations saved in OTP fuses.

Change-Id: I92ba5614b2cb4a03260119e2cf74f2cd626a3431
Signed

stm322mp1: add BSEC service

This service, called with SMC from Non secure world, allows access to
some configurations saved in OTP fuses.

Change-Id: I92ba5614b2cb4a03260119e2cf74f2cd626a3431
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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stm32mp1: add BSEC driver

The BSEC (Boot and Security and OTP control) is intended to control an OTP
(one time programmable) fuse box, used for on-chip non-volatile storage
for device configuration

stm32mp1: add BSEC driver

The BSEC (Boot and Security and OTP control) is intended to control an OTP
(one time programmable) fuse box, used for on-chip non-volatile storage
for device configuration and security parameters.

Change-Id: I38c44684c7b9c6a1f24ec0ae3fe99cec481d5a51
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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stm32mp1: add support for SiP services

Change-Id: I9c8241d8cd9d95b647c612dd66dd554d5965c2ac
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Si

stm32mp1: add support for SiP services

Change-Id: I9c8241d8cd9d95b647c612dd66dd554d5965c2ac
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Mathieu Belou <mathieu.belou@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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stm32mp1: update device tree and gpio functions

Change fdt_check_status function to fdt_get_status.
Update GPIO defines.
Move some functions in gpio driver, instead of dt helper file.
Add GPIO bank

stm32mp1: update device tree and gpio functions

Change fdt_check_status function to fdt_get_status.
Update GPIO defines.
Move some functions in gpio driver, instead of dt helper file.
Add GPIO bank helper functions.
Use only one status field in dt_node_info structure including both status
and secure status.

Change-Id: I34f93408dd4aac16ae722f564bc3f7d6ae978cf4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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stm32mp1: update platform files

Move print_reset_reason function to bl2_plat_setup.c
Put __unused attribute for unused bl2_el3_early_platform_setup args.
Rename dt_dev_info to dt_uart_info.
Put MMU

stm32mp1: update platform files

Move print_reset_reason function to bl2_plat_setup.c
Put __unused attribute for unused bl2_el3_early_platform_setup args.
Rename dt_dev_info to dt_uart_info.
Put MMU configuration earlier.
Remove unused macros.
Use U() or ULL() macros where needed.
Use device tree to configure GIC.
Use GIC helper function.

Change-Id: I34620c421cc6967a668bca318f7689fd74fa78a6
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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drivers: st: update drivers code

Reword some traces.
Use uintptr_t where required.
Reduce scope of variables.
Improve io_stm32image algo.
Complete some IP registers definitions.
Add failure on suppo

drivers: st: update drivers code

Reword some traces.
Use uintptr_t where required.
Reduce scope of variables.
Improve io_stm32image algo.
Complete some IP registers definitions.
Add failure on supported DDR (stm32mp1_ddr_init()).
Fix cache flush on cache disable (stm32mp1_ddr_setup).

Change-Id: Ie02fa71e02b9d69abc807fd5b7df233e5be6668c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>

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drivers: st: pmic: update stpmic1 driver

Change-Id: I4a1b281925e0a3a1e2a34b3e363537e4a7f13823
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

drivers: st: pmic: update stpmic1 driver

Change-Id: I4a1b281925e0a3a1e2a34b3e363537e4a7f13823
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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stm32mp1: update device tree files

The drivers are also updated to reflect the changes.
Set RCC as non-secure.

Change-Id: I568fa1f418355830ad1d4d1cdcdb910fb362231b
Signed-off-by: Yann Gautier <yann

stm32mp1: update device tree files

The drivers are also updated to reflect the changes.
Set RCC as non-secure.

Change-Id: I568fa1f418355830ad1d4d1cdcdb910fb362231b
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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stm32mp1: rename stpmu1 to stpmic1

This is the correct name of the IP.
Rename stm32mp1_pmic files to stm32mp_pmic.

Change-Id: I238a7d1f9a1d099daf7788dc9ebbd3146ba2f15f
Signed-off-by: Yann Gautier <

stm32mp1: rename stpmu1 to stpmic1

This is the correct name of the IP.
Rename stm32mp1_pmic files to stm32mp_pmic.

Change-Id: I238a7d1f9a1d099daf7788dc9ebbd3146ba2f15f
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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drivers: st: move i2c driver in its own folder

The driver could be used for other devices than PMIC.

Change-Id: I4569e7c0028e52e1ff2fe9d38f11de11e95d1897
Signed-off-by: Yann Gautier <yann.gautier@s

drivers: st: move i2c driver in its own folder

The driver could be used for other devices than PMIC.

Change-Id: I4569e7c0028e52e1ff2fe9d38f11de11e95d1897
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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warp7: Define DTB overlay address in memory map

This patch defines the expected DTB overlay address in the memory map for
this platform. Its important that all points in the boot process agree on
th

warp7: Define DTB overlay address in memory map

This patch defines the expected DTB overlay address in the memory map for
this platform. Its important that all points in the boot process agree on
this memory map even if not all elements utilize it.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

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warp7: io_storage: Remove DTB from FIP

Recently upstreamed changes to OP-TEE mean that it is possible for OP-TEE
to provide a DTB overlay directly to subsequent boot stages thus negating
the require

warp7: io_storage: Remove DTB from FIP

Recently upstreamed changes to OP-TEE mean that it is possible for OP-TEE
to provide a DTB overlay directly to subsequent boot stages thus negating
the requirement to bundle a DTB in the FIP.

This patch switches off the dependency on the DTB in the FIP descriptor
instead we will provide the necessary data as an overlay from OP-TEE.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

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Merge pull request #1762 from antonio-nino-diaz-arm/an/fix-readme

readme: Update list of supported platforms

imx: add i.MX8 SoCs build info SIP(silicon provider) service support

This patch adds NXP i.MX8 SoCs' build info SIP support for easy debug.
With this function enabled, TF-A's commit hash can be show

imx: add i.MX8 SoCs build info SIP(silicon provider) service support

This patch adds NXP i.MX8 SoCs' build info SIP support for easy debug.
With this function enabled, TF-A's commit hash can be showed in u-boot
debug console when booting up, when there is any issue which could be
related to TF-A, users can use the commit hash value to easily identify
which commit introduces the issue.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

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imx: add i.MX8 SoCs thermal alarm SIP(silicon provider) service support

For NXP's i.MX8 SoCs with system controller inside, thermal sensors
are maintained by SCFW, Linux needs to call SMC to trap to

imx: add i.MX8 SoCs thermal alarm SIP(silicon provider) service support

For NXP's i.MX8 SoCs with system controller inside, thermal sensors
are maintained by SCFW, Linux needs to call SMC to trap to TF-A for
thermal alarm operation etc. by calling SCFW API.

This patch adds temperature alarm SIP service support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

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imx: add i.MX8 SoCs OTP SIP(silicon provider) service support

For NXP's i.MX8 SoCs with system controller inside, OTP is
maintained by SCFW, Linux needs to call SMC to trap to TF-A
for OTP read/writ

imx: add i.MX8 SoCs OTP SIP(silicon provider) service support

For NXP's i.MX8 SoCs with system controller inside, OTP is
maintained by SCFW, Linux needs to call SMC to trap to TF-A
for OTP read/write etc. operations by calling SCFW API.

This patch adds OTP SIP service support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

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imx: support for i.MX8 SoCs misc IPC

NXP's i.MX8 SoCs have system controller (M4 core) which takes
control of misc functions like temperature alarm, dma etc., other
Cortex-A clusters can send out co

imx: support for i.MX8 SoCs misc IPC

NXP's i.MX8 SoCs have system controller (M4 core) which takes
control of misc functions like temperature alarm, dma etc., other
Cortex-A clusters can send out command via MU (Message Unit) to
system controller for misc operation etc..

This patch adds misc IPC(inter-processor communication) support.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

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imx: add wakeup source SIP runtime service support

On i.MX8QM/i.MX8QX with system controller inside, the wakeup
source is managed in SCFW(system controller firmware), if the
wakeup source is belonge

imx: add wakeup source SIP runtime service support

On i.MX8QM/i.MX8QX with system controller inside, the wakeup
source is managed in SCFW(system controller firmware), if the
wakeup source is belonged to system controller partition, then
before Linux suspend, the wakeup source should be set to
SC_PM_WAKE_SRC_SCU, and if the wakeup source is belonged to
Cortex-A partition, the wakeup source should be set to
SC_PM_WAKE_SRC_IRQSTEER, so need to add wakeup source SIP runtime
service to get Linux kernel's wakeup source and set the correct
wakeup source for system controller.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

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