1/* 2 * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6#include <arch.h> 7#include <asm_macros.S> 8#include <common/bl_common.h> 9#include <common/debug.h> 10#include <cortex_helios.h> 11#include <cpu_macros.S> 12#include <plat_macros.S> 13 14func cortex_helios_cpu_pwr_dwn 15 mrs x0, CORTEX_HELIOS_CPUPWRCTLR_EL1 16 orr x0, x0, #CORTEX_HELIOS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT 17 msr CORTEX_HELIOS_CPUPWRCTLR_EL1, x0 18 isb 19 ret 20endfunc cortex_helios_cpu_pwr_dwn 21 22#if REPORT_ERRATA 23/* 24 * Errata printing function for Cortex Helios. Must follow AAPCS. 25 */ 26func cortex_helios_errata_report 27 ret 28endfunc cortex_helios_errata_report 29#endif 30 31 32.section .rodata.cortex_helios_regs, "aS" 33cortex_helios_regs: /* The ascii list of register names to be reported */ 34 .asciz "cpuectlr_el1", "" 35 36func cortex_helios_cpu_reg_dump 37 adr x6, cortex_helios_regs 38 mrs x8, CORTEX_HELIOS_ECTLR_EL1 39 ret 40endfunc cortex_helios_cpu_reg_dump 41 42declare_cpu_ops cortex_helios, CORTEX_HELIOS_MIDR, \ 43 CPU_NO_RESET_FUNC, \ 44 cortex_helios_cpu_pwr_dwn 45