1 /* 2 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef CORTEX_HELIOS_H 8 #define CORTEX_HELIOS_H 9 10 #include <lib/utils_def.h> 11 12 #define CORTEX_HELIOS_MIDR U(0x410FD060) 13 14 /******************************************************************************* 15 * CPU Extended Control register specific definitions. 16 ******************************************************************************/ 17 #define CORTEX_HELIOS_ECTLR_EL1 S3_0_C15_C1_4 18 19 /******************************************************************************* 20 * CPU Auxiliary Control register specific definitions. 21 ******************************************************************************/ 22 #define CORTEX_HELIOS_CPUACTLR_EL1 S3_0_C15_C1_0 23 24 /******************************************************************************* 25 * CPU Power Control register specific definitions. 26 ******************************************************************************/ 27 28 #define CORTEX_HELIOS_CPUPWRCTLR_EL1 S3_0_C15_C2_7 29 #define CORTEX_HELIOS_CPUPWRCTLR_EL1_CORE_PWRDN_BIT (U(1) << 0) 30 31 #endif /* CORTEX_HELIOS_H */ 32