feat(per-cpu): migrate rmm_context to per-cpu framework

migrate rmm_context objects to the NUMA-aware per-cpu framework to
optimize memory access and to efficiently utilize memory.

Signed-off-by: S

feat(per-cpu): migrate rmm_context to per-cpu framework

migrate rmm_context objects to the NUMA-aware per-cpu framework to
optimize memory access and to efficiently utilize memory.

Signed-off-by: Sammit Joshi <sammit.joshi@arm.com>
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I72d49c3d860dac10bd3930ce400b0199bedd887b

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fix(rmmd): correct activation condition check

Update the activation condition in rmmd_primary_activate to ensure the
function behaves correctly when the return code is zero. This change
prevents pot

fix(rmmd): correct activation condition check

Update the activation condition in rmmd_primary_activate to ensure the
function behaves correctly when the return code is zero. This change
prevents potential issues during the activation process.

Change-Id: I94d76c1e491f114b7fb32dd85dbfcfe2f5f1d3da
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(rmmd): avoid race conditions in CPU finish

Create a local copy of entry point info to prevent race conditions when
accessing shared data. This change ensures that the CPU finish handler
operates

fix(rmmd): avoid race conditions in CPU finish

Create a local copy of entry point info to prevent race conditions when
accessing shared data. This change ensures that the CPU finish handler
operates on a consistent state without interference from other threads,
improving stability and reliability of the service.

Change-Id: I84fbc21672dde0f19176f63ee94afafc0084004e
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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Merge "fix(trp): report argument errors before bailing out" into integration

Merge changes Id711e387,I531a2ee1,Ic5b48514,I81f5f663,I6c529c13, ... into integration

* changes:
refactor(romlib): absorb WRAPPER_FLAGS into LDFLAGS
fix(build): simplify the -target options
fe

Merge changes Id711e387,I531a2ee1,Ic5b48514,I81f5f663,I6c529c13, ... into integration

* changes:
refactor(romlib): absorb WRAPPER_FLAGS into LDFLAGS
fix(build): simplify the -target options
feat(build): allow full LTO builds with clang
refactor(build): make sorting of sections generic
feat(build): use clang as a linker
fix(build): correctly detect that an option is missing with ld_option
feat(build): pass cflags to the linker when LTO is enabled

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Merge changes from topic "rmm-lfa" into integration

* changes:
feat(arm): handle RMM ep_info during LFA
feat(lfa): add helper to check LFA prime completion status
feat(lfa): enable LFA of RMM

Merge changes from topic "rmm-lfa" into integration

* changes:
feat(arm): handle RMM ep_info during LFA
feat(lfa): add helper to check LFA prime completion status
feat(lfa): enable LFA of RMM
chore(lfa): use standard int return type for prime/activate callbacks
feat(rmmd): add warm reset helpers for primary and secondary CPUs

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refactor(build): make sorting of sections generic

All BLs define essentially the same sequence for sorting of sections.
Make that generic so it applies more easily.

Change-Id: I81f5f6635232bd43d999

refactor(build): make sorting of sections generic

All BLs define essentially the same sequence for sorting of sections.
Make that generic so it applies more easily.

Change-Id: I81f5f6635232bd43d999c8054e290a6437c26c71
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(trp): report argument errors before bailing out

TRP checks for the extra warmboot arguments (in registers x2 and x3) to
be 0, then bails out of the RME initialisation process if they are not.
Ho

fix(trp): report argument errors before bailing out

TRP checks for the extra warmboot arguments (in registers x2 and x3) to
be 0, then bails out of the RME initialisation process if they are not.
However it does not report about that case, so the users will be left
clueless about what is going wrong.

Add an error message reporting the fact and the values of the registers,
when they are not 0.

Change-Id: I6231551ccdfa9434d0153caa95933044e2b23938
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(lfa): enable LFA of RMM

Extend the LFA framework to handle the activation of RMM image.
This allows RMM to be updated and re-initialized as part of
LFA without requiring a system reset.

Signed

feat(lfa): enable LFA of RMM

Extend the LFA framework to handle the activation of RMM image.
This allows RMM to be updated and re-initialized as part of
LFA without requiring a system reset.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I6ca3e21f6fe07ac3ab0bec1656d295129b62b8f5

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chore(lfa): use standard int return type for prime/activate callbacks

Replace `int32_t` with `int` for `component_prime_fn` and
`component_activate_fn` typedefs, along with their implementations
in

chore(lfa): use standard int return type for prime/activate callbacks

Replace `int32_t` with `int` for `component_prime_fn` and
`component_activate_fn` typedefs, along with their implementations
in BL31 and RMM LFA services. This aligns with common convention
for function return types and avoids unnecessary use of fixed-width
types where a native int is sufficient

Change-Id: Id22e93a554260b22e36b59baeac2cbb1b4646727
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(rmmd): add warm reset helpers for primary and secondary CPUs

Introduce two helpers to support RMM warm reset, primarily for use
during Live Firmware Activation:

- rmmd_primary_warm_reset(): r

feat(rmmd): add warm reset helpers for primary and secondary CPUs

Introduce two helpers to support RMM warm reset, primarily for use
during Live Firmware Activation:

- rmmd_primary_warm_reset(): re-runs rmmd_setup() and rmm_init()
for the primary CPU.
- rmmd_secondary_warm_reset(): reinitializes secondary CPUs using
rmmd_cpu_on_finish_handler(), with a spinlock to serialize
access.

Change-Id: I885536aa85e395ed69069802112dcdb5063a9c19
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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refactor(el3-runtime): move context security states to context.h

The three security states (S, NS, RL) are architecturally quite
consistent - anything that uses them has the same numerical assignmen

refactor(el3-runtime): move context security states to context.h

The three security states (S, NS, RL) are architecturally quite
consistent - anything that uses them has the same numerical assignments
(0, 1, 2) and they are quite convenient for indexing. However, we're not
as consistent in tf-a and this is defined in a few places. Since
cpu_data has a dependency on the context management library, use its
security state convention in a few more places and take away this
responsibility from cpu_data.

Change-Id: Iec73b2be2eef91975554767557de72424d0031f1
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(rme): fix incorrect shift operation in rmmd

This patch fixes the shift operation in rmmd_mecid_key_update().
Also, a function name fix is made to the platform porting guide.

Change-Id: I80f0e26

fix(rme): fix incorrect shift operation in rmmd

This patch fixes the shift operation in rmmd_mecid_key_update().
Also, a function name fix is made to the platform porting guide.

Change-Id: I80f0e2653dcb5cdd7b5937506ca040b2105ca3ce
Signed-off-by: Soby Mathew <soby.mathew@arm.com>

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refactor(rmmd): modify MEC update call to meet FIRME

Previous version of MEC refresh call was not compliant with FIRME [1].
This patch modifies the call so it is compliant with the specification.

[

refactor(rmmd): modify MEC update call to meet FIRME

Previous version of MEC refresh call was not compliant with FIRME [1].
This patch modifies the call so it is compliant with the specification.

[1] https://developer.arm.com/documentation/den0149/1-0alp0/

Change-Id: I15a652a021561edca16e79d127e6f08975cf1361
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>

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feat(rmmd): add RMM_RESERVE_MEMORY SMC handler

At the moment any memory required by an R-EL2 manager (RMM) needs to
be known at compile time: that sets the size of the .data and .bss
segments. Some

feat(rmmd): add RMM_RESERVE_MEMORY SMC handler

At the moment any memory required by an R-EL2 manager (RMM) needs to
be known at compile time: that sets the size of the .data and .bss
segments. Some resources depend on the particular machine this will be
running on, the prime example is TF-RMM's granule array, which needs to
know the maximum memory supported beforehand. Other data structures
might depend on the number of CPU cores.

To provide more flexibility, but keep the memory footprint as small as
possible, let's introduce some memory reservation SMC. Any RMM
implementation can ask EL3 for some memory, and would get the physical
address of a usable chunk of memory back. This must happen at RMM boot
time, so before the RMM concluded the boot phase with the
RMM_BOOT_COMPLETE SMC call. Also there is no provision to free memory
again, this would not be needed for the use case of sizing platform
resources, and avoids the complexity of a full-fledged memory allocator.

Add the new RMM_RESERVE_MEMORY command to the implementation defined
RMM-EL3 SMC interface, both in code and documentation. The actual memory
reservation is made a platform implementation, but a simple
implementation is provided, which is used for the FVP platform already:
it will just pick the next matching chunk of memory from the top end of
the RMM carveout. This way the memory reservation will grow down from
the end of the carveout, in a stack-like fashion, until it reaches the
end of the RMM payload, located at the beginning of the carveout. Since
secondary cores might also reserve memory at boot time, there is a
spinlock to protect the simple allocation algorithm.
Other platforms can choose to provide a more sophisticated reservation
algorithm, for instance one taking NUMA locality into account.

This patch just provides the call, at this point there is no obligation
to use the feature, although future TF-RMM versions would rely on it.

Change-Id: I096ac8870ee38f44e18850779fcae829a43a8fd1
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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feat(rmmd): add per-CPU activation token

To accommodate Live Firmware Activation (LFA), the RMM needs to preserve
some state, between an old and the new copy of itself.
The state which needs to be p

feat(rmmd): add per-CPU activation token

To accommodate Live Firmware Activation (LFA), the RMM needs to preserve
some state, between an old and the new copy of itself.
The state which needs to be preserved and its organisation would be
completely under control of the RMM; it will be different between
different RMM implementations and even between releases.

To keep the interface small, generic and robust, introduce an
"activation token", which is an opaque 64-bit value to gets passed to
each RMM as part of the boot/init phase. On the first initialisation,
after a cold boot, this value would be initialised to 0. The RMM is
expected to pass the actual value (for instance a pointer to a
persistent data structure) back to BL31 as an additional argument of the
RMM_BOOT_COMPLETE SMC call. On subsequent live activations, this updated
token value gets passed to the (updated) RMM init routines, using the
respective CPU registers.

Add an activation_token member to the (per-CPU) RMM context, and update
its value with the value passed via the x2 register, at the
RMM_BOOT_COMPLETE SMC call. Then pass that value into RMM either via x4
(on the primary core) or via x1 (on secondary cores). How the value is
used or updated on the RMM side is of no further concern to BL31, it
just passes the opaque value around.
The TRP seems to be very jealous about the values in the first three
registers, so let it ignore the value of x1 on a warmboot, to avoid a
panic.

Change-Id: Ie8d96a046b74adb00e2ca5ce3b8458465bacf2b2
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

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refactor(cm): unify RMM context

setup_realm_context() is the de facto place to put any code that relates
to the RMM's context. It is frequently updated and contains the vast
majority of code. manage

refactor(cm): unify RMM context

setup_realm_context() is the de facto place to put any code that relates
to the RMM's context. It is frequently updated and contains the vast
majority of code. manage_extensions_realm() on the other hand is out of
date and obscure.

So absorb manage_extensions_realm() and rmm_el2_context_init() into
setup_realm_context().

We can also combine the write to sctlr_el2 for all worlds as they should
all observe the RES1 values.

Finally, the SPSR_EL2.PAN comment in the realm copy is updated.

Change-Id: I21dccad0c13301e3249db6f6e292beb5d853563e
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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refactor(cm): gather per-world context management to the same place

The per-world calls are disparate - they get called in different places,
are guarded in different ways, and the code is apart.

Si

refactor(cm): gather per-world context management to the same place

The per-world calls are disparate - they get called in different places,
are guarded in different ways, and the code is apart.

Since they just need to be called once at boot, add a function that we
can call from BL31 and be done with it.

Change-Id: Id0ade302e35f2b00ca37c552a53038942ab7b58e
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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feat(lfa): implement LFA_GET_INVENTORY SMC

This implementation primarily retrieves activation-related flags for
a given fw_seq_id, including whether the firmware is activation
capable, whether an up

feat(lfa): implement LFA_GET_INVENTORY SMC

This implementation primarily retrieves activation-related flags for
a given fw_seq_id, including whether the firmware is activation
capable, whether an update is pending activation, whether it resets
the CPU during activation, whether CPU rendezvous is required, and the
firmware's UUID.
To support this, a platform API is called to determine whether an
update is available for the specified fw_seq_id, indicating its
pending activation status.

Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: I6e702a8b313386f5668027386845ff2dae9328e7

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feat(rmm): add placeholder activator callbacks for LFA

Introduce the RMM component's activator structure for use in
LFA. The 'prime' and 'activate' callbacks currently return
LFA_WRONG_STATE as plac

feat(rmm): add placeholder activator callbacks for LFA

Introduce the RMM component's activator structure for use in
LFA. The 'prime' and 'activate' callbacks currently return
LFA_WRONG_STATE as placeholders.

These functions will be implemented in subsequent patches in
this series to support actual RMM component activation logic.

Change-Id: I899ff51e4065887b7b4bbfbaa827322c51cd215c
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(trp): test el3-rmm ide km interface

This patch introduces test functions to the Test Realm Payload (TRP)
for performing basic sanity checks on the RMM-EL3 IDE KM support added
to EL3.

The prim

feat(trp): test el3-rmm ide km interface

This patch introduces test functions to the Test Realm Payload (TRP)
for performing basic sanity checks on the RMM-EL3 IDE KM support added
to EL3.

The primary goal of this patch is to only to verify the basic
functionality and ensure the implemented functions return the
correct return values.

The test uses random values for the ecam address, rootport ID,
IDE stream info, keys, and IV values.

Change-Id: Icf47627da9a6a7dd0d6e40e20ac94cc977072177
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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feat(rmmd): el3-rmm ide key management interface

Patch introduces the EL3-RMM SMC Interface for Root Port
Key management as per RFC discussed here:
https://github.com/TF-RMM/tf-rmm/wiki/RFC:-EL3-RMM

feat(rmmd): el3-rmm ide key management interface

Patch introduces the EL3-RMM SMC Interface for Root Port
Key management as per RFC discussed here:
https://github.com/TF-RMM/tf-rmm/wiki/RFC:-EL3-RMM-IDE-KM-Interface

Three IDE Key management smc calls have been added:
- RMM_IDE_KEY_PROG()
- RMM_IDE_KEY_SET_GO()
- RMM_IDE_KEY_SET_STOP()
- RMM_IDE_KM_PULL_RESPONSE()

Due to the absence of root port support in FVP, we are
currently adding placeholders in this patch for the platform
APIs to return success irrespective of the arguments being passed
by the caller(Realms). The SMCs are guarded by
`RMMD_ENABLE_IDE_KEY_PROG` build flag and is disabled by default.
We expect that once the SMCs are stabilized, this build flag will
not be required anymore.

Change-Id: I9411eb7787dac2a207bd14710d251503bd9626ce
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>

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Merge "fix(rme): do not trap access to MPAM system registers in Realm mode" into integration

fix(rme): do not trap access to MPAM system registers in Realm mode

Change-Id: I77496ee962727687b28f71a1a15b4fe4133c613c
Signed-off-by: Javier Almansa Sobrino <javier.almansasobrino@arm.com>

feat(rmmd): verify FEAT_MEC present before calling plat hoook

Some platforms do not support FEAT_MEC. Hence, they do not provide
an interface to update the update of the key corresponding to a
MECID

feat(rmmd): verify FEAT_MEC present before calling plat hoook

Some platforms do not support FEAT_MEC. Hence, they do not provide
an interface to update the update of the key corresponding to a
MECID.

This patch adds a condition in order to verify FEAT_MEC is present
before calling the corresponding platform hook, thus preventing it
from being called when the platform does not support the feature.

Change-Id: Ib1eb9e42f475e27ec31529569e888b93b207148c
Signed-off-by: Juan Pablo Conde <juanpablo.conde@arm.com>

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