1 /* 2 * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved. 3 * Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /* 9 * ZynqMP system level PM-API functions and communication with PMU via 10 * IPI interrupts 11 */ 12 13 #include <arch_helpers.h> 14 #include <plat/common/platform.h> 15 #include <plat_pm_common.h> 16 17 #include "pm_api_clock.h" 18 #include "pm_api_ioctl.h" 19 #include "pm_api_pinctrl.h" 20 #include "pm_client.h" 21 #include "pm_common.h" 22 #include "pm_ipi.h" 23 #include "zynqmp_pm_api_sys.h" 24 25 #define PM_QUERY_FEATURE_BITMASK ( \ 26 (1ULL << (uint64_t)PM_QID_CLOCK_GET_NAME) | \ 27 (1ULL << (uint64_t)PM_QID_CLOCK_GET_TOPOLOGY) | \ 28 (1ULL << (uint64_t)PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS) | \ 29 (1ULL << (uint64_t)PM_QID_CLOCK_GET_PARENTS) | \ 30 (1ULL << (uint64_t)PM_QID_CLOCK_GET_ATTRIBUTES) | \ 31 (1ULL << (uint64_t)PM_QID_PINCTRL_GET_NUM_PINS) | \ 32 (1ULL << (uint64_t)PM_QID_PINCTRL_GET_NUM_FUNCTIONS) | \ 33 (1ULL << (uint64_t)PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS) | \ 34 (1ULL << (uint64_t)PM_QID_PINCTRL_GET_FUNCTION_NAME) | \ 35 (1ULL << (uint64_t)PM_QID_PINCTRL_GET_FUNCTION_GROUPS) | \ 36 (1ULL << (uint64_t)PM_QID_PINCTRL_GET_PIN_GROUPS) | \ 37 (1ULL << (uint64_t)PM_QID_CLOCK_GET_NUM_CLOCKS) | \ 38 (1ULL << (uint64_t)PM_QID_CLOCK_GET_MAX_DIVISOR)) 39 40 /** 41 * typedef eemi_api_dependency - Dependent EEMI APIs which are implemented 42 * on both the TF-A and firmware. 43 * @id: EEMI API id or IOCTL id to be checked. 44 * @api_id: Dependent EEMI API. 45 * 46 */ 47 typedef struct __attribute__((packed)) { 48 uint8_t id; 49 uint8_t api_id; 50 } eemi_api_dependency; 51 52 /* Dependent APIs for TF-A to check their version from firmware */ 53 static const eemi_api_dependency api_dep_table[] = { 54 { 55 .id = (uint8_t)PM_SELF_SUSPEND, 56 .api_id = (uint8_t)PM_SELF_SUSPEND, 57 }, 58 { 59 .id = (uint8_t)PM_REQ_WAKEUP, 60 .api_id = (uint8_t)PM_REQ_WAKEUP, 61 }, 62 { 63 .id = (uint8_t)PM_ABORT_SUSPEND, 64 .api_id = (uint8_t)PM_ABORT_SUSPEND, 65 }, 66 { 67 .id = (uint8_t)PM_SET_WAKEUP_SOURCE, 68 .api_id = (uint8_t)PM_SET_WAKEUP_SOURCE, 69 }, 70 { 71 .id = (uint8_t)PM_SYSTEM_SHUTDOWN, 72 .api_id = (uint8_t)PM_SYSTEM_SHUTDOWN, 73 }, 74 { 75 .id = (uint8_t)PM_GET_API_VERSION, 76 .api_id = (uint8_t)PM_GET_API_VERSION, 77 }, 78 { 79 .id = (uint8_t)PM_CLOCK_ENABLE, 80 .api_id = (uint8_t)PM_PLL_SET_MODE, 81 }, 82 { 83 .id = (uint8_t)PM_CLOCK_ENABLE, 84 .api_id = (uint8_t)PM_CLOCK_ENABLE, 85 }, 86 { 87 .id = (uint8_t)PM_CLOCK_DISABLE, 88 .api_id = (uint8_t)PM_PLL_SET_MODE, 89 }, 90 { 91 .id = (uint8_t)PM_CLOCK_DISABLE, 92 .api_id = (uint8_t)PM_CLOCK_DISABLE, 93 }, 94 { 95 .id = (uint8_t)PM_CLOCK_GETSTATE, 96 .api_id = (uint8_t)PM_PLL_GET_MODE, 97 }, 98 { 99 .id = (uint8_t)PM_CLOCK_GETSTATE, 100 .api_id = (uint8_t)PM_CLOCK_GETSTATE, 101 }, 102 { 103 .id = (uint8_t)PM_CLOCK_SETDIVIDER, 104 .api_id = (uint8_t)PM_PLL_SET_PARAMETER, 105 }, 106 { 107 .id = (uint8_t)PM_CLOCK_SETDIVIDER, 108 .api_id = (uint8_t)PM_CLOCK_SETDIVIDER, 109 }, 110 { 111 .id = (uint8_t)PM_CLOCK_GETDIVIDER, 112 .api_id = (uint8_t)PM_PLL_GET_PARAMETER, 113 }, 114 { 115 .id = (uint8_t)PM_CLOCK_GETDIVIDER, 116 .api_id = (uint8_t)PM_CLOCK_GETDIVIDER, 117 }, 118 { 119 .id = (uint8_t)PM_CLOCK_SETPARENT, 120 .api_id = (uint8_t)PM_PLL_SET_PARAMETER, 121 }, 122 { 123 .id = (uint8_t)PM_CLOCK_SETPARENT, 124 .api_id = (uint8_t)PM_CLOCK_SETPARENT, 125 }, 126 { 127 .id = (uint8_t)PM_CLOCK_GETPARENT, 128 .api_id = (uint8_t)PM_PLL_GET_PARAMETER, 129 }, 130 { 131 .id = (uint8_t)PM_CLOCK_GETPARENT, 132 .api_id = (uint8_t)PM_CLOCK_GETPARENT, 133 }, 134 { 135 .id = (uint8_t)PM_PLL_SET_PARAMETER, 136 .api_id = (uint8_t)PM_PLL_SET_PARAMETER, 137 }, 138 { 139 .id = (uint8_t)PM_PLL_GET_PARAMETER, 140 .api_id = (uint8_t)PM_PLL_GET_PARAMETER, 141 }, 142 { 143 .id = (uint8_t)PM_PLL_SET_MODE, 144 .api_id = (uint8_t)PM_PLL_SET_MODE, 145 }, 146 { 147 .id = (uint8_t)PM_PLL_GET_MODE, 148 .api_id = (uint8_t)PM_PLL_GET_MODE, 149 }, 150 { 151 .id = (uint8_t)PM_REGISTER_ACCESS, 152 .api_id = (uint8_t)PM_MMIO_WRITE, 153 }, 154 { 155 .id = (uint8_t)PM_REGISTER_ACCESS, 156 .api_id = (uint8_t)PM_MMIO_READ, 157 }, 158 { 159 .id = (uint8_t)PM_FEATURE_CHECK, 160 .api_id = (uint8_t)PM_FEATURE_CHECK, 161 }, 162 { 163 .id = (uint8_t)IOCTL_SET_TAPDELAY_BYPASS, 164 .api_id = (uint8_t)PM_MMIO_WRITE, 165 }, 166 { 167 .id = (uint8_t)IOCTL_SD_DLL_RESET, 168 .api_id = (uint8_t)PM_MMIO_WRITE, 169 }, 170 { 171 .id = (uint8_t)IOCTL_SET_SD_TAPDELAY, 172 .api_id = (uint8_t)PM_MMIO_WRITE, 173 }, 174 { 175 .id = (uint8_t)IOCTL_SET_SD_TAPDELAY, 176 .api_id = (uint8_t)PM_MMIO_READ, 177 }, 178 { 179 .id = (uint8_t)IOCTL_SET_PLL_FRAC_DATA, 180 .api_id = (uint8_t)PM_PLL_SET_PARAMETER, 181 }, 182 { 183 .id = (uint8_t)IOCTL_GET_PLL_FRAC_DATA, 184 .api_id = (uint8_t)PM_PLL_GET_PARAMETER, 185 }, 186 { 187 .id = (uint8_t)IOCTL_WRITE_GGS, 188 .api_id = (uint8_t)PM_MMIO_WRITE, 189 }, 190 { 191 .id = (uint8_t)IOCTL_READ_GGS, 192 .api_id = (uint8_t)PM_MMIO_READ, 193 }, 194 { 195 .id = (uint8_t)IOCTL_WRITE_PGGS, 196 .api_id = (uint8_t)PM_MMIO_WRITE, 197 }, 198 { 199 .id = (uint8_t)IOCTL_READ_PGGS, 200 .api_id = (uint8_t)PM_MMIO_READ, 201 }, 202 { 203 .id = (uint8_t)IOCTL_ULPI_RESET, 204 .api_id = (uint8_t)PM_MMIO_WRITE, 205 }, 206 { 207 .id = (uint8_t)IOCTL_SET_BOOT_HEALTH_STATUS, 208 .api_id = (uint8_t)PM_MMIO_WRITE, 209 }, 210 { 211 .id = (uint8_t)IOCTL_AFI, 212 .api_id = (uint8_t)PM_MMIO_WRITE, 213 }, 214 }; 215 216 /* Expected firmware API version to TF-A */ 217 static const uint8_t tfa_expected_ver_id[] = { 218 [PM_SELF_SUSPEND] = FW_API_BASE_VERSION, 219 [PM_REQ_WAKEUP] = FW_API_BASE_VERSION, 220 [PM_ABORT_SUSPEND] = FW_API_BASE_VERSION, 221 [PM_SET_WAKEUP_SOURCE] = FW_API_BASE_VERSION, 222 [PM_SYSTEM_SHUTDOWN] = FW_API_BASE_VERSION, 223 [PM_GET_API_VERSION] = FW_API_BASE_VERSION, 224 [PM_PLL_SET_MODE] = FW_API_BASE_VERSION, 225 [PM_PLL_GET_MODE] = FW_API_BASE_VERSION, 226 [PM_CLOCK_ENABLE] = FW_API_BASE_VERSION, 227 [PM_CLOCK_DISABLE] = FW_API_BASE_VERSION, 228 [PM_CLOCK_GETSTATE] = FW_API_BASE_VERSION, 229 [PM_PLL_SET_PARAMETER] = FW_API_BASE_VERSION, 230 [PM_PLL_GET_PARAMETER] = FW_API_BASE_VERSION, 231 [PM_CLOCK_SETDIVIDER] = FW_API_BASE_VERSION, 232 [PM_CLOCK_GETDIVIDER] = FW_API_BASE_VERSION, 233 [PM_CLOCK_SETPARENT] = FW_API_BASE_VERSION, 234 [PM_CLOCK_GETPARENT] = FW_API_BASE_VERSION, 235 [PM_MMIO_WRITE] = FW_API_BASE_VERSION, 236 [PM_MMIO_READ] = FW_API_BASE_VERSION, 237 [PM_FEATURE_CHECK] = FW_API_VERSION_2, 238 }; 239 240 /* default shutdown/reboot scope is system(2) */ 241 static uint32_t pm_shutdown_scope = PMF_SHUTDOWN_SUBTYPE_SYSTEM; 242 243 /** 244 * pm_get_shutdown_scope() - Get the currently set shutdown scope. 245 * 246 * Return: Shutdown scope value. 247 * 248 */ 249 uint32_t pm_get_shutdown_scope(void) 250 { 251 return pm_shutdown_scope; 252 } 253 254 /** 255 * pm_self_suspend() - PM call for processor to suspend itself. 256 * @nid: Node id of the processor or subsystem. 257 * @latency: Requested maximum wakeup latency (not supported). 258 * @state: Requested state. 259 * @address: Resume address. 260 * @flag: 0 - Call from secure source. 261 * 1 - Call from non-secure source. 262 * 263 * This is a blocking call, it will return only once PMU has responded. 264 * On a wakeup, resume address will be automatically set by PMU. 265 * 266 * Return: Returns status, either success or error+reason. 267 * 268 */ 269 enum pm_ret_status pm_self_suspend(enum pm_node_id nid, 270 uint32_t latency, 271 uint32_t state, 272 uintptr_t address, 273 uint32_t flag) 274 { 275 (void)nid; 276 uint32_t payload[PAYLOAD_ARG_CNT]; 277 uint32_t cpuid = plat_my_core_pos(); 278 const struct pm_proc *proc = pm_get_proc(cpuid); 279 280 if (proc == NULL) { 281 WARN("Failed to get proc %d\n", cpuid); 282 return PM_RET_ERROR_INTERNAL; 283 } 284 285 /* 286 * Do client specific suspend operations 287 * (e.g. set powerdown request bit) 288 */ 289 pm_client_suspend(proc, state, flag); 290 /* Send request to the PMU */ 291 PM_PACK_PAYLOAD6(payload, flag, PM_SELF_SUSPEND, proc->node_id, 292 latency, state, address, (address >> 32)); 293 return pm_ipi_send_sync(proc, payload, NULL, 0); 294 } 295 296 /** 297 * pm_req_suspend() - PM call to request for another PU or subsystem to 298 * be suspended gracefully. 299 * @target: Node id of the targeted PU or subsystem. 300 * @ack: Flag to specify whether acknowledge is requested. 301 * @latency: Requested wakeup latency (not supported). 302 * @state: Requested state (not supported). 303 * @flag: 0 - Call from secure source. 304 * 1 - Call from non-secure source. 305 * 306 * Return: Returns status, either success or error+reason. 307 * 308 */ 309 enum pm_ret_status pm_req_suspend(enum pm_node_id target, 310 enum pm_request_ack ack, 311 uint32_t latency, uint32_t state, 312 uint32_t flag) 313 { 314 uint32_t payload[PAYLOAD_ARG_CNT]; 315 enum pm_ret_status ret = PM_RET_SUCCESS; 316 317 /* Send request to the PMU */ 318 PM_PACK_PAYLOAD5(payload, flag, PM_REQ_SUSPEND, target, ack, latency, state); 319 if (ack == REQ_ACK_BLOCKING) { 320 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 321 } else { 322 ret = pm_ipi_send(primary_proc, payload); 323 } 324 325 return ret; 326 } 327 328 /** 329 * pm_req_wakeup() - PM call for processor to wake up selected processor 330 * or subsystem. 331 * @target: Node id of the processor or subsystem to wake up. 332 * @ack: Flag to specify whether acknowledge requested. 333 * @set_address: Resume address presence indicator. 334 * 1 resume address specified, 0 otherwise. 335 * @address: Resume address. 336 * @flag: 0 - Call from secure source. 337 * 1 - Call from non-secure source. 338 * 339 * This API function is either used to power up another APU core for SMP 340 * (by PSCI) or to power up an entirely different PU or subsystem, such 341 * as RPU0, RPU, or PL_CORE_xx. Resume address for the target PU will be 342 * automatically set by PMU. 343 * 344 * Return: Returns status, either success or error+reason. 345 * 346 */ 347 enum pm_ret_status pm_req_wakeup(enum pm_node_id target, 348 uint32_t set_address, 349 uintptr_t address, 350 enum pm_request_ack ack, 351 uint32_t flag) 352 { 353 uint32_t payload[PAYLOAD_ARG_CNT]; 354 uint64_t encoded_address; 355 enum pm_ret_status ret = PM_RET_SUCCESS; 356 357 /* encode set Address into 1st bit of address */ 358 encoded_address = address; 359 encoded_address |= (uint32_t)!!set_address; 360 361 /* Send request to the PMU to perform the wake of the PU */ 362 PM_PACK_PAYLOAD5(payload, flag, PM_REQ_WAKEUP, target, encoded_address, 363 encoded_address >> 32, ack); 364 365 if (ack == REQ_ACK_BLOCKING) { 366 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 367 } else { 368 ret = pm_ipi_send(primary_proc, payload); 369 } 370 371 return ret; 372 } 373 374 /** 375 * pm_force_powerdown() - PM call to request for another PU or subsystem to 376 * be powered down forcefully. 377 * @target: Node id of the targeted PU or subsystem. 378 * @ack: Flag to specify whether acknowledge is requested. 379 * @flag: 0 - Call from secure source. 380 * 1 - Call from non-secure source. 381 * 382 * Return: Returns status, either success or error+reason. 383 * 384 */ 385 enum pm_ret_status pm_force_powerdown(enum pm_node_id target, 386 enum pm_request_ack ack, 387 uint32_t flag) 388 { 389 uint32_t payload[PAYLOAD_ARG_CNT]; 390 enum pm_ret_status ret = PM_RET_SUCCESS; 391 392 /* Send request to the PMU */ 393 PM_PACK_PAYLOAD3(payload, flag, PM_FORCE_POWERDOWN, target, ack); 394 395 if (ack == REQ_ACK_BLOCKING) { 396 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 397 } else { 398 ret = pm_ipi_send(primary_proc, payload); 399 } 400 401 return ret; 402 } 403 404 /** 405 * pm_abort_suspend() - PM call to announce that a prior suspend request 406 * is to be aborted. 407 * @reason: Reason for the abort. 408 * @flag: 0 - Call from secure source. 409 * 1 - Call from non-secure source. 410 * 411 * Calling PU expects the PMU to abort the initiated suspend procedure. 412 * This is a non-blocking call without any acknowledge. 413 * 414 * Return: Returns status, either success or error+reason 415 * 416 */ 417 enum pm_ret_status pm_abort_suspend(enum pm_abort_reason reason, uint32_t flag) 418 { 419 uint32_t payload[PAYLOAD_ARG_CNT]; 420 421 /* 422 * Do client specific abort suspend operations 423 * (e.g. enable interrupts and clear powerdown request bit) 424 */ 425 pm_client_abort_suspend(); 426 /* Send request to the PMU */ 427 /* TODO: allow passing the node ID of the affected CPU */ 428 PM_PACK_PAYLOAD3(payload, flag, PM_ABORT_SUSPEND, reason, 429 primary_proc->node_id); 430 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 431 } 432 433 /** 434 * pm_set_wakeup_source() - PM call to specify the wakeup source while 435 * suspended. 436 * @target: Node id of the targeted PU or subsystem. 437 * @wkup_node: Node id of the wakeup peripheral. 438 * @enable: Enable or disable the specified peripheral as wake source. 439 * @flag: 0 - Call from secure source. 440 * 1 - Call from non-secure source. 441 * 442 * Return: Returns status, either success or error+reason. 443 * 444 */ 445 enum pm_ret_status pm_set_wakeup_source(enum pm_node_id target, 446 enum pm_node_id wkup_node, 447 uint32_t enable, 448 uint32_t flag) 449 { 450 uint32_t payload[PAYLOAD_ARG_CNT]; 451 452 PM_PACK_PAYLOAD4(payload, flag, PM_SET_WAKEUP_SOURCE, target, wkup_node, 453 enable); 454 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 455 } 456 457 /** 458 * pm_system_shutdown() - PM call to request a system shutdown or restart. 459 * @type: Shutdown or restart? 0=shutdown, 1=restart, 2=setscope. 460 * @subtype: Scope: 0=APU-subsystem, 1=PS, 2=system. 461 * @flag: 0 - Call from secure source. 462 * 1 - Call from non-secure source. 463 * 464 * Return: Returns status, either success or error+reason. 465 * 466 */ 467 enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype, 468 uint32_t flag) 469 { 470 uint32_t payload[PAYLOAD_ARG_CNT]; 471 enum pm_ret_status ret = PM_RET_SUCCESS; 472 473 if (type == (uint32_t)PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY) { 474 /* Setting scope for subsequent PSCI reboot or shutdown */ 475 pm_shutdown_scope = subtype; 476 } else { 477 PM_PACK_PAYLOAD3(payload, flag, PM_SYSTEM_SHUTDOWN, type, subtype); 478 ret = pm_ipi_send_non_blocking(primary_proc, payload); 479 } 480 481 return ret; 482 } 483 484 /* APIs for managing PM slaves: */ 485 486 /** 487 * pm_req_node() - PM call to request a node with specific capabilities. 488 * @nid: Node id of the slave. 489 * @capabilities: Requested capabilities of the slave. 490 * @qos: Quality of service (not supported). 491 * @ack: Flag to specify whether acknowledge is requested. 492 * @flag: 0 - Call from secure source. 493 * 1 - Call from non-secure source. 494 * 495 * Return: Returns status, either success or error+reason. 496 * 497 */ 498 enum pm_ret_status pm_req_node(enum pm_node_id nid, 499 uint32_t capabilities, 500 uint32_t qos, 501 enum pm_request_ack ack, 502 uint32_t flag) 503 { 504 uint32_t payload[PAYLOAD_ARG_CNT]; 505 enum pm_ret_status ret = PM_RET_SUCCESS; 506 507 PM_PACK_PAYLOAD5(payload, flag, PM_REQ_NODE, nid, capabilities, qos, ack); 508 509 if (ack == REQ_ACK_BLOCKING) { 510 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 511 } else { 512 ret = pm_ipi_send(primary_proc, payload); 513 } 514 515 return ret; 516 } 517 518 /** 519 * pm_set_requirement() - PM call to set requirement for PM slaves. 520 * @nid: Node id of the slave. 521 * @capabilities: Requested capabilities of the slave. 522 * @qos: Quality of service (not supported). 523 * @ack: Flag to specify whether acknowledge is requested. 524 * @flag: 0 - Call from secure source. 525 * 1 - Call from non-secure source. 526 * 527 * This API function is to be used for slaves a PU already has requested. 528 * 529 * Return: Returns status, either success or error+reason. 530 * 531 */ 532 enum pm_ret_status pm_set_requirement(enum pm_node_id nid, 533 uint32_t capabilities, 534 uint32_t qos, 535 enum pm_request_ack ack, 536 uint32_t flag) 537 { 538 uint32_t payload[PAYLOAD_ARG_CNT]; 539 enum pm_ret_status ret = PM_RET_SUCCESS; 540 541 PM_PACK_PAYLOAD5(payload, flag, PM_SET_REQUIREMENT, nid, capabilities, qos, 542 ack); 543 544 if (ack == REQ_ACK_BLOCKING) { 545 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 546 } else { 547 ret = pm_ipi_send(primary_proc, payload); 548 } 549 550 return ret; 551 } 552 553 /* Miscellaneous API functions */ 554 555 /** 556 * pm_get_api_version() - Get version number of PMU PM firmware. 557 * @version: Returns 32-bit version number of PMU Power Management Firmware. 558 * @flag: 0 - Call from secure source. 559 * 1 - Call from non-secure source. 560 * 561 * Return: Returns status, either success or error+reason. 562 * 563 */ 564 enum pm_ret_status pm_get_api_version(uint32_t *version, uint32_t flag) 565 { 566 uint32_t payload[PAYLOAD_ARG_CNT]; 567 enum pm_ret_status ret; 568 569 /* Send request to the PMU */ 570 PM_PACK_PAYLOAD1(payload, flag, PM_GET_API_VERSION); 571 ret = pm_ipi_send_sync(primary_proc, payload, version, 1); 572 return ret; 573 } 574 575 /** 576 * pm_get_node_status() - PM call to request a node's current status. 577 * @nid: Node id. 578 * @ret_buff: Buffer for the return values 579 * [0] - Current power state of the node 580 * [1] - Current requirements for the node (slave nodes only) 581 * [2] - Current usage status for the node (slave nodes only) 582 * @flag: 0 - Call from secure source. 583 * 1 - Call from non-secure source. 584 * 585 * Return: Returns status, either success or error+reason. 586 * 587 */ 588 enum pm_ret_status pm_get_node_status(enum pm_node_id nid, 589 uint32_t *ret_buff, 590 uint32_t flag) 591 { 592 uint32_t payload[PAYLOAD_ARG_CNT]; 593 594 PM_PACK_PAYLOAD2(payload, flag, PM_GET_NODE_STATUS, nid); 595 return pm_ipi_send_sync(primary_proc, payload, ret_buff, 3); 596 } 597 598 /** 599 * pm_mmio_write() - Perform write to protected mmio. 600 * @address: Address to write to. 601 * @mask: Mask to apply. 602 * @value: Value to write. 603 * @flag: 0 - Call from secure source. 604 * 1 - Call from non-secure source. 605 * 606 * This function provides access to PM-related control registers 607 * that may not be directly accessible by a particular PU. 608 * 609 * Return: Returns status, either success or error+reason. 610 * 611 */ 612 enum pm_ret_status pm_mmio_write(uintptr_t address, 613 uint32_t mask, 614 uint32_t value, 615 uint32_t flag) 616 { 617 uint32_t payload[PAYLOAD_ARG_CNT]; 618 619 /* Send request to the PMU */ 620 PM_PACK_PAYLOAD4(payload, flag, PM_MMIO_WRITE, address, mask, value); 621 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 622 } 623 624 /** 625 * pm_mmio_read() - Read value from protected mmio. 626 * @address: Address to write to. 627 * @value: Value to write. 628 * @flag: 0 - Call from secure source. 629 * 1 - Call from non-secure source. 630 * 631 * This function provides access to PM-related control registers 632 * that may not be directly accessible by a particular PU. 633 * 634 * Return: Returns status, either success or error+reason. 635 * 636 */ 637 enum pm_ret_status pm_mmio_read(uintptr_t address, uint32_t *value, uint32_t flag) 638 { 639 uint32_t payload[PAYLOAD_ARG_CNT]; 640 641 /* Send request to the PMU */ 642 PM_PACK_PAYLOAD2(payload, flag, PM_MMIO_READ, address); 643 return pm_ipi_send_sync(primary_proc, payload, value, 1); 644 } 645 646 /** 647 * pm_fpga_load() - Load the bitstream into the PL. This function provides 648 * access to the xilfpga library to load the Bit-stream 649 * into PL. 650 * @address_low: lower 32-bit Linear memory space address. 651 * @address_high: higher 32-bit Linear memory space address. 652 * @size: Number of 32bit words. 653 * @flags: Additional flags or settings for the fpga operation. 654 * @security_flag: 0 - Call from secure source. 655 * 1 - Call from non-secure source. 656 * 657 * Return: Returns status, either success or error+reason. 658 * 659 */ 660 enum pm_ret_status pm_fpga_load(uint32_t address_low, 661 uint32_t address_high, 662 uint32_t size, 663 uint32_t flags, 664 uint32_t security_flag) 665 { 666 uint32_t payload[PAYLOAD_ARG_CNT]; 667 668 /* Send request to the PMU */ 669 PM_PACK_PAYLOAD5(payload, security_flag, PM_FPGA_LOAD, address_high, 670 address_low, size, flags); 671 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 672 } 673 674 /** 675 * pm_fpga_get_status() - Read value from fpga status register. 676 * @value: Value to read. 677 * @flag: 0 - Call from secure source. 678 * 1 - Call from non-secure source. 679 * 680 * This function provides access to the xilfpga library to get 681 * the fpga status. 682 * 683 * Return: Returns status, either success or error+reason. 684 * 685 */ 686 enum pm_ret_status pm_fpga_get_status(uint32_t *value, uint32_t flag) 687 { 688 uint32_t payload[PAYLOAD_ARG_CNT]; 689 690 /* Send request to the PMU */ 691 PM_PACK_PAYLOAD1(payload, flag, PM_FPGA_GET_STATUS); 692 return pm_ipi_send_sync(primary_proc, payload, value, 1); 693 } 694 695 /** 696 * pm_get_chipid() - Read silicon ID registers. 697 * @value: Buffer for return values. Must be large enough to hold 8 bytes. 698 * @flag: 0 - Call from secure source. 699 * 1 - Call from non-secure source. 700 * 701 * Return: Returns silicon ID registers. 702 * 703 */ 704 enum pm_ret_status pm_get_chipid(uint32_t *value, uint32_t flag) 705 { 706 uint32_t payload[PAYLOAD_ARG_CNT]; 707 708 /* Send request to the PMU */ 709 PM_PACK_PAYLOAD1(payload, flag, PM_GET_CHIPID); 710 return pm_ipi_send_sync(primary_proc, payload, value, 2); 711 } 712 713 /** 714 * pm_secure_rsaaes() - Load the secure images. 715 * @address_low: lower 32-bit Linear memory space address. 716 * @address_high: higher 32-bit Linear memory space address. 717 * @size: Number of 32bit words. 718 * @flags: Additional flags or settings for the fpga operation. 719 * @security_flag: 0 - Call from secure source. 720 * 1 - Call from non-secure source. 721 * 722 * This function provides access to the xilsecure library to load the 723 * authenticated, encrypted, and authenticated/encrypted images. 724 * 725 * Return: Returns status, either success or error+reason. 726 * 727 */ 728 enum pm_ret_status pm_secure_rsaaes(uint32_t address_low, 729 uint32_t address_high, 730 uint32_t size, 731 uint32_t flags, 732 uint32_t security_flag) 733 { 734 uint32_t payload[PAYLOAD_ARG_CNT]; 735 736 /* Send request to the PMU */ 737 PM_PACK_PAYLOAD5(payload, security_flag, PM_SECURE_RSA_AES, address_high, 738 address_low, size, flags); 739 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 740 } 741 742 /** 743 * pm_aes_engine() - Aes data blob encryption/decryption. 744 * @address_low: lower 32-bit address of the AesParams structure. 745 * @address_high: higher 32-bit address of the AesParams structure. 746 * @value: Returned output value. 747 * @flag: 0 - Call from secure source. 748 * 1 - Call from non-secure source. 749 * 750 * This function provides access to the xilsecure library to 751 * encrypt/decrypt data blobs. 752 * 753 * Return: Returns status, either success or error+reason. 754 * 755 */ 756 enum pm_ret_status pm_aes_engine(uint32_t address_high, 757 uint32_t address_low, 758 uint32_t *value, 759 uint32_t flag) 760 { 761 uint32_t payload[PAYLOAD_ARG_CNT]; 762 763 /* Send request to the PMU */ 764 PM_PACK_PAYLOAD3(payload, flag, PM_SECURE_AES, address_high, address_low); 765 return pm_ipi_send_sync(primary_proc, payload, value, 1); 766 } 767 768 /** 769 * pm_get_callbackdata() - Read from IPI response buffer. 770 * @data: array of PAYLOAD_ARG_CNT elements. 771 * @count: Number of values to return. 772 * 773 * Read value from ipi buffer response buffer. 774 * Return: Returns status, either success or error. 775 * 776 */ 777 enum pm_ret_status pm_get_callbackdata(uint32_t *data, size_t count) 778 { 779 enum pm_ret_status ret = PM_RET_SUCCESS; 780 781 /* Return if interrupt is not from PMU */ 782 if ((pm_ipi_irq_status(primary_proc) == 0U)) { 783 goto exit_label; 784 } 785 786 ret = pm_ipi_buff_read_callb(data, count); 787 pm_ipi_irq_clear(primary_proc); 788 789 exit_label: 790 return ret; 791 } 792 793 /** 794 * pm_ioctl() - PM IOCTL API for device control and configs. 795 * @nid: Node ID of the device. 796 * @ioctl_id: ID of the requested IOCTL. 797 * @arg1: Argument 1 to requested IOCTL call. 798 * @arg2: Argument 2 to requested IOCTL call. 799 * @value: Returned output value. 800 * @flag: 0 - Call from secure source. 801 * 1 - Call from non-secure source. 802 * 803 * This function calls IOCTL to firmware for device control and configuration. 804 * 805 * Return: Returns status, either success or error+reason. 806 * 807 */ 808 enum pm_ret_status pm_ioctl(enum pm_node_id nid, 809 uint32_t ioctl_id, 810 uint32_t arg1, 811 uint32_t arg2, 812 uint32_t *value, 813 uint32_t flag) 814 { 815 return pm_api_ioctl(nid, ioctl_id, arg1, arg2, value, flag); 816 } 817 818 /** 819 * fw_api_version() - Returns API version implemented in firmware. 820 * @id: API ID to check. 821 * @version: Returned supported API version. 822 * @len: Number of words to be returned. 823 * @flag: 0 - Call from secure source. 824 * 1 - Call from non-secure source. 825 * 826 * Return: Returns status, either success or error+reason. 827 * 828 */ 829 static enum pm_ret_status fw_api_version(uint32_t id, uint32_t *version, 830 uint32_t len, uint32_t flag) 831 { 832 uint32_t payload[PAYLOAD_ARG_CNT]; 833 834 PM_PACK_PAYLOAD2(payload, flag, PM_FEATURE_CHECK, id); 835 return pm_ipi_send_sync(primary_proc, payload, version, len); 836 } 837 838 /** 839 * check_api_dependency() - API to check dependent EEMI API version. 840 * @id: EEMI API ID to check. 841 * @flag: 0 - Call from secure source. 842 * 1 - Call from non-secure source. 843 * 844 * Return: Returns status, either success or error+reason. 845 * 846 */ 847 enum pm_ret_status check_api_dependency(uint8_t id, uint32_t flag) 848 { 849 uint8_t i; 850 uint32_t version_type; 851 enum pm_ret_status ret = PM_RET_SUCCESS; 852 853 for (i = 0U; i < ARRAY_SIZE(api_dep_table); i++) { 854 if (api_dep_table[i].id == id) { 855 if (api_dep_table[i].api_id == 0U) { 856 break; 857 } 858 859 ret = fw_api_version(api_dep_table[i].api_id, 860 &version_type, 1, flag); 861 if (ret != PM_RET_SUCCESS) { 862 goto exit_label; 863 } 864 865 /* Check if fw version matches TF-A expected version */ 866 if (version_type != tfa_expected_ver_id[api_dep_table[i].api_id]) { 867 ret = PM_RET_ERROR_NOTSUPPORTED; 868 goto exit_label; 869 } 870 } 871 } 872 873 exit_label: 874 return ret; 875 } 876 877 /** 878 * feature_check_tfa() - These are API's completely implemented in TF-A. 879 * @api_id: API ID to check. 880 * @version: Returned supported API version. 881 * @bit_mask: Returned supported IOCTL id version. 882 * 883 * Return: Returns status, either success or error+reason. 884 * 885 */ 886 static enum pm_ret_status feature_check_tfa(uint32_t api_id, uint32_t *version, 887 uint32_t *bit_mask) 888 { 889 enum pm_ret_status ret = PM_RET_ERROR_NO_FEATURE; 890 891 switch (api_id) { 892 case PM_QUERY_DATA: 893 *version = TFA_API_QUERY_DATA_VERSION; 894 bit_mask[0] = (uint32_t)(PM_QUERY_FEATURE_BITMASK); 895 bit_mask[1] = (uint32_t)(PM_QUERY_FEATURE_BITMASK >> 32); 896 ret = PM_RET_SUCCESS; 897 break; 898 case PM_GET_CALLBACK_DATA: 899 case PM_GET_TRUSTZONE_VERSION: 900 case PM_SET_SUSPEND_MODE: 901 *version = TFA_API_BASE_VERSION; 902 ret = PM_RET_SUCCESS; 903 break; 904 default: 905 break; 906 } 907 908 return ret; 909 } 910 911 /** 912 * get_tfa_version_for_partial_apis() - Return TF-A version for partially. 913 * implemented APIs 914 * @api_id: API ID to check. 915 * @version: Returned supported API version. 916 * 917 * Return: Returns status, either success or error+reason. 918 * 919 */ 920 static enum pm_ret_status get_tfa_version_for_partial_apis(uint32_t api_id, 921 uint32_t *version) 922 { 923 enum pm_ret_status ret = PM_RET_ERROR_ARGS; 924 925 switch (api_id) { 926 case PM_SELF_SUSPEND: 927 case PM_REQ_WAKEUP: 928 case PM_ABORT_SUSPEND: 929 case PM_SET_WAKEUP_SOURCE: 930 case PM_SYSTEM_SHUTDOWN: 931 case PM_GET_API_VERSION: 932 case PM_CLOCK_ENABLE: 933 case PM_CLOCK_DISABLE: 934 case PM_CLOCK_GETSTATE: 935 case PM_CLOCK_SETDIVIDER: 936 case PM_CLOCK_GETDIVIDER: 937 case PM_CLOCK_SETPARENT: 938 case PM_CLOCK_GETPARENT: 939 case PM_PLL_SET_PARAMETER: 940 case PM_PLL_GET_PARAMETER: 941 case PM_PLL_SET_MODE: 942 case PM_PLL_GET_MODE: 943 case PM_REGISTER_ACCESS: 944 *version = TFA_API_BASE_VERSION; 945 ret = PM_RET_SUCCESS; 946 break; 947 case PM_FEATURE_CHECK: 948 *version = FW_API_VERSION_2; 949 ret = PM_RET_SUCCESS; 950 break; 951 default: 952 break; 953 } 954 955 return ret; 956 } 957 958 /** 959 * feature_check_partial() - These are API's partially implemented in 960 * TF-A and firmware both. 961 * @api_id: API ID to check. 962 * @version: Returned supported API version. 963 * @flag: 0 - Call from secure source. 964 * 1 - Call from non-secure source. 965 * 966 * Return: Returns status, either success or error+reason. 967 * 968 */ 969 static enum pm_ret_status feature_check_partial(uint32_t api_id, 970 uint32_t *version, 971 uint32_t flag) 972 { 973 uint32_t status; 974 uint32_t ret = PM_RET_ERROR_NO_FEATURE; 975 976 switch (api_id) { 977 case PM_SELF_SUSPEND: 978 case PM_REQ_WAKEUP: 979 case PM_ABORT_SUSPEND: 980 case PM_SET_WAKEUP_SOURCE: 981 case PM_SYSTEM_SHUTDOWN: 982 case PM_GET_API_VERSION: 983 case PM_CLOCK_ENABLE: 984 case PM_CLOCK_DISABLE: 985 case PM_CLOCK_GETSTATE: 986 case PM_CLOCK_SETDIVIDER: 987 case PM_CLOCK_GETDIVIDER: 988 case PM_CLOCK_SETPARENT: 989 case PM_CLOCK_GETPARENT: 990 case PM_PLL_SET_PARAMETER: 991 case PM_PLL_GET_PARAMETER: 992 case PM_PLL_SET_MODE: 993 case PM_PLL_GET_MODE: 994 case PM_REGISTER_ACCESS: 995 case PM_FEATURE_CHECK: 996 status = check_api_dependency(api_id, flag); 997 if (status != PM_RET_SUCCESS) { 998 ret = status; 999 } else { 1000 ret = get_tfa_version_for_partial_apis(api_id, version); 1001 } 1002 break; 1003 default: 1004 break; 1005 } 1006 1007 return ret; 1008 } 1009 1010 /** 1011 * pm_feature_check() - Returns the supported API version if supported. 1012 * @api_id: API ID to check. 1013 * @version: Returned supported API version. 1014 * @bit_mask: Returned supported IOCTL id version. 1015 * @len: Number of bytes to be returned in bit_mask variable. 1016 * @flag: 0 - Call from secure source. 1017 * 1 - Call from non-secure source. 1018 * 1019 * Return: Returns status, either success or error+reason. 1020 * 1021 */ 1022 enum pm_ret_status pm_feature_check(uint32_t api_id, uint32_t *version, 1023 uint32_t *bit_mask, uint8_t len, 1024 uint32_t flag) 1025 { 1026 uint32_t ret_payload[RET_PAYLOAD_ARG_CNT] = {0U}; 1027 enum pm_ret_status status; 1028 1029 /* Get API version implemented in TF-A */ 1030 status = feature_check_tfa(api_id, version, bit_mask); 1031 if (status != PM_RET_ERROR_NO_FEATURE) { 1032 goto exit_label; 1033 } 1034 1035 /* Get API version implemented by firmware and TF-A both */ 1036 status = feature_check_partial(api_id, version, flag); 1037 if (status != PM_RET_ERROR_NO_FEATURE) { 1038 goto exit_label; 1039 } 1040 1041 /* Get API version implemented by firmware */ 1042 status = fw_api_version(api_id, ret_payload, 3, flag); 1043 /* IOCTL call may return failure whose ID is not implemented in 1044 * firmware but implemented in TF-A 1045 */ 1046 if ((api_id != (uint32_t)PM_IOCTL) && (status != PM_RET_SUCCESS)) { 1047 goto exit_label; 1048 } 1049 1050 *version = ret_payload[0]; 1051 1052 /* Update IOCTL bit mask which are implemented in TF-A */ 1053 if ((api_id == (uint32_t)PM_IOCTL) || (api_id == (uint32_t)PM_GET_OP_CHARACTERISTIC)) { 1054 if (len < 2U) { 1055 status = PM_RET_ERROR_ARGS; 1056 goto exit_label; 1057 } 1058 bit_mask[0] = ret_payload[1]; 1059 bit_mask[1] = ret_payload[2]; 1060 if (api_id == (uint32_t)PM_IOCTL) { 1061 /* Get IOCTL's implemented by TF-A */ 1062 status = tfa_ioctl_bitmask(bit_mask, flag); 1063 } 1064 } else { 1065 /* Requires for MISRA */ 1066 } 1067 1068 exit_label: 1069 return status; 1070 } 1071 1072 /** 1073 * pm_clock_get_max_divisor - PM call to get max divisor. 1074 * @clock_id: Clock ID. 1075 * @div_type: Divisor ID (TYPE_DIV1 or TYPE_DIV2). 1076 * @max_div: Maximum supported divisor. 1077 * 1078 * This function is used by master to get maximum supported value. 1079 * 1080 * Return: Returns status, either success or error+reason. 1081 * 1082 */ 1083 static enum pm_ret_status pm_clock_get_max_divisor(uint32_t clock_id, 1084 uint8_t div_type, 1085 uint32_t *max_div) 1086 { 1087 return pm_api_clock_get_max_divisor(clock_id, div_type, max_div); 1088 } 1089 1090 /** 1091 * pm_clock_get_num_clocks - PM call to request number of clocks. 1092 * @nclocks: Number of clocks. 1093 * 1094 * This function is used by master to get number of clocks. 1095 * 1096 * Return: Returns status, either success or error+reason. 1097 * 1098 */ 1099 static enum pm_ret_status pm_clock_get_num_clocks(uint32_t *nclocks) 1100 { 1101 return pm_api_clock_get_num_clocks(nclocks); 1102 } 1103 1104 /** 1105 * pm_clock_get_name() - PM call to request a clock's name. 1106 * @clock_id: Clock ID. 1107 * @name: Name of clock (max 16 bytes). 1108 * 1109 * This function is used by master to get nmae of clock specified 1110 * by given clock ID. 1111 * 1112 */ 1113 static void pm_clock_get_name(uint32_t clock_id, char *name) 1114 { 1115 pm_api_clock_get_name(clock_id, name); 1116 } 1117 1118 /** 1119 * pm_clock_get_topology() - PM call to request a clock's topology. 1120 * @clock_id: Clock ID. 1121 * @index: Topology index for next toplogy node. 1122 * @topology: Buffer to store nodes in topology and flags. 1123 * 1124 * This function is used by master to get topology information for the 1125 * clock specified by given clock ID. Each response would return 3 1126 * topology nodes. To get next nodes, caller needs to call this API with 1127 * index of next node. Index starts from 0. 1128 * 1129 * Return: Returns status, either success or error+reason. 1130 * 1131 */ 1132 static enum pm_ret_status pm_clock_get_topology(uint32_t clock_id, 1133 uint32_t index, 1134 uint32_t *topology) 1135 { 1136 return pm_api_clock_get_topology(clock_id, index, topology); 1137 } 1138 1139 /** 1140 * pm_clock_get_fixedfactor_params() - PM call to request a clock's fixed factor 1141 * parameters for fixed clock. 1142 * @clock_id: Clock ID. 1143 * @mul: Multiplication value. 1144 * @div: Divisor value. 1145 * 1146 * This function is used by master to get fixed factor parameers for the 1147 * fixed clock. This API is application only for the fixed clock. 1148 * 1149 * Return: Returns status, either success or error+reason. 1150 * 1151 */ 1152 static enum pm_ret_status pm_clock_get_fixedfactor_params(uint32_t clock_id, 1153 uint32_t *mul, 1154 uint32_t *div) 1155 { 1156 return pm_api_clock_get_fixedfactor_params(clock_id, mul, div); 1157 } 1158 1159 /** 1160 * pm_clock_get_parents() - PM call to request a clock's first 3 parents. 1161 * @clock_id: Clock ID. 1162 * @index: Index of next parent. 1163 * @parents: Parents of the given clock. 1164 * 1165 * This function is used by master to get clock's parents information. 1166 * This API will return 3 parents with a single response. To get other 1167 * parents, master should call same API in loop with new parent index 1168 * till error is returned. 1169 * 1170 * E.g First call should have index 0 which will return parents 0, 1 and 1171 * 2. Next call, index should be 3 which will return parent 3,4 and 5 and 1172 * so on. 1173 * 1174 * Return: Returns status, either success or error+reason. 1175 * 1176 */ 1177 static enum pm_ret_status pm_clock_get_parents(uint32_t clock_id, 1178 uint32_t index, 1179 uint32_t *parents) 1180 { 1181 return pm_api_clock_get_parents(clock_id, index, parents); 1182 } 1183 1184 /** 1185 * pm_clock_get_attributes() - PM call to request a clock's attributes. 1186 * @clock_id: Clock ID. 1187 * @attr: Clock attributes. 1188 * 1189 * This function is used by master to get clock's attributes 1190 * (e.g. valid, clock type, etc). 1191 * 1192 * Return: Returns status, either success or error+reason. 1193 * 1194 */ 1195 static enum pm_ret_status pm_clock_get_attributes(uint32_t clock_id, 1196 uint32_t *attr) 1197 { 1198 return pm_api_clock_get_attributes(clock_id, attr); 1199 } 1200 1201 /** 1202 * pm_clock_gate() - Configure clock gate. 1203 * @clock_id: Id of the clock to be configured. 1204 * @enable: Flag 0=disable (gate the clock), !0=enable (activate the clock). 1205 * @flag: 0 - Call from secure source. 1206 * 1 - Call from non-secure source. 1207 * 1208 * Return: Error if an argument is not valid or status as returned by the 1209 * PM controller (PMU). 1210 * 1211 */ 1212 static enum pm_ret_status pm_clock_gate(uint32_t clock_id, 1213 uint8_t enable, 1214 uint32_t flag) 1215 { 1216 uint32_t payload[PAYLOAD_ARG_CNT]; 1217 enum pm_ret_status status; 1218 enum pm_api_id api_id; 1219 1220 /* Check if clock ID is valid and return an error if it is not */ 1221 status = pm_clock_id_is_valid(clock_id); 1222 if (status != PM_RET_SUCCESS) { 1223 goto exit_label; 1224 } 1225 1226 if (enable != 0U) { 1227 api_id = PM_CLOCK_ENABLE; 1228 } else { 1229 api_id = PM_CLOCK_DISABLE; 1230 } 1231 1232 /* Send request to the PMU */ 1233 PM_PACK_PAYLOAD2(payload, flag, api_id, clock_id); 1234 status = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1235 1236 /* If action fails due to the lack of permissions filter the error */ 1237 if (status == PM_RET_ERROR_ACCESS) { 1238 status = PM_RET_SUCCESS; 1239 } 1240 1241 exit_label: 1242 return status; 1243 } 1244 1245 /** 1246 * pm_clock_enable() - Enable the clock for given id. 1247 * @clock_id: Id of the clock to be enabled. 1248 * @flag: 0 - Call from secure source. 1249 * 1 - Call from non-secure source. 1250 * 1251 * This function is used by master to enable the clock 1252 * including peripherals and PLL clocks. 1253 * 1254 * Return: Error if an argument is not valid or status as returned by the 1255 * pm_clock_gate. 1256 * 1257 */ 1258 enum pm_ret_status pm_clock_enable(uint32_t clock_id, uint32_t flag) 1259 { 1260 struct pm_pll *pll; 1261 enum pm_ret_status ret = PM_RET_SUCCESS; 1262 1263 /* First try to handle it as a PLL */ 1264 pll = pm_clock_get_pll(clock_id); 1265 if (pll != NULL) { 1266 ret = pm_clock_pll_enable(pll, flag); 1267 } else { 1268 1269 /* It's an on-chip clock, PMU should configure clock's gate */ 1270 ret = pm_clock_gate(clock_id, 1, flag); 1271 } 1272 1273 return ret; 1274 } 1275 1276 /** 1277 * pm_clock_disable - Disable the clock for given id. 1278 * @clock_id: Id of the clock to be disable. 1279 * @flag: 0 - Call from secure source. 1280 * 1 - Call from non-secure source. 1281 * 1282 * This function is used by master to disable the clock 1283 * including peripherals and PLL clocks. 1284 * 1285 * Return: Error if an argument is not valid or status as returned by the 1286 * pm_clock_gate 1287 * 1288 */ 1289 enum pm_ret_status pm_clock_disable(uint32_t clock_id, uint32_t flag) 1290 { 1291 struct pm_pll *pll; 1292 enum pm_ret_status ret = PM_RET_SUCCESS; 1293 1294 /* First try to handle it as a PLL */ 1295 pll = pm_clock_get_pll(clock_id); 1296 if (pll != NULL) { 1297 ret = pm_clock_pll_disable(pll, flag); 1298 } else { 1299 1300 /* It's an on-chip clock, PMU should configure clock's gate */ 1301 ret = pm_clock_gate(clock_id, 0, flag); 1302 } 1303 1304 return ret; 1305 } 1306 1307 /** 1308 * pm_clock_getstate - Get the clock state for given id. 1309 * @clock_id: Id of the clock to be queried. 1310 * @state: 1/0 (Enabled/Disabled). 1311 * @flag: 0 - Call from secure source. 1312 * 1 - Call from non-secure source. 1313 * 1314 * This function is used by master to get the state of clock 1315 * including peripherals and PLL clocks. 1316 * 1317 * Return: Returns status, either success or error+reason. 1318 * 1319 */ 1320 enum pm_ret_status pm_clock_getstate(uint32_t clock_id, 1321 uint32_t *state, 1322 uint32_t flag) 1323 { 1324 struct pm_pll *pll; 1325 uint32_t payload[PAYLOAD_ARG_CNT]; 1326 enum pm_ret_status status; 1327 1328 /* First try to handle it as a PLL */ 1329 pll = pm_clock_get_pll(clock_id); 1330 if (pll != NULL) { 1331 status = pm_clock_pll_get_state(pll, state, flag); 1332 goto exit_label; 1333 } 1334 /* Check if clock ID is a valid on-chip clock */ 1335 status = pm_clock_id_is_valid(clock_id); 1336 if (status != PM_RET_SUCCESS) { 1337 goto exit_label; 1338 } 1339 1340 /* Send request to the PMU */ 1341 PM_PACK_PAYLOAD2(payload, flag, PM_CLOCK_GETSTATE, clock_id); 1342 status = pm_ipi_send_sync(primary_proc, payload, state, 1); 1343 1344 exit_label: 1345 return status; 1346 } 1347 1348 /** 1349 * pm_clock_setdivider - Set the clock divider for given id. 1350 * @clock_id: Id of the clock. 1351 * @divider: divider value. 1352 * @flag: 0 - Call from secure source. 1353 * 1 - Call from non-secure source. 1354 * 1355 * This function is used by master to set divider for any clock 1356 * to achieve desired rate. 1357 * 1358 * Return: Returns status, either success or error+reason. 1359 * 1360 */ 1361 enum pm_ret_status pm_clock_setdivider(uint32_t clock_id, 1362 uint32_t divider, 1363 uint32_t flag) 1364 { 1365 enum pm_ret_status status; 1366 enum pm_node_id nid; 1367 enum pm_clock_div_id div_id; 1368 uint32_t payload[PAYLOAD_ARG_CNT]; 1369 const uint32_t div0 = 0xFFFF0000; 1370 const uint32_t div1 = 0x0000FFFF; 1371 uint32_t val; 1372 1373 /* Get PLL node ID using PLL clock ID */ 1374 status = pm_clock_get_pll_node_id(clock_id, &nid); 1375 if (status == PM_RET_SUCCESS) { 1376 status = pm_pll_set_parameter(nid, PM_PLL_PARAM_FBDIV, divider, 1377 flag); 1378 goto exit_label; 1379 } 1380 1381 /* Check if clock ID is a valid on-chip clock */ 1382 status = pm_clock_id_is_valid(clock_id); 1383 if (status != PM_RET_SUCCESS) { 1384 goto exit_label; 1385 } 1386 1387 if (div0 == (divider & div0)) { 1388 div_id = PM_CLOCK_DIV0_ID; 1389 val = divider & ~div0; 1390 } else if (div1 == (divider & div1)) { 1391 div_id = PM_CLOCK_DIV1_ID; 1392 val = (divider & ~div1) >> 16; 1393 } else { 1394 status = PM_RET_ERROR_ARGS; 1395 goto exit_label; 1396 } 1397 1398 /* Send request to the PMU */ 1399 PM_PACK_PAYLOAD4(payload, flag, PM_CLOCK_SETDIVIDER, clock_id, div_id, val); 1400 status = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1401 1402 exit_label: 1403 return status; 1404 } 1405 1406 /** 1407 * pm_clock_getdivider - Get the clock divider for given id. 1408 * @clock_id: Id of the clock. 1409 * @divider: divider value. 1410 * @flag: 0 - Call from secure source. 1411 * 1 - Call from non-secure source. 1412 * 1413 * This function is used by master to get divider values 1414 * for any clock. 1415 * 1416 * Return: Returns status, either success or error+reason. 1417 * 1418 */ 1419 enum pm_ret_status pm_clock_getdivider(uint32_t clock_id, 1420 uint32_t *divider, 1421 uint32_t flag) 1422 { 1423 enum pm_ret_status status = PM_RET_SUCCESS; 1424 enum pm_node_id nid; 1425 uint32_t payload[PAYLOAD_ARG_CNT]; 1426 uint32_t val; 1427 1428 /* Get PLL node ID using PLL clock ID */ 1429 status = pm_clock_get_pll_node_id(clock_id, &nid); 1430 if (status == PM_RET_SUCCESS) { 1431 status = pm_pll_get_parameter(nid, PM_PLL_PARAM_FBDIV, divider, 1432 flag); 1433 goto exit_label; 1434 } 1435 1436 /* Check if clock ID is a valid on-chip clock */ 1437 status = pm_clock_id_is_valid(clock_id); 1438 if (status != PM_RET_SUCCESS) { 1439 goto exit_label; 1440 } 1441 1442 if ((pm_clock_has_div(clock_id, PM_CLOCK_DIV0_ID)) != 0U) { 1443 /* Send request to the PMU to get div0 */ 1444 PM_PACK_PAYLOAD3(payload, flag, PM_CLOCK_GETDIVIDER, clock_id, 1445 PM_CLOCK_DIV0_ID); 1446 status = pm_ipi_send_sync(primary_proc, payload, &val, 1); 1447 if (status != PM_RET_SUCCESS) { 1448 goto exit_label; 1449 } 1450 *divider = val; 1451 } 1452 1453 if ((pm_clock_has_div(clock_id, PM_CLOCK_DIV1_ID)) != 0U) { 1454 /* Send request to the PMU to get div1 */ 1455 PM_PACK_PAYLOAD3(payload, flag, PM_CLOCK_GETDIVIDER, clock_id, 1456 PM_CLOCK_DIV1_ID); 1457 status = pm_ipi_send_sync(primary_proc, payload, &val, 1); 1458 if (status != PM_RET_SUCCESS) { 1459 goto exit_label; 1460 } 1461 *divider |= val << 16; 1462 } 1463 exit_label: 1464 return status; 1465 } 1466 1467 /** 1468 * pm_clock_setparent - Set the clock parent for given id. 1469 * @clock_id: Id of the clock. 1470 * @parent_index: Index of the parent clock into clock's parents array. 1471 * @flag: 0 - Call from secure source. 1472 * 1 - Call from non-secure source. 1473 * 1474 * This function is used by master to set parent for any clock. 1475 * 1476 * Return: Returns status, either success or error+reason. 1477 * 1478 */ 1479 enum pm_ret_status pm_clock_setparent(uint32_t clock_id, 1480 uint32_t parent_index, 1481 uint32_t flag) 1482 { 1483 struct pm_pll *pll; 1484 uint32_t payload[PAYLOAD_ARG_CNT]; 1485 enum pm_ret_status status; 1486 1487 /* First try to handle it as a PLL */ 1488 pll = pm_clock_get_pll_by_related_clk(clock_id); 1489 if (pll != NULL) { 1490 status = pm_clock_pll_set_parent(pll, clock_id, parent_index, 1491 flag); 1492 goto exit_label; 1493 } 1494 1495 /* Check if clock ID is a valid on-chip clock */ 1496 status = pm_clock_id_is_valid(clock_id); 1497 if (status != PM_RET_SUCCESS) { 1498 goto exit_label; 1499 } 1500 1501 /* Send request to the PMU */ 1502 PM_PACK_PAYLOAD3(payload, flag, PM_CLOCK_SETPARENT, clock_id, parent_index); 1503 status = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1504 1505 exit_label: 1506 return status; 1507 } 1508 1509 /** 1510 * pm_clock_getparent - Get the clock parent for given id. 1511 * @clock_id: Id of the clock. 1512 * @parent_index: parent index. 1513 * @flag: 0 - Call from secure source. 1514 * 1 - Call from non-secure source. 1515 * 1516 * This function is used by master to get parent index 1517 * for any clock. 1518 * 1519 * Return: Returns status, either success or error+reason. 1520 * 1521 */ 1522 enum pm_ret_status pm_clock_getparent(uint32_t clock_id, 1523 uint32_t *parent_index, 1524 uint32_t flag) 1525 { 1526 struct pm_pll *pll; 1527 uint32_t payload[PAYLOAD_ARG_CNT]; 1528 enum pm_ret_status status; 1529 1530 /* First try to handle it as a PLL */ 1531 pll = pm_clock_get_pll_by_related_clk(clock_id); 1532 if (pll != NULL) { 1533 status = pm_clock_pll_get_parent(pll, clock_id, parent_index, 1534 flag); 1535 goto exit_label; 1536 } 1537 1538 /* Check if clock ID is a valid on-chip clock */ 1539 status = pm_clock_id_is_valid(clock_id); 1540 if (status != PM_RET_SUCCESS) { 1541 goto exit_label; 1542 } 1543 1544 /* Send request to the PMU */ 1545 PM_PACK_PAYLOAD2(payload, flag, PM_CLOCK_GETPARENT, clock_id); 1546 status = pm_ipi_send_sync(primary_proc, payload, parent_index, 1); 1547 1548 exit_label: 1549 return status; 1550 } 1551 1552 /** 1553 * pm_pinctrl_get_num_pins - PM call to request number of pins. 1554 * @npins: Number of pins. 1555 * 1556 * This function is used by master to get number of pins. 1557 * 1558 * Return: Returns status, either success or error+reason. 1559 * 1560 */ 1561 static enum pm_ret_status pm_pinctrl_get_num_pins(uint32_t *npins) 1562 { 1563 return pm_api_pinctrl_get_num_pins(npins); 1564 } 1565 1566 /** 1567 * pm_pinctrl_get_num_functions - PM call to request number of functions. 1568 * @nfuncs: Number of functions. 1569 * 1570 * This function is used by master to get number of functions. 1571 * 1572 * Return: Returns status, either success or error+reason. 1573 * 1574 */ 1575 static enum pm_ret_status pm_pinctrl_get_num_functions(uint32_t *nfuncs) 1576 { 1577 return pm_api_pinctrl_get_num_functions(nfuncs); 1578 } 1579 1580 /** 1581 * pm_pinctrl_get_num_function_groups - PM call to request number of 1582 * function groups. 1583 * @fid: Id of function. 1584 * @ngroups: Number of function groups. 1585 * 1586 * This function is used by master to get number of function groups specified 1587 * by given function Id. 1588 * 1589 * Return: Returns status, either success or error+reason. 1590 * 1591 */ 1592 static enum pm_ret_status pm_pinctrl_get_num_function_groups(uint32_t fid, 1593 uint32_t *ngroups) 1594 { 1595 return pm_api_pinctrl_get_num_func_groups(fid, ngroups); 1596 } 1597 1598 /** 1599 * pm_pinctrl_get_function_name - PM call to request function name. 1600 * @fid: Id of function. 1601 * @name: Name of function. 1602 * 1603 * This function is used by master to get name of function specified 1604 * by given function Id. 1605 * 1606 */ 1607 static void pm_pinctrl_get_function_name(uint32_t fid, char *name) 1608 { 1609 pm_api_pinctrl_get_function_name(fid, name); 1610 } 1611 1612 /** 1613 * pm_pinctrl_get_function_groups - PM call to request function groups. 1614 * @fid: Id of function. 1615 * @index: Index of next function groups. 1616 * @groups: Function groups. 1617 * 1618 * This function is used by master to get function groups specified 1619 * by given function Id. This API will return 6 function groups with 1620 * a single response. To get other function groups, master should call 1621 * same API in loop with new function groups index till error is returned. 1622 * 1623 * E.g First call should have index 0 which will return function groups 1624 * 0, 1, 2, 3, 4 and 5. Next call, index should be 6 which will return 1625 * function groups 6, 7, 8, 9, 10 and 11 and so on. 1626 * 1627 * Return: Returns status, either success or error+reason. 1628 * 1629 */ 1630 static enum pm_ret_status pm_pinctrl_get_function_groups(uint32_t fid, 1631 uint32_t index, 1632 uint16_t *groups) 1633 { 1634 return pm_api_pinctrl_get_function_groups(fid, index, groups); 1635 } 1636 1637 /** 1638 * pm_pinctrl_get_pin_groups - PM call to request pin groups. 1639 * @pin_id: Id of pin. 1640 * @index: Index of next pin groups. 1641 * @groups: pin groups. 1642 * 1643 * This function is used by master to get pin groups specified 1644 * by given pin Id. This API will return 6 pin groups with 1645 * a single response. To get other pin groups, master should call 1646 * same API in loop with new pin groups index till error is returned. 1647 * 1648 * E.g First call should have index 0 which will return pin groups 1649 * 0, 1, 2, 3, 4 and 5. Next call, index should be 6 which will return 1650 * pin groups 6, 7, 8, 9, 10 and 11 and so on. 1651 * 1652 * Return: Returns status, either success or error+reason. 1653 * 1654 */ 1655 static enum pm_ret_status pm_pinctrl_get_pin_groups(uint32_t pin_id, 1656 uint32_t index, 1657 uint16_t *groups) 1658 { 1659 return pm_api_pinctrl_get_pin_groups(pin_id, index, groups); 1660 } 1661 1662 /** 1663 * pm_query_data() - PM API for querying firmware data. 1664 * @qid: represents the query identifiers for PM. 1665 * @arg1: Argument 1 to requested IOCTL call. 1666 * @arg2: Argument 2 to requested IOCTL call. 1667 * @arg3: Argument 3 to requested IOCTL call. 1668 * @data: Returned output data. 1669 * @flag: 0 - Call from secure source. 1670 * 1 - Call from non-secure source. 1671 * 1672 * This function returns requested data. 1673 * 1674 */ 1675 void pm_query_data(enum pm_query_ids qid, uint32_t arg1, uint32_t arg2, 1676 uint32_t arg3, uint32_t *data, uint32_t flag) 1677 { 1678 (void)arg3; 1679 (void)flag; 1680 1681 switch (qid) { 1682 case PM_QID_CLOCK_GET_NAME: 1683 pm_clock_get_name(arg1, (char *)data); 1684 break; 1685 case PM_QID_CLOCK_GET_TOPOLOGY: 1686 data[0] = (uint32_t)pm_clock_get_topology(arg1, arg2, &data[1]); 1687 break; 1688 case PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS: 1689 data[0] = (uint32_t)pm_clock_get_fixedfactor_params(arg1, &data[1], 1690 &data[2]); 1691 break; 1692 case PM_QID_CLOCK_GET_PARENTS: 1693 data[0] = (uint32_t)pm_clock_get_parents(arg1, arg2, &data[1]); 1694 break; 1695 case PM_QID_CLOCK_GET_ATTRIBUTES: 1696 data[0] = (uint32_t)pm_clock_get_attributes(arg1, &data[1]); 1697 break; 1698 case PM_QID_PINCTRL_GET_NUM_PINS: 1699 data[0] = (uint32_t)pm_pinctrl_get_num_pins(&data[1]); 1700 break; 1701 case PM_QID_PINCTRL_GET_NUM_FUNCTIONS: 1702 data[0] = (uint32_t)pm_pinctrl_get_num_functions(&data[1]); 1703 break; 1704 case PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS: 1705 data[0] = (uint32_t)pm_pinctrl_get_num_function_groups(arg1, &data[1]); 1706 break; 1707 case PM_QID_PINCTRL_GET_FUNCTION_NAME: 1708 pm_pinctrl_get_function_name(arg1, (char *)data); 1709 break; 1710 case PM_QID_PINCTRL_GET_FUNCTION_GROUPS: 1711 data[0] = (uint32_t)pm_pinctrl_get_function_groups(arg1, arg2, 1712 (uint16_t *)&data[1]); 1713 break; 1714 case PM_QID_PINCTRL_GET_PIN_GROUPS: 1715 data[0] = (uint32_t)pm_pinctrl_get_pin_groups(arg1, arg2, 1716 (uint16_t *)&data[1]); 1717 break; 1718 case PM_QID_CLOCK_GET_NUM_CLOCKS: 1719 data[0] = (uint32_t)pm_clock_get_num_clocks(&data[1]); 1720 break; 1721 1722 case PM_QID_CLOCK_GET_MAX_DIVISOR: 1723 data[0] = (uint32_t)pm_clock_get_max_divisor(arg1, (uint8_t)arg2, &data[1]); 1724 break; 1725 default: 1726 data[0] = (uint32_t)PM_RET_ERROR_ARGS; 1727 WARN("Unimplemented query service call: 0x%x\n", qid); 1728 break; 1729 } 1730 } 1731 1732 enum pm_ret_status pm_sha_hash(uint32_t address_high, 1733 uint32_t address_low, 1734 uint32_t size, 1735 uint32_t flags, 1736 uint32_t security_flag) 1737 { 1738 uint32_t payload[PAYLOAD_ARG_CNT]; 1739 1740 /* Send request to the PMU */ 1741 PM_PACK_PAYLOAD5(payload, security_flag, PM_SECURE_SHA, address_high, 1742 address_low, size, flags); 1743 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1744 } 1745 1746 enum pm_ret_status pm_rsa_core(uint32_t address_high, 1747 uint32_t address_low, 1748 uint32_t size, 1749 uint32_t flags, 1750 uint32_t security_flag) 1751 { 1752 uint32_t payload[PAYLOAD_ARG_CNT]; 1753 1754 /* Send request to the PMU */ 1755 PM_PACK_PAYLOAD5(payload, security_flag, PM_SECURE_RSA, address_high, 1756 address_low, size, flags); 1757 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1758 } 1759 1760 enum pm_ret_status pm_secure_image(uint32_t address_low, 1761 uint32_t address_high, 1762 uint32_t key_lo, 1763 uint32_t key_hi, 1764 uint32_t *value, 1765 uint32_t flag) 1766 { 1767 uint32_t payload[PAYLOAD_ARG_CNT]; 1768 1769 /* Send request to the PMU */ 1770 PM_PACK_PAYLOAD5(payload, flag, PM_SECURE_IMAGE, address_high, 1771 address_low, key_hi, key_lo); 1772 return pm_ipi_send_sync(primary_proc, payload, value, 2); 1773 } 1774 1775 /** 1776 * pm_fpga_read - Perform the fpga configuration readback. 1777 * @reg_numframes: Configuration register offset (or) Number of frames to read. 1778 * @address_low: lower 32-bit Linear memory space address. 1779 * @address_high: higher 32-bit Linear memory space address. 1780 * @readback_type: Type of fpga readback operation. 1781 * 0 -- Configuration Register readback. 1782 * 1 -- Configuration Data readback. 1783 * @value: Value to read. 1784 * @flag: 0 - Call from secure source. 1785 * 1 - Call from non-secure source. 1786 * 1787 * This function provides access to the xilfpga library to read 1788 * the PL configuration. 1789 * 1790 * Return: Returns status, either success or error+reason. 1791 * 1792 */ 1793 enum pm_ret_status pm_fpga_read(uint32_t reg_numframes, 1794 uint32_t address_low, 1795 uint32_t address_high, 1796 uint32_t readback_type, 1797 uint32_t *value, 1798 uint32_t flag) 1799 { 1800 uint32_t payload[PAYLOAD_ARG_CNT]; 1801 1802 /* Send request to the PMU */ 1803 PM_PACK_PAYLOAD5(payload, flag, PM_FPGA_READ, reg_numframes, address_low, 1804 address_high, readback_type); 1805 return pm_ipi_send_sync(primary_proc, payload, value, 1); 1806 } 1807 1808 /* 1809 * pm_pll_set_parameter() - Set the PLL parameter value. 1810 * @nid: Node id of the target PLL. 1811 * @param_id: ID of the PLL parameter. 1812 * @value: Parameter value to be set. 1813 * @flag: 0 - Call from secure source. 1814 * 1 - Call from non-secure source. 1815 * 1816 * Setting the parameter will have physical effect once the PLL mode is set to 1817 * integer or fractional. 1818 * 1819 * Return: Error if an argument is not valid or status as returned by the 1820 * PM controller (PMU). 1821 * 1822 */ 1823 enum pm_ret_status pm_pll_set_parameter(enum pm_node_id nid, 1824 enum pm_pll_param param_id, 1825 uint32_t value, 1826 uint32_t flag) 1827 { 1828 uint32_t payload[PAYLOAD_ARG_CNT]; 1829 enum pm_ret_status ret = 0; 1830 1831 /* Check if given node ID is a PLL node */ 1832 if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) { 1833 ret = PM_RET_ERROR_ARGS; 1834 goto exit_label; 1835 } 1836 1837 /* Check if parameter ID is valid and return an error if it's not */ 1838 if (param_id >= PM_PLL_PARAM_MAX) { 1839 ret = PM_RET_ERROR_ARGS; 1840 goto exit_label; 1841 } 1842 1843 /* Send request to the PMU */ 1844 PM_PACK_PAYLOAD4(payload, flag, PM_PLL_SET_PARAMETER, nid, param_id, value); 1845 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1846 1847 exit_label: 1848 return ret; 1849 } 1850 1851 /** 1852 * pm_pll_get_parameter() - Get the PLL parameter value. 1853 * @nid: Node id of the target PLL. 1854 * @param_id: ID of the PLL parameter. 1855 * @value: Location to store the parameter value. 1856 * @flag: 0 - Call from secure source. 1857 * 1 - Call from non-secure source. 1858 * 1859 * Return: Error if an argument is not valid or status as returned by the 1860 * PM controller (PMU). 1861 * 1862 */ 1863 enum pm_ret_status pm_pll_get_parameter(enum pm_node_id nid, 1864 enum pm_pll_param param_id, 1865 uint32_t *value, uint32_t flag) 1866 { 1867 uint32_t payload[PAYLOAD_ARG_CNT]; 1868 enum pm_ret_status ret = PM_RET_SUCCESS; 1869 1870 /* Check if given node ID is a PLL node */ 1871 if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) { 1872 ret = PM_RET_ERROR_ARGS; 1873 goto exit_label; 1874 } 1875 1876 /* Check if parameter ID is valid and return an error if it's not */ 1877 if (param_id >= PM_PLL_PARAM_MAX) { 1878 ret = PM_RET_ERROR_ARGS; 1879 goto exit_label; 1880 } 1881 1882 /* Send request to the PMU */ 1883 PM_PACK_PAYLOAD3(payload, flag, PM_PLL_GET_PARAMETER, nid, param_id); 1884 ret = pm_ipi_send_sync(primary_proc, payload, value, 1); 1885 1886 exit_label: 1887 return ret; 1888 } 1889 1890 /** 1891 * pm_pll_set_mode() - Set the PLL mode. 1892 * @nid: Node id of the target PLL. 1893 * @mode: PLL mode to be set. 1894 * @flag: 0 - Call from secure source. 1895 * 1 - Call from non-secure source. 1896 * 1897 * If reset mode is set the PM controller will first bypass the PLL and then 1898 * assert the reset. If integer or fractional mode is set the PM controller will 1899 * ensure that the complete PLL programming sequence is satisfied. After this 1900 * function returns success the PLL is locked and its bypass is deasserted. 1901 * 1902 * Return: Error if an argument is not valid or status as returned by the 1903 * PM controller (PMU). 1904 * 1905 */ 1906 enum pm_ret_status pm_pll_set_mode(enum pm_node_id nid, enum pm_pll_mode mode, 1907 uint32_t flag) 1908 { 1909 uint32_t payload[PAYLOAD_ARG_CNT]; 1910 enum pm_ret_status ret = PM_RET_SUCCESS; 1911 1912 /* Check if given node ID is a PLL node */ 1913 if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) { 1914 ret = PM_RET_ERROR_ARGS; 1915 goto exit_label; 1916 } 1917 1918 /* Check if PLL mode is valid */ 1919 if (mode >= PM_PLL_MODE_MAX) { 1920 ret = PM_RET_ERROR_ARGS; 1921 goto exit_label; 1922 } 1923 1924 /* Send request to the PMU */ 1925 PM_PACK_PAYLOAD3(payload, flag, PM_PLL_SET_MODE, nid, mode); 1926 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1927 1928 exit_label: 1929 return ret; 1930 } 1931 1932 /** 1933 * pm_pll_get_mode() - Get the PLL mode. 1934 * @nid: Node id of the target PLL. 1935 * @mode: Location to store the mode of the PLL. 1936 * @flag: 0 - Call from secure source. 1937 * 1 - Call from non-secure source. 1938 * 1939 * Return: Error if an argument is not valid or status as returned by the 1940 * PM controller (PMU). 1941 * 1942 */ 1943 enum pm_ret_status pm_pll_get_mode(enum pm_node_id nid, enum pm_pll_mode *mode, 1944 uint32_t flag) 1945 { 1946 uint32_t payload[PAYLOAD_ARG_CNT]; 1947 enum pm_ret_status ret = PM_RET_SUCCESS; 1948 1949 /* Check if given node ID is a PLL node */ 1950 if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) { 1951 ret = PM_RET_ERROR_ARGS; 1952 } else { 1953 /* Send request to the PMU */ 1954 PM_PACK_PAYLOAD2(payload, flag, PM_PLL_GET_MODE, nid); 1955 ret = pm_ipi_send_sync(primary_proc, payload, mode, 1); 1956 } 1957 1958 return ret; 1959 } 1960 1961 /** 1962 * pm_register_access() - PM API for register read/write access data. 1963 * @register_access_id: Register_access_id which says register read/write. 1964 * @address: Address of the register to be accessed. 1965 * @mask: Mask value to be used while writing value. 1966 * @value: Value to be written to register. 1967 * @out: Returned output data. 1968 * @flag: 0 - Call from secure source. 1969 * 1 - Call from non-secure source. 1970 * 1971 * This function returns requested data. 1972 * 1973 * Return: Returns status, either success or error+reason. 1974 * 1975 */ 1976 enum pm_ret_status pm_register_access(uint32_t register_access_id, 1977 uint32_t address, 1978 uint32_t mask, 1979 uint32_t value, 1980 uint32_t *out, 1981 uint32_t flag) 1982 { 1983 enum pm_ret_status ret; 1984 1985 if (((ZYNQMP_CSU_BASEADDR & address) != ZYNQMP_CSU_BASEADDR) && 1986 ((CSUDMA_BASE & address) != CSUDMA_BASE) && 1987 ((RSA_CORE_BASE & address) != RSA_CORE_BASE) && 1988 ((PMU_GLOBAL_BASE & address) != PMU_GLOBAL_BASE)) { 1989 ret = PM_RET_ERROR_ACCESS; 1990 goto exit_label; 1991 } 1992 1993 switch (register_access_id) { 1994 case CONFIG_REG_WRITE: 1995 ret = pm_mmio_write(address, mask, value, flag); 1996 break; 1997 case CONFIG_REG_READ: 1998 ret = pm_mmio_read(address, out, flag); 1999 break; 2000 default: 2001 ret = PM_RET_ERROR_ARGS; 2002 WARN("Unimplemented register_access call\n\r"); 2003 break; 2004 } 2005 2006 exit_label: 2007 return ret; 2008 } 2009 2010 /** 2011 * pm_efuse_access() - To program or read efuse bits. This function provides 2012 * access to the xilskey library to program/read 2013 * efuse bits. 2014 * @address_low: lower 32-bit Linear memory space address. 2015 * @address_high: higher 32-bit Linear memory space address. 2016 * @value: Returned output value. 2017 * @flag: 0 - Call from secure source. 2018 * 1 - Call from non-secure source. 2019 * 2020 * Return: Returns status, either success or error+reason. 2021 * 2022 */ 2023 enum pm_ret_status pm_efuse_access(uint32_t address_high, 2024 uint32_t address_low, 2025 uint32_t *value, 2026 uint32_t flag) 2027 { 2028 uint32_t payload[PAYLOAD_ARG_CNT]; 2029 2030 /* Send request to the PMU */ 2031 PM_PACK_PAYLOAD3(payload, flag, PM_EFUSE_ACCESS, address_high, address_low); 2032 2033 return pm_ipi_send_sync(primary_proc, payload, value, 1); 2034 } 2035