feat(mt8189): initialize platform for MT8189

- Add basic platform setup.
- Add MT8189 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.

Change-Id: Id59a

feat(mt8189): initialize platform for MT8189

- Add basic platform setup.
- Add MT8189 documentation at docs/plat/.
- Add generic CPU helper functions.
- Add basic register address.

Change-Id: Id59ae9265983defb46e27befabfd5c30b2b4a5a6
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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refactor(ti): introduce ti_bl31_setup

There maybe a lot of reuse between platforms for bl31_setup in future
which may require us to have a common bl31 setup driver for TI.
The ti_bl31_setup is expec

refactor(ti): introduce ti_bl31_setup

There maybe a lot of reuse between platforms for bl31_setup in future
which may require us to have a common bl31 setup driver for TI.
The ti_bl31_setup is expected to contain all the reusable bits
and the soc_bl31_setup can have the custom soc init functionality
like the mmap regions and any special sequences needed at
device boot
While at it, also fix the path of the reference to the kernel doc
for booting.

Change-Id: Ie574f08cf3ba75362c45f85306499061ef89c964
Signed-off-by: Dhruva Gole <d-gole@ti.com>

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refactor(ti): add top level ti_sci transport layer

The TI SCI transport header will allow us to abstract all transport
related calls from the actual medium of transport which can vary
from device to

refactor(ti): add top level ti_sci transport layer

The TI SCI transport header will allow us to abstract all transport
related calls from the actual medium of transport which can vary
from device to device.
For eg. it is sec proxy for current TI K3 devices, but in future it
maybe mailbox like in the TI AM62L.
With this change, we no longer need to include anything from the IPC
folder, so drop it from plat_common.mk

Change-Id: Ic99209688cf69f20e694e31e553ce4ec74254669
Signed-off-by: Dhruva Gole <d-gole@ti.com>

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refactor(ti): move TI SCI and sec proxy to drivers

Prepare to support more devices and abstract TI SCI and it's transport
layers. This refactor will help keep things clean when new ipc drivers
get a

refactor(ti): move TI SCI and sec proxy to drivers

Prepare to support more devices and abstract TI SCI and it's transport
layers. This refactor will help keep things clean when new ipc drivers
get added.

Change-Id: I05673f379b1398c0b6a2bd9e1b5392165d12f151
Signed-off-by: Dhruva Gole <d-gole@ti.com>

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Merge "fix(arm): resolve build issue with ARM_ROTPK_LOCATION=regs option" into integration

refactor(mediatek): move headers to common folder

The plat_macros.S and plat_private.h are identical across some
platforms, moved to the common folder for easier maintenance.

Change-Id: I31c71551aa

refactor(mediatek): move headers to common folder

The plat_macros.S and plat_private.h are identical across some
platforms, moved to the common folder for easier maintenance.

Change-Id: I31c71551aa0e891f080e58f21e6e79551d2a19e0
Signed-off-by: Gavin Liu <gavin.liu@mediatek.com>

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Merge changes from topic "upstream-stm32mp257d-ultra-fly-sbc" into integration

* changes:
feat(stm32mp2): use USART1 for debug console on ultra-fly boards
feat(fdts): add support for STM32MP257D

Merge changes from topic "upstream-stm32mp257d-ultra-fly-sbc" into integration

* changes:
feat(stm32mp2): use USART1 for debug console on ultra-fly boards
feat(fdts): add support for STM32MP257D-based ultra-fly-sbc board
feat(fdts): add dual-ranked LPDDR4 config for STM32MP2

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Merge "fix(intel): update ssbl naming conventions" into integration

fix(arm): resolve build issue with ARM_ROTPK_LOCATION=regs option

Fix the broken build when using the ARM_ROTPK_LOCATION=regs option.

Change-Id: Ieaa7baebd86448d198a1b9d2149a3490700b45d3
Signed-off

fix(arm): resolve build issue with ARM_ROTPK_LOCATION=regs option

Fix the broken build when using the ARM_ROTPK_LOCATION=regs option.

Change-Id: Ieaa7baebd86448d198a1b9d2149a3490700b45d3
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(arm): resolve misra rule R11.6 violation

Fixed below MISRA violation:
- MISRA violation: MC3R1.R11.6:
- A cast shall not be performed between a pointer to void and an
arithmetic data type.

fix(arm): resolve misra rule R11.6 violation

Fixed below MISRA violation:
- MISRA violation: MC3R1.R11.6:
- A cast shall not be performed between a pointer to void and an
arithmetic data type. (i.e cast from integer to void*)
- Fix:
- cast via portable and misra compliant type "uintptr_t" and
use 0U instead of NULL for comparisons.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Ie3a7561d9a254027c5364485a1d72fc1320dfcad

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feat(tc): port BL31-BL33 interface to firmware handoff framework

Adding support for this framework at the handoff boundary between
firmware stage BL31 and BL33 on TC.

Signed-off-by: Jayanth Dodderi

feat(tc): port BL31-BL33 interface to firmware handoff framework

Adding support for this framework at the handoff boundary between
firmware stage BL31 and BL33 on TC.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Ia6cd29c8b6cdda0a127a3bac02f6fa1dcfc07151

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feat(tc): port BL2-BL31 interface to firmware handoff framework

Adding support for this framework at the handoff boundary between
firmware stage BL2 and BL31 on TC.

Signed-off-by: Jayanth Dodderi C

feat(tc): port BL2-BL31 interface to firmware handoff framework

Adding support for this framework at the handoff boundary between
firmware stage BL2 and BL31 on TC.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: I8e29b859e57a732e53f7532a5869ed4c8665b161

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feat(tc): port BL1-BL2 interface to firmware handoff framework

The firmware handoff framework, is a light weight mechanism for
sharing information between bootloader stages.
Adding support for this

feat(tc): port BL1-BL2 interface to firmware handoff framework

The firmware handoff framework, is a light weight mechanism for
sharing information between bootloader stages.
Adding support for this framework at the handoff boundary between
firmware stage BL1 and BL2 on TC.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Iae13adbcdd6ebbdcc61d04e017655c6b8d715ea0

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feat(stm32mp2): use USART1 for debug console on ultra-fly boards

This commit configures the debug console to use USART1 for
ultra-fly boards, ensuring the early console works as expected
on these bo

feat(stm32mp2): use USART1 for debug console on ultra-fly boards

This commit configures the debug console to use USART1 for
ultra-fly boards, ensuring the early console works as expected
on these boards.

These changes are specific to the ultra-fly boards and do not
affect any other boards.

Change-Id: I17f2c50779426dc31a8e85d6903141c331882c86
Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com>

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Merge "feat(versal2): is OCM configured as coherent" into integration

Merge changes from topic "versal2-qemu" into integration

* changes:
fix(versal2): align QEMU APU GT frequency with silicon
fix(zynqmp): fix syscnt frequency for QEMU

Merge "fix(cpus): remove errata setting PF_MODE to conservative" into integration

Merge changes from topic "jc/tc_fw_handoff" into integration

* changes:
refactor(arm): simplify early platform setup function in BL31
refactor(arm): simplify early platform setup function in BL2

Merge changes from topic "jc/tc_fw_handoff" into integration

* changes:
refactor(arm): simplify early platform setup function in BL31
refactor(arm): simplify early platform setup function in BL2
feat(arm): add support for Transfer List creation

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Merge changes I1dfb95aa,I9eb61c48 into integration

* changes:
feat(intel): support FCS commands with SiPSVC V3 framework
feat(intel): implementation of SiPSVC-V3 protocol framework

fix(intel): update ssbl naming conventions

Update RSU SSBL name query in line with other bootloaders
and use secure string functions.

Change-Id: I8ae6b80eb74e91c6a82e59986cba137cf5ef6977
Signed-off

fix(intel): update ssbl naming conventions

Update RSU SSBL name query in line with other bootloaders
and use secure string functions.

Change-Id: I8ae6b80eb74e91c6a82e59986cba137cf5ef6977
Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>

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refactor(arm): simplify early platform setup function in BL31

Refactor `arm_bl31_early_platform_setup` to accept generic u_register_t
values, enabling support for firmware handoff boot arguments in

refactor(arm): simplify early platform setup function in BL31

Refactor `arm_bl31_early_platform_setup` to accept generic u_register_t
values, enabling support for firmware handoff boot arguments in
common code. This simplifies the interface for early platform setup.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Iff20300d2372e1a9825827ddccbd1b3bc6751e40

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refactor(arm): simplify early platform setup function in BL2

Refactor `arm_bl2_early_platform_setup` to accept generic u_register_t
values, enabling support for firmware handoff boot arguments in
co

refactor(arm): simplify early platform setup function in BL2

Refactor `arm_bl2_early_platform_setup` to accept generic u_register_t
values, enabling support for firmware handoff boot arguments in
common code. This simplifies the interface for early platform setup.

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Ie0dbe4d32bbef22bd185fdafe50091a2ea5f550f

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feat(arm): add support for Transfer List creation

This patch introduces Firmware Handoff support for Arm based
platforms listed under Firmware_Handoff specification.
[https://firmwarehandoff.github.

feat(arm): add support for Transfer List creation

This patch introduces Firmware Handoff support for Arm based
platforms listed under Firmware_Handoff specification.
[https://firmwarehandoff.github.io/firmware_handoff/main/transfer_list.html]

Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Change-Id: Ie3f30ffe38f809db907b663a8dbf1e48944ec690

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fix(fvp): allow PSCI 0.2 in the device tree

Although the platform assumes it will use the device tree hosted with
it, there are device trees out there (eg in Linux) that will also work
just fine. So

fix(fvp): allow PSCI 0.2 in the device tree

Although the platform assumes it will use the device tree hosted with
it, there are device trees out there (eg in Linux) that will also work
just fine. Some of them, unfortunately, specify PSCI 0.2, but FCONF
performs a fatal check for 1.0. Add a fallback to 0.2 so that those
device trees can work.

Change-Id: I1543aa6d1dd12730299078500685928a13b16820
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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fix(cpus): remove errata setting PF_MODE to conservative

The erratum titled “Disabling of data prefetcher with outstanding
prefetch TLB miss might cause a deadlock” should not be handled within
TF-A

fix(cpus): remove errata setting PF_MODE to conservative

The erratum titled “Disabling of data prefetcher with outstanding
prefetch TLB miss might cause a deadlock” should not be handled within
TF-A. The current workaround attempts to follow option 2 but
misapplies it. Specifically, it statically sets PF_MODE to
conservative, which is not the recommended approach. According to the
erratum documentation, PF_MODE should be configured in conservative
mode only when we disable data prefetcher however this is not done
in TF-A and thus the workaround is not needed in TF-A.

The static setting of PF_MODE in TF-A does not correctly address the
erratum and may introduce unnecessary performance degradation on
platforms that adopt it without fully understanding its implications.

To prevent incorrect or unintended use, the current implementation of
this erratum workaround should be removed from TF-A and not adopted by
platforms.

List of Impacted CPU's with Errata Numbers and reference to SDEN -

Cortex-A78 - 2132060 - https://developer.arm.com/documentation/SDEN1401784/latest
Cortex-A78C - 2132064 - https://developer.arm.com/documentation/SDEN-2004089/latest
Cortex-A710 - 2058056 - https://developer.arm.com/documentation/SDEN-1775101/latest
Cortex-X2 - 2058056 - https://developer.arm.com/documentation/SDEN-1775100/latest
Cortex-X3 - 2070301 - https://developer.arm.com/documentation/SDEN2055130/latest
Neoverse-N2 - 2138953 - https://developer.arm.com/documentation/SDEN-1982442/latest
Neoverse-V1 - 2108267 - https://developer.arm.com/documentation/SDEN-1401781/latest
Neoverse-V2 - 2331132 - https://developer.arm.com/documentation/SDEN-2332927/latest

Change-Id: Icf4048508ae070b2df073cc46c63be058b2779df
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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