1 /* 2 * Texas Instruments System Control Interface (TISCI) Protocol 3 * 4 * Communication protocol with TI SCI hardware 5 * The system works in a message response protocol 6 * See: http://processors.wiki.ti.com/index.php/TISCI for details 7 * 8 * Copyright (C) 2018-2025 Texas Instruments Incorporated - https://www.ti.com/ 9 * 10 * SPDX-License-Identifier: BSD-3-Clause 11 */ 12 13 #ifndef TI_SCI_PROTOCOL_H 14 #define TI_SCI_PROTOCOL_H 15 16 #include <stdint.h> 17 18 /* Generic Messages */ 19 #define TI_SCI_MSG_ENABLE_WDT 0x0000 20 #define TI_SCI_MSG_WAKE_RESET 0x0001 21 #define TI_SCI_MSG_VERSION 0x0002 22 #define TI_SCI_MSG_WAKE_REASON 0x0003 23 #define TI_SCI_MSG_GOODBYE 0x0004 24 #define TI_SCI_MSG_SYS_RESET 0x0005 25 #define TI_SCI_MSG_QUERY_FW_CAPS 0x0022 26 27 /* Device requests */ 28 #define TI_SCI_MSG_SET_DEVICE_STATE 0x0200 29 #define TI_SCI_MSG_GET_DEVICE_STATE 0x0201 30 #define TI_SCI_MSG_SET_DEVICE_RESETS 0x0202 31 32 /* Low Power Mode Requests */ 33 #define TI_SCI_MSG_ENTER_SLEEP 0x0301 34 #define TI_SCI_MSG_LPM_GET_NEXT_SYS_MODE 0x030d 35 36 /* Clock requests */ 37 #define TI_SCI_MSG_SET_CLOCK_STATE 0x0100 38 #define TI_SCI_MSG_GET_CLOCK_STATE 0x0101 39 #define TI_SCI_MSG_SET_CLOCK_PARENT 0x0102 40 #define TI_SCI_MSG_GET_CLOCK_PARENT 0x0103 41 #define TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 0x0104 42 #define TI_SCI_MSG_SET_CLOCK_FREQ 0x010c 43 #define TI_SCI_MSG_QUERY_CLOCK_FREQ 0x010d 44 #define TI_SCI_MSG_GET_CLOCK_FREQ 0x010e 45 46 /* Processor Control Messages */ 47 #define TISCI_MSG_PROC_REQUEST 0xc000 48 #define TISCI_MSG_PROC_RELEASE 0xc001 49 #define TISCI_MSG_PROC_HANDOVER 0xc005 50 #define TISCI_MSG_SET_PROC_BOOT_CONFIG 0xc100 51 #define TISCI_MSG_SET_PROC_BOOT_CTRL 0xc101 52 #define TISCI_MSG_PROC_AUTH_BOOT_IMAGE 0xc120 53 #define TISCI_MSG_GET_PROC_BOOT_STATUS 0xc400 54 #define TISCI_MSG_WAIT_PROC_BOOT_STATUS 0xc401 55 56 /** 57 * struct ti_sci_msg_hdr - Generic Message Header for All messages and responses 58 * @type: Type of messages: One of TI_SCI_MSG* values 59 * @host: Host of the message 60 * @seq: Message identifier indicating a transfer sequence 61 * @flags: Flag for the message 62 */ 63 struct ti_sci_msg_hdr { 64 uint16_t type; 65 uint8_t host; 66 uint8_t seq; 67 #define TI_SCI_MSG_FLAG(val) (1 << (val)) 68 #define TI_SCI_FLAG_REQ_GENERIC_NORESPONSE 0x0 69 #define TI_SCI_FLAG_REQ_ACK_ON_RECEIVED TI_SCI_MSG_FLAG(0) 70 #define TI_SCI_FLAG_REQ_ACK_ON_PROCESSED TI_SCI_MSG_FLAG(1) 71 #define TI_SCI_FLAG_RESP_GENERIC_NACK 0x0 72 #define TI_SCI_FLAG_RESP_GENERIC_ACK TI_SCI_MSG_FLAG(1) 73 /* Additional Flags */ 74 uint32_t flags; 75 } __packed; 76 77 /** 78 * struct ti_sci_msg_version_req - Request for firmware version information 79 * @hdr: Generic header 80 * 81 * Request for TI_SCI_MSG_VERSION 82 */ 83 struct ti_sci_msg_req_version { 84 struct ti_sci_msg_hdr hdr; 85 } __packed; 86 87 /** 88 * struct ti_sci_msg_resp_version - Response for firmware version information 89 * @hdr: Generic header 90 * @firmware_description: String describing the firmware 91 * @firmware_revision: Firmware revision 92 * @abi_major: Major version of the ABI that firmware supports 93 * @abi_minor: Minor version of the ABI that firmware supports 94 * @sub_version: Sub-version number of the firmware 95 * @patch_version: Patch-version number of the firmware. 96 * 97 * In general, ABI version changes follow the rule that minor version increments 98 * are backward compatible. Major revision changes in ABI may not be 99 * backward compatible. 100 * 101 * Response to request TI_SCI_MSG_VERSION 102 */ 103 struct ti_sci_msg_resp_version { 104 struct ti_sci_msg_hdr hdr; 105 #define FIRMWARE_DESCRIPTION_LENGTH 32 106 char firmware_description[FIRMWARE_DESCRIPTION_LENGTH]; 107 uint16_t firmware_revision; 108 uint8_t abi_major; 109 uint8_t abi_minor; 110 uint8_t sub_version; 111 uint8_t patch_version; 112 } __packed; 113 114 /** 115 * struct ti_sci_msg_req_reboot - Reboot the SoC 116 * @hdr: Generic Header 117 * @domain: Domain to be reset, 0 for full SoC reboot 118 * 119 * Request type is TI_SCI_MSG_SYS_RESET, responded with a generic 120 * ACK/NACK message. 121 */ 122 struct ti_sci_msg_req_reboot { 123 struct ti_sci_msg_hdr hdr; 124 #define TI_SCI_DOMAIN_FULL_SOC_RESET 0x0 125 uint8_t domain; 126 } __packed; 127 128 /** 129 * struct ti_sci_msg_resp_query_fw_caps - Response for query firmware caps 130 * @hdr: Generic header 131 * @fw_caps: Each bit in fw_caps indicating one FW/SOC capability 132 * MSG_FLAG_CAPS_GENERIC: Generic capability (LPM not supported) 133 * MSG_FLAG_CAPS_LPM_DEEP_SLEEP: Deep Sleep LPM 134 * MSG_FLAG_CAPS_LPM_MCU_ONLY: MCU only LPM 135 * MSG_FLAG_CAPS_LPM_STANDBY: Standby LPM 136 * MSG_FLAG_CAPS_LPM_PARTIAL_IO: Partial IO in LPM 137 * MSG_FLAG_CAPS_LPM_DM_MANAGED: LPM can be managed by DM 138 * 139 * Response to a generic message with message type TI_SCI_MSG_QUERY_FW_CAPS 140 * providing currently available SOC/firmware capabilities. SoC that don't 141 * support low power modes return only MSG_FLAG_CAPS_GENERIC capability. 142 */ 143 struct ti_sci_msg_resp_query_fw_caps { 144 struct ti_sci_msg_hdr hdr; 145 #define MSG_FLAG_CAPS_GENERIC TI_SCI_MSG_FLAG(0) 146 #define MSG_FLAG_CAPS_LPM_DEEP_SLEEP TI_SCI_MSG_FLAG(1) 147 #define MSG_FLAG_CAPS_LPM_MCU_ONLY TI_SCI_MSG_FLAG(2) 148 #define MSG_FLAG_CAPS_LPM_STANDBY TI_SCI_MSG_FLAG(3) 149 #define MSG_FLAG_CAPS_LPM_PARTIAL_IO TI_SCI_MSG_FLAG(4) 150 #define MSG_FLAG_CAPS_LPM_DM_MANAGED TI_SCI_MSG_FLAG(5) 151 uint64_t fw_caps; 152 } __packed; 153 154 /** 155 * struct ti_sci_msg_req_set_device_state - Set the desired state of the device 156 * @hdr: Generic header 157 * @id: Indicates which device to modify 158 * @reserved: Reserved space in message, must be 0 for backward compatibility 159 * @state: The desired state of the device. 160 * 161 * Certain flags can also be set to alter the device state: 162 * + MSG_FLAG_DEVICE_WAKE_ENABLED - Configure the device to be a wake source. 163 * The meaning of this flag will vary slightly from device to device and from 164 * SoC to SoC but it generally allows the device to wake the SoC out of deep 165 * suspend states. 166 * + MSG_FLAG_DEVICE_RESET_ISO - Enable reset isolation for this device. 167 * + MSG_FLAG_DEVICE_EXCLUSIVE - Claim this device exclusively. When passed 168 * with STATE_RETENTION or STATE_ON, it will claim the device exclusively. 169 * If another host already has this device set to STATE_RETENTION or STATE_ON, 170 * the message will fail. Once successful, other hosts attempting to set 171 * STATE_RETENTION or STATE_ON will fail. 172 * 173 * Request type is TI_SCI_MSG_SET_DEVICE_STATE, responded with a generic 174 * ACK/NACK message. 175 */ 176 struct ti_sci_msg_req_set_device_state { 177 /* Additional hdr->flags options */ 178 #define MSG_FLAG_DEVICE_WAKE_ENABLED TI_SCI_MSG_FLAG(8) 179 #define MSG_FLAG_DEVICE_RESET_ISO TI_SCI_MSG_FLAG(9) 180 #define MSG_FLAG_DEVICE_EXCLUSIVE TI_SCI_MSG_FLAG(10) 181 struct ti_sci_msg_hdr hdr; 182 uint32_t id; 183 uint32_t reserved; 184 185 #define MSG_DEVICE_SW_STATE_AUTO_OFF 0 186 #define MSG_DEVICE_SW_STATE_RETENTION 1 187 #define MSG_DEVICE_SW_STATE_ON 2 188 uint8_t state; 189 } __packed; 190 191 /** 192 * struct ti_sci_msg_req_get_device_state - Request to get device. 193 * @hdr: Generic header 194 * @id: Device Identifier 195 * 196 * Request type is TI_SCI_MSG_GET_DEVICE_STATE, responded device state 197 * information 198 */ 199 struct ti_sci_msg_req_get_device_state { 200 struct ti_sci_msg_hdr hdr; 201 uint32_t id; 202 } __packed; 203 204 /** 205 * struct ti_sci_msg_resp_get_device_state - Response to get device request. 206 * @hdr: Generic header 207 * @context_loss_count: Indicates how many times the device has lost context. A 208 * driver can use this monotonic counter to determine if the device has 209 * lost context since the last time this message was exchanged. 210 * @resets: Programmed state of the reset lines. 211 * @programmed_state: The state as programmed by set_device. 212 * - Uses the MSG_DEVICE_SW_* macros 213 * @current_state: The actual state of the hardware. 214 * 215 * Response to request TI_SCI_MSG_GET_DEVICE_STATE. 216 */ 217 struct ti_sci_msg_resp_get_device_state { 218 struct ti_sci_msg_hdr hdr; 219 uint32_t context_loss_count; 220 uint32_t resets; 221 uint8_t programmed_state; 222 #define MSG_DEVICE_HW_STATE_OFF 0 223 #define MSG_DEVICE_HW_STATE_ON 1 224 #define MSG_DEVICE_HW_STATE_TRANS 2 225 uint8_t current_state; 226 } __packed; 227 228 /** 229 * struct ti_sci_msg_req_set_device_resets - Set the desired resets 230 * configuration of the device 231 * @hdr: Generic header 232 * @id: Indicates which device to modify 233 * @resets: A bit field of resets for the device. The meaning, behavior, 234 * and usage of the reset flags are device specific. 0 for a bit 235 * indicates releasing the reset represented by that bit while 1 236 * indicates keeping it held. 237 * 238 * Request type is TI_SCI_MSG_SET_DEVICE_RESETS, responded with a generic 239 * ACK/NACK message. 240 */ 241 struct ti_sci_msg_req_set_device_resets { 242 struct ti_sci_msg_hdr hdr; 243 uint32_t id; 244 uint32_t resets; 245 } __packed; 246 247 /** 248 * struct ti_sci_msg_req_set_clock_state - Request to setup a Clock state 249 * @hdr: Generic Header, Certain flags can be set specific to the clocks: 250 * MSG_FLAG_CLOCK_ALLOW_SSC: Allow this clock to be modified 251 * via spread spectrum clocking. 252 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE: Allow this clock's 253 * frequency to be changed while it is running so long as it 254 * is within the min/max limits. 255 * MSG_FLAG_CLOCK_INPUT_TERM: Enable input termination, this 256 * is only applicable to clock inputs on the SoC pseudo-device. 257 * @dev_id: Device identifier this request is for 258 * @clk_id: Clock identifier for the device for this request. 259 * Each device has it's own set of clock inputs. This indexes 260 * which clock input to modify. 261 * @request_state: Request the state for the clock to be set to. 262 * MSG_CLOCK_SW_STATE_UNREQ: The IP does not require this clock, 263 * it can be disabled, regardless of the state of the device 264 * MSG_CLOCK_SW_STATE_AUTO: Allow the System Controller to 265 * automatically manage the state of this clock. If the device 266 * is enabled, then the clock is enabled. If the device is set 267 * to off or retention, then the clock is internally set as not 268 * being required by the device.(default) 269 * MSG_CLOCK_SW_STATE_REQ: Configure the clock to be enabled, 270 * regardless of the state of the device. 271 * 272 * Normally, all required clocks are managed by TISCI entity, this is used 273 * only for specific control *IF* required. Auto managed state is 274 * MSG_CLOCK_SW_STATE_AUTO, in other states, TISCI entity assume remote 275 * will explicitly control. 276 * 277 * Request type is TI_SCI_MSG_SET_CLOCK_STATE, response is a generic 278 * ACK or NACK message. 279 */ 280 struct ti_sci_msg_req_set_clock_state { 281 /* Additional hdr->flags options */ 282 #define MSG_FLAG_CLOCK_ALLOW_SSC TI_SCI_MSG_FLAG(8) 283 #define MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE TI_SCI_MSG_FLAG(9) 284 #define MSG_FLAG_CLOCK_INPUT_TERM TI_SCI_MSG_FLAG(10) 285 struct ti_sci_msg_hdr hdr; 286 uint32_t dev_id; 287 uint8_t clk_id; 288 #define MSG_CLOCK_SW_STATE_UNREQ 0 289 #define MSG_CLOCK_SW_STATE_AUTO 1 290 #define MSG_CLOCK_SW_STATE_REQ 2 291 uint8_t request_state; 292 } __packed; 293 294 /** 295 * struct ti_sci_msg_req_get_clock_state - Request for clock state 296 * @hdr: Generic Header 297 * @dev_id: Device identifier this request is for 298 * @clk_id: Clock identifier for the device for this request. 299 * Each device has it's own set of clock inputs. This indexes 300 * which clock input to get state of. 301 * 302 * Request type is TI_SCI_MSG_GET_CLOCK_STATE, response is state 303 * of the clock 304 */ 305 struct ti_sci_msg_req_get_clock_state { 306 struct ti_sci_msg_hdr hdr; 307 uint32_t dev_id; 308 uint8_t clk_id; 309 } __packed; 310 311 /** 312 * struct ti_sci_msg_resp_get_clock_state - Response to get clock state 313 * @hdr: Generic Header 314 * @programmed_state: Any programmed state of the clock. This is one of 315 * MSG_CLOCK_SW_STATE* values. 316 * @current_state: Current state of the clock. This is one of: 317 * MSG_CLOCK_HW_STATE_NOT_READY: Clock is not ready 318 * MSG_CLOCK_HW_STATE_READY: Clock is ready 319 * 320 * Response to TI_SCI_MSG_GET_CLOCK_STATE. 321 */ 322 struct ti_sci_msg_resp_get_clock_state { 323 struct ti_sci_msg_hdr hdr; 324 uint8_t programmed_state; 325 #define MSG_CLOCK_HW_STATE_NOT_READY 0 326 #define MSG_CLOCK_HW_STATE_READY 1 327 uint8_t current_state; 328 } __packed; 329 330 /** 331 * struct ti_sci_msg_req_set_clock_parent - Set the clock parent 332 * @hdr: Generic Header 333 * @dev_id: Device identifier this request is for 334 * @clk_id: Clock identifier for the device for this request. 335 * Each device has it's own set of clock inputs. This indexes 336 * which clock input to modify. 337 * @parent_id: The new clock parent is selectable by an index via this 338 * parameter. 339 * 340 * Request type is TI_SCI_MSG_SET_CLOCK_PARENT, response is generic 341 * ACK / NACK message. 342 */ 343 struct ti_sci_msg_req_set_clock_parent { 344 struct ti_sci_msg_hdr hdr; 345 uint32_t dev_id; 346 uint8_t clk_id; 347 uint8_t parent_id; 348 } __packed; 349 350 /** 351 * struct ti_sci_msg_req_get_clock_parent - Get the clock parent 352 * @hdr: Generic Header 353 * @dev_id: Device identifier this request is for 354 * @clk_id: Clock identifier for the device for this request. 355 * Each device has it's own set of clock inputs. This indexes 356 * which clock input to get the parent for. 357 * 358 * Request type is TI_SCI_MSG_GET_CLOCK_PARENT, response is parent information 359 */ 360 struct ti_sci_msg_req_get_clock_parent { 361 struct ti_sci_msg_hdr hdr; 362 uint32_t dev_id; 363 uint8_t clk_id; 364 } __packed; 365 366 /** 367 * struct ti_sci_msg_resp_get_clock_parent - Response with clock parent 368 * @hdr: Generic Header 369 * @parent_id: The current clock parent 370 * 371 * Response to TI_SCI_MSG_GET_CLOCK_PARENT. 372 */ 373 struct ti_sci_msg_resp_get_clock_parent { 374 struct ti_sci_msg_hdr hdr; 375 uint8_t parent_id; 376 } __packed; 377 378 /** 379 * struct ti_sci_msg_req_get_clock_num_parents - Request to get clock parents 380 * @hdr: Generic header 381 * @dev_id: Device identifier this request is for 382 * @clk_id: Clock identifier for the device for this request. 383 * 384 * This request provides information about how many clock parent options 385 * are available for a given clock to a device. This is typically used 386 * for input clocks. 387 * 388 * Request type is TI_SCI_MSG_GET_NUM_CLOCK_PARENTS, response is appropriate 389 * message, or NACK in case of inability to satisfy request. 390 */ 391 struct ti_sci_msg_req_get_clock_num_parents { 392 struct ti_sci_msg_hdr hdr; 393 uint32_t dev_id; 394 uint8_t clk_id; 395 } __packed; 396 397 /** 398 * struct ti_sci_msg_resp_get_clock_num_parents - Response for get clk parents 399 * @hdr: Generic header 400 * @num_parents: Number of clock parents 401 * 402 * Response to TI_SCI_MSG_GET_NUM_CLOCK_PARENTS 403 */ 404 struct ti_sci_msg_resp_get_clock_num_parents { 405 struct ti_sci_msg_hdr hdr; 406 uint8_t num_parents; 407 } __packed; 408 409 /** 410 * struct ti_sci_msg_req_query_clock_freq - Request to query a frequency 411 * @hdr: Generic Header 412 * @dev_id: Device identifier this request is for 413 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum 414 * allowable programmed frequency and does not account for clock 415 * tolerances and jitter. 416 * @target_freq_hz: The target clock frequency. A frequency will be found 417 * as close to this target frequency as possible. 418 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum 419 * allowable programmed frequency and does not account for clock 420 * tolerances and jitter. 421 * @clk_id: Clock identifier for the device for this request. 422 * 423 * NOTE: Normally clock frequency management is automatically done by TISCI 424 * entity. In case of specific requests, TISCI evaluates capability to achieve 425 * requested frequency within provided range and responds with 426 * result message. 427 * 428 * Request type is TI_SCI_MSG_QUERY_CLOCK_FREQ, response is appropriate message, 429 * or NACK in case of inability to satisfy request. 430 */ 431 struct ti_sci_msg_req_query_clock_freq { 432 struct ti_sci_msg_hdr hdr; 433 uint32_t dev_id; 434 uint64_t min_freq_hz; 435 uint64_t target_freq_hz; 436 uint64_t max_freq_hz; 437 uint8_t clk_id; 438 } __packed; 439 440 /** 441 * struct ti_sci_msg_resp_query_clock_freq - Response to a clock frequency query 442 * @hdr: Generic Header 443 * @freq_hz: Frequency that is the best match in Hz. 444 * 445 * Response to request type TI_SCI_MSG_QUERY_CLOCK_FREQ. NOTE: if the request 446 * cannot be satisfied, the message will be of type NACK. 447 */ 448 struct ti_sci_msg_resp_query_clock_freq { 449 struct ti_sci_msg_hdr hdr; 450 uint64_t freq_hz; 451 } __packed; 452 453 /** 454 * struct ti_sci_msg_req_set_clock_freq - Request to setup a clock frequency 455 * @hdr: Generic Header 456 * @dev_id: Device identifier this request is for 457 * @min_freq_hz: The minimum allowable frequency in Hz. This is the minimum 458 * allowable programmed frequency and does not account for clock 459 * tolerances and jitter. 460 * @target_freq_hz: The target clock frequency. The clock will be programmed 461 * at a rate as close to this target frequency as possible. 462 * @max_freq_hz: The maximum allowable frequency in Hz. This is the maximum 463 * allowable programmed frequency and does not account for clock 464 * tolerances and jitter. 465 * @clk_id: Clock identifier for the device for this request. 466 * 467 * NOTE: Normally clock frequency management is automatically done by TISCI 468 * entity. In case of specific requests, TISCI evaluates capability to achieve 469 * requested range and responds with success/failure message. 470 * 471 * This sets the desired frequency for a clock within an allowable 472 * range. This message will fail on an enabled clock unless 473 * MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE is set for the clock. Additionally, 474 * if other clocks have their frequency modified due to this message, 475 * they also must have the MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE or be disabled. 476 * 477 * Calling set frequency on a clock input to the SoC pseudo-device will 478 * inform the PMMC of that clock's frequency. Setting a frequency of 479 * zero will indicate the clock is disabled. 480 * 481 * Calling set frequency on clock outputs from the SoC pseudo-device will 482 * function similarly to setting the clock frequency on a device. 483 * 484 * Request type is TI_SCI_MSG_SET_CLOCK_FREQ, response is a generic ACK/NACK 485 * message. 486 */ 487 struct ti_sci_msg_req_set_clock_freq { 488 struct ti_sci_msg_hdr hdr; 489 uint32_t dev_id; 490 uint64_t min_freq_hz; 491 uint64_t target_freq_hz; 492 uint64_t max_freq_hz; 493 uint8_t clk_id; 494 } __packed; 495 496 /** 497 * struct ti_sci_msg_req_get_clock_freq - Request to get the clock frequency 498 * @hdr: Generic Header 499 * @dev_id: Device identifier this request is for 500 * @clk_id: Clock identifier for the device for this request. 501 * 502 * NOTE: Normally clock frequency management is automatically done by TISCI 503 * entity. In some cases, clock frequencies are configured by host. 504 * 505 * Request type is TI_SCI_MSG_GET_CLOCK_FREQ, responded with clock frequency 506 * that the clock is currently at. 507 */ 508 struct ti_sci_msg_req_get_clock_freq { 509 struct ti_sci_msg_hdr hdr; 510 uint32_t dev_id; 511 uint8_t clk_id; 512 } __packed; 513 514 /** 515 * struct ti_sci_msg_resp_get_clock_freq - Response of clock frequency request 516 * @hdr: Generic Header 517 * @freq_hz: Frequency that the clock is currently on, in Hz. 518 * 519 * Response to request type TI_SCI_MSG_GET_CLOCK_FREQ. 520 */ 521 struct ti_sci_msg_resp_get_clock_freq { 522 struct ti_sci_msg_hdr hdr; 523 uint64_t freq_hz; 524 } __packed; 525 526 #define TISCI_ADDR_LOW_MASK 0x00000000ffffffff 527 #define TISCI_ADDR_HIGH_MASK 0xffffffff00000000 528 #define TISCI_ADDR_HIGH_SHIFT 32 529 530 /** 531 * struct ti_sci_msg_req_proc_request - Request a processor 532 * 533 * @hdr: Generic Header 534 * @processor_id: ID of processor 535 * 536 * Request type is TISCI_MSG_PROC_REQUEST, response is a generic ACK/NACK 537 * message. 538 */ 539 struct ti_sci_msg_req_proc_request { 540 struct ti_sci_msg_hdr hdr; 541 uint8_t processor_id; 542 } __packed; 543 544 /** 545 * struct ti_sci_msg_req_proc_release - Release a processor 546 * 547 * @hdr: Generic Header 548 * @processor_id: ID of processor 549 * 550 * Request type is TISCI_MSG_PROC_RELEASE, response is a generic ACK/NACK 551 * message. 552 */ 553 struct ti_sci_msg_req_proc_release { 554 struct ti_sci_msg_hdr hdr; 555 uint8_t processor_id; 556 } __packed; 557 558 /** 559 * struct ti_sci_msg_req_proc_handover - Handover a processor to a host 560 * 561 * @hdr: Generic Header 562 * @processor_id: ID of processor 563 * @host_id: New Host we want to give control to 564 * 565 * Request type is TISCI_MSG_PROC_HANDOVER, response is a generic ACK/NACK 566 * message. 567 */ 568 struct ti_sci_msg_req_proc_handover { 569 struct ti_sci_msg_hdr hdr; 570 uint8_t processor_id; 571 uint8_t host_id; 572 } __packed; 573 574 /* A53 Config Flags */ 575 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_EN 0x00000001 576 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_NIDEN 0x00000002 577 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPIDEN 0x00000004 578 #define PROC_BOOT_CFG_FLAG_ARMV8_DBG_SPNIDEN 0x00000008 579 #define PROC_BOOT_CFG_FLAG_ARMV8_AARCH32 0x00000100 580 581 /* R5 Config Flags */ 582 #define PROC_BOOT_CFG_FLAG_R5_DBG_EN 0x00000001 583 #define PROC_BOOT_CFG_FLAG_R5_DBG_NIDEN 0x00000002 584 #define PROC_BOOT_CFG_FLAG_R5_LOCKSTEP 0x00000100 585 #define PROC_BOOT_CFG_FLAG_R5_TEINIT 0x00000200 586 #define PROC_BOOT_CFG_FLAG_R5_NMFI_EN 0x00000400 587 #define PROC_BOOT_CFG_FLAG_R5_TCM_RSTBASE 0x00000800 588 #define PROC_BOOT_CFG_FLAG_R5_BTCM_EN 0x00001000 589 #define PROC_BOOT_CFG_FLAG_R5_ATCM_EN 0x00002000 590 591 /** 592 * struct ti_sci_msg_req_set_proc_boot_config - Set Processor boot configuration 593 * @hdr: Generic Header 594 * @processor_id: ID of processor 595 * @bootvector_low: Lower 32bit (Little Endian) of boot vector 596 * @bootvector_high: Higher 32bit (Little Endian) of boot vector 597 * @config_flags_set: Optional Processor specific Config Flags to set. 598 * Setting a bit here implies required bit sets to 1. 599 * @config_flags_clear: Optional Processor specific Config Flags to clear. 600 * Setting a bit here implies required bit gets cleared. 601 * 602 * Request type is TISCI_MSG_SET_PROC_BOOT_CONFIG, response is a generic 603 * ACK/NACK message. 604 */ 605 struct ti_sci_msg_req_set_proc_boot_config { 606 struct ti_sci_msg_hdr hdr; 607 uint8_t processor_id; 608 uint32_t bootvector_low; 609 uint32_t bootvector_high; 610 uint32_t config_flags_set; 611 uint32_t config_flags_clear; 612 } __packed; 613 614 /* ARMV8 Control Flags */ 615 #define PROC_BOOT_CTRL_FLAG_ARMV8_ACINACTM 0x00000001 616 #define PROC_BOOT_CTRL_FLAG_ARMV8_AINACTS 0x00000002 617 #define PROC_BOOT_CTRL_FLAG_ARMV8_L2FLUSHREQ 0x00000100 618 619 /* R5 Control Flags */ 620 #define PROC_BOOT_CTRL_FLAG_R5_CORE_HALT 0x00000001 621 622 /** 623 * struct ti_sci_msg_req_set_proc_boot_ctrl - Set Processor boot control flags 624 * @hdr: Generic Header 625 * @processor_id: ID of processor 626 * @config_flags_set: Optional Processor specific Config Flags to set. 627 * Setting a bit here implies required bit sets to 1. 628 * @config_flags_clear: Optional Processor specific Config Flags to clear. 629 * Setting a bit here implies required bit gets cleared. 630 * 631 * Request type is TISCI_MSG_SET_PROC_BOOT_CTRL, response is a generic ACK/NACK 632 * message. 633 */ 634 struct ti_sci_msg_req_set_proc_boot_ctrl { 635 struct ti_sci_msg_hdr hdr; 636 uint8_t processor_id; 637 uint32_t control_flags_set; 638 uint32_t control_flags_clear; 639 } __packed; 640 641 /** 642 * struct ti_sci_msg_req_proc_auth_start_image - Authenticate and start image 643 * @hdr: Generic Header 644 * @processor_id: ID of processor 645 * @cert_addr_low: Lower 32bit (Little Endian) of certificate 646 * @cert_addr_high: Higher 32bit (Little Endian) of certificate 647 * 648 * Request type is TISCI_MSG_PROC_AUTH_BOOT_IMAGE, response is a generic 649 * ACK/NACK message. 650 */ 651 struct ti_sci_msg_req_proc_auth_boot_image { 652 struct ti_sci_msg_hdr hdr; 653 uint8_t processor_id; 654 uint32_t cert_addr_low; 655 uint32_t cert_addr_high; 656 } __packed; 657 658 /** 659 * struct ti_sci_msg_req_get_proc_boot_status - Get processor boot status 660 * @hdr: Generic Header 661 * @processor_id: ID of processor 662 * 663 * Request type is TISCI_MSG_GET_PROC_BOOT_STATUS, response is appropriate 664 * message, or NACK in case of inability to satisfy request. 665 */ 666 struct ti_sci_msg_req_get_proc_boot_status { 667 struct ti_sci_msg_hdr hdr; 668 uint8_t processor_id; 669 } __packed; 670 671 /* ARMv8 Status Flags */ 672 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFE 0x00000001 673 #define PROC_BOOT_STATUS_FLAG_ARMV8_WFI 0x00000002 674 #define PROC_BOOT_STATUS_FLAG_ARMV8_L2F_DONE 0x00000010 675 #define PROC_BOOT_STATUS_FLAG_ARMV8_STANDBYWFIL2 0x00000020 676 677 /* R5 Status Flags */ 678 #define PROC_BOOT_STATUS_FLAG_R5_WFE 0x00000001 679 #define PROC_BOOT_STATUS_FLAG_R5_WFI 0x00000002 680 #define PROC_BOOT_STATUS_FLAG_R5_CLK_GATED 0x00000004 681 #define PROC_BOOT_STATUS_FLAG_R5_LOCKSTEP_PERMITTED 0x00000100 682 683 /** 684 * \brief Processor Status Response 685 * struct ti_sci_msg_resp_get_proc_boot_status - Processor boot status response 686 * @hdr: Generic Header 687 * @processor_id: ID of processor 688 * @bootvector_low: Lower 32bit (Little Endian) of boot vector 689 * @bootvector_high: Higher 32bit (Little Endian) of boot vector 690 * @config_flags: Optional Processor specific Config Flags set. 691 * @control_flags: Optional Processor specific Control Flags. 692 * @status_flags: Optional Processor specific Status Flags set. 693 * 694 * Response to TISCI_MSG_GET_PROC_BOOT_STATUS. 695 */ 696 struct ti_sci_msg_resp_get_proc_boot_status { 697 struct ti_sci_msg_hdr hdr; 698 uint8_t processor_id; 699 uint32_t bootvector_low; 700 uint32_t bootvector_high; 701 uint32_t config_flags; 702 uint32_t control_flags; 703 uint32_t status_flags; 704 } __packed; 705 706 /** 707 * struct ti_sci_msg_req_wait_proc_boot_status - Wait for a processor boot status 708 * @hdr: Generic Header 709 * @processor_id: ID of processor 710 * @num_wait_iterations Total number of iterations we will check before 711 * we will timeout and give up 712 * @num_match_iterations How many iterations should we have continued 713 * status to account for status bits glitching. 714 * This is to make sure that match occurs for 715 * consecutive checks. This implies that the 716 * worst case should consider that the stable 717 * time should at the worst be num_wait_iterations 718 * num_match_iterations to prevent timeout. 719 * @delay_per_iteration_us Specifies how long to wait (in micro seconds) 720 * between each status checks. This is the minimum 721 * duration, and overhead of register reads and 722 * checks are on top of this and can vary based on 723 * varied conditions. 724 * @delay_before_iterations_us Specifies how long to wait (in micro seconds) 725 * before the very first check in the first 726 * iteration of status check loop. This is the 727 * minimum duration, and overhead of register 728 * reads and checks are. 729 * @status_flags_1_set_all_wait If non-zero, Specifies that all bits of the 730 * status matching this field requested MUST be 1. 731 * @status_flags_1_set_any_wait If non-zero, Specifies that at least one of the 732 * bits matching this field requested MUST be 1. 733 * @status_flags_1_clr_all_wait If non-zero, Specifies that all bits of the 734 * status matching this field requested MUST be 0. 735 * @status_flags_1_clr_any_wait If non-zero, Specifies that at least one of the 736 * bits matching this field requested MUST be 0. 737 * 738 * Request type is TISCI_MSG_WAIT_PROC_BOOT_STATUS, response is appropriate 739 * message, or NACK in case of inability to satisfy request. 740 */ 741 struct ti_sci_msg_req_wait_proc_boot_status { 742 struct ti_sci_msg_hdr hdr; 743 uint8_t processor_id; 744 uint8_t num_wait_iterations; 745 uint8_t num_match_iterations; 746 uint8_t delay_per_iteration_us; 747 uint8_t delay_before_iterations_us; 748 uint32_t status_flags_1_set_all_wait; 749 uint32_t status_flags_1_set_any_wait; 750 uint32_t status_flags_1_clr_all_wait; 751 uint32_t status_flags_1_clr_any_wait; 752 } __packed; 753 754 /** 755 * struct ti_sci_msg_req_enter_sleep - Request for TI_SCI_MSG_ENTER_SLEEP. 756 * 757 * @hdr Generic Header 758 * @mode Low power mode to enter. 759 * @proc_id Processor id to be restored. 760 * @core_resume_lo Low 32-bits of physical pointer to address for core 761 * to begin execution upon resume. 762 * @core_resume_hi High 32-bits of physical pointer to address for core 763 * to begin execution upon resume. 764 * 765 * This message is to be sent after TI_SCI_MSG_PREPARE_SLEEP is sent from OS 766 * and is what actually triggers entry into the specified low power mode. 767 */ 768 struct ti_sci_msg_req_enter_sleep { 769 struct ti_sci_msg_hdr hdr; 770 #define MSG_VALUE_SLEEP_MODE_DEEP_SLEEP 0x0 771 uint8_t mode; 772 uint8_t processor_id; 773 uint32_t core_resume_lo; 774 uint32_t core_resume_hi; 775 } __packed; 776 777 /** 778 * struct ti_sci_msg_req_lpm_get_next_sys_mode - Request for TI_SCI_MSG_LPM_GET_NEXT_SYS_MODE. 779 * 780 * @hdr Generic Header 781 * 782 * This message is used to enquire DM for selected system wide low power mode. 783 */ 784 struct ti_sci_msg_req_lpm_get_next_sys_mode { 785 struct ti_sci_msg_hdr hdr; 786 } __packed; 787 788 /** 789 * struct ti_sci_msg_resp_lpm_get_next_sys_mode - Response for TI_SCI_MSG_LPM_GET_NEXT_SYS_MODE. 790 * 791 * @hdr Generic Header 792 * @mode The selected system wide low power mode. 793 * 794 * Note: If the mode selection is not yet locked, this API returns "not selected" mode. 795 */ 796 struct ti_sci_msg_resp_lpm_get_next_sys_mode { 797 struct ti_sci_msg_hdr hdr; 798 uint8_t mode; 799 } __packed; 800 801 #endif /* TI_SCI_PROTOCOL_H */ 802