| 7b56928a | 07-Mar-2018 |
Soby Mathew <soby.mathew@arm.com> |
Juno: Change the Firmware update detect mechanism
Previously, Juno used to depend on the SSC_GPRETN register to inform about the reset syndrome. This method was removed when SCP migrated to the SDS
Juno: Change the Firmware update detect mechanism
Previously, Juno used to depend on the SSC_GPRETN register to inform about the reset syndrome. This method was removed when SCP migrated to the SDS framework. But even the SDS framework doesn't report the reset syndrome correctly and hence Juno failed to enter Firmware update mode if BL2 authentication failed.
In addition to that, the error code populated in V2M_SYS_NVFLAGS register does not seem to be retained any more on Juno across resets. This could be down to the motherboard firmware not doing the necessary to preserve the value.
Hence this patch modifies the Juno platform to use the same mechanism to trigger firmware update as FVP which is to corrupt the FIP TOC on authentication failure. The implementation in `fvp_err.c` is made common for ARM platforms and is moved to the new `arm_err.c` file in plat/arm/common folder. The BL1 and BL2 mmap table entries for Juno are modified to allow write to the Flash memory address.
Change-Id: Ica7d49a3e8a46a90efd4cf340f19fda3b549e945 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| f5c1eed2 | 07-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1302 from hzhuang1/fix_build
Fix build with clang on hikey |
| 74847ab2 | 06-Mar-2018 |
Soby Mathew <soby.mathew@arm.com> |
BL2U: Fix ARM platform timer initilization
This issue was detected when testing FWU on Juno. The Timer `timer_ops` was not being initialized before being used by the SDS driver on Juno. This patch a
BL2U: Fix ARM platform timer initilization
This issue was detected when testing FWU on Juno. The Timer `timer_ops` was not being initialized before being used by the SDS driver on Juno. This patch adds the call to `generic_delay_timer_init()` during bl2u_early_platform_setup(). This is done generically for all ARM platforms because the cost involved is minimal.
Change-Id: I349cf0bd1db68406eb2298b65f9c729f792cabdc Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| dbf9f283 | 07-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1239 from arve-android/trusty-fixes
Trusty fixes |
| 84b589c9 | 02-Mar-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: fix build issue with CLANG
plat/hisilicon/hikey/hikey_bl1_setup.c:565:47: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths
hikey: fix build issue with CLANG
plat/hisilicon/hikey/hikey_bl1_setup.c:565:47: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths] __asm__ volatile ("mrs %0, cpacr_el1" : "=r"(data));
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 056b3d49 | 02-Mar-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: fix build issue with CLANG
plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c:290:20: error: unused function 'hisi_pdc_set_intmask' [-Werror,-Wunused-function] static inline void hisi_pdc_se
hikey960: fix build issue with CLANG
plat/hisilicon/hikey960/drivers/pwrc/hisi_pwrc.c:290:20: error: unused function 'hisi_pdc_set_intmask' [-Werror,-Wunused-function] static inline void hisi_pdc_set_intmask(void *pdc_base_addr, ^ 1 error generated. Makefile:605: recipe for target 'build/hikey960/release/bl31/hisi_pwrc.o' failed make: *** [build/hikey960/release/bl31/hisi_pwrc.o] Error 1
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| eb4ff4c1 | 05-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1288 from michpappas/tf-issues#558_qemu_separate_code_and_data
qemu: Support SEPARATE_CODE_AND_RODATA |
| db0a68fd | 05-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1298 from michpappas/tf-issues#560_qemu_UART1_data_abort
qemu: Accessing UART1 causes a data abort |
| 4e858ba0 | 05-Mar-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: move out duplicated code
Create hikey960_bl_common.c to store duplication initialization code in both BL1 and BL2.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| 19b731e8 | 30-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: fix invoking driver init in image load driver
It's unnecessary to call platform driver initialization in image load driver. We could make bl2_platform_setup() to executing just before SCP_
hikey960: fix invoking driver init in image load driver
It's unnecessary to call platform driver initialization in image load driver. We could make bl2_platform_setup() to executing just before SCP_BL2 by setting flag IMAGE_ATTRIB_PLAT_SETUP.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| d2128731 | 25-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: migrate to bl2_el3
Since non-TF ROM is used in HiKey960 platform (Hisilicon Hi3660 SoC), replace BL1 by BL2_EL3 in normal boot mode.
When flush images in recovery mode, keep to use BL1.
hikey960: migrate to bl2_el3
Since non-TF ROM is used in HiKey960 platform (Hisilicon Hi3660 SoC), replace BL1 by BL2_EL3 in normal boot mode.
When flush images in recovery mode, keep to use BL1.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 99ffcaf2 | 29-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: drop LOAD_IMAGE v1
Since LOAD_IMAGE_V2 is always enabled in HiKey960 platform. Drop LOAD_IMAGE v1 to simplify code.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| 8495c03a | 29-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: fix memory overlapped in memory map
MAP_TSP_MEM could be either in SRAM or DRAM. When MAP_TSP_MEM is in DRAM, it's overlapped with MAP_DDR.
Since TSP_MEM is always configured in DRAM case
hikey960: fix memory overlapped in memory map
MAP_TSP_MEM could be either in SRAM or DRAM. When MAP_TSP_MEM is in DRAM, it's overlapped with MAP_DDR.
Since TSP_MEM is always configured in DRAM case, it means MAP_OPTEE_PAGEABLE is always disabled. Just remove it.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 17cf8ab1 | 27-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: avoid to dump message when fetch boardid
The main difference between HiKey960 v1 hardware and HiKey960 v2 hardware is on UART console.
But the function of detecting boardid dumps message
hikey960: avoid to dump message when fetch boardid
The main difference between HiKey960 v1 hardware and HiKey960 v2 hardware is on UART console.
But the function of detecting boardid dumps message before console ready. So fix it by removing those messages.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 054c3e0f | 05-Mar-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: move out duplicated code
Create hikey_bl_common.c to store duplicated initialization code in BL1 and BL2.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| a628b1ab | 25-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: migrate to bl2_el3
Since non-TF ROM is used in HiKey platform (Hisilicon Hi6220 SoC), replace BL1 by BL2_EL3 in normal boot mode.
When we recovery images in recovery mode, keep to use BL1.
hikey: migrate to bl2_el3
Since non-TF ROM is used in HiKey platform (Hisilicon Hi6220 SoC), replace BL1 by BL2_EL3 in normal boot mode.
When we recovery images in recovery mode, keep to use BL1.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| a9b3021e | 29-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: clean dcache for SRAM after initialized
Although SRAM is initialized, DCACHE should be cleaned too. Because MCU is a parrallel core to access SRAM. We need to make sure that initialized value
hikey: clean dcache for SRAM after initialized
Although SRAM is initialized, DCACHE should be cleaned too. Because MCU is a parrallel core to access SRAM. We need to make sure that initialized value is really written to SRAM before MCU using it.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 103c213c | 28-Jan-2018 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey: drop LOAD_IMAGE v1
Since LOAD_IMAGE_V2 is always enabled in HiKey platform. Drop LOAD_IMAGE v1 to simplify code.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| c5c7538e | 03-Mar-2018 |
Michalis Pappas <mpappas@fastmail.fm> |
qemu: Accessing UART1 causes a data abort
The register address range of UART1 (crash console) are outside the address ranges mapped for MMIO, resulting to an MMU abort when the device registers are
qemu: Accessing UART1 causes a data abort
The register address range of UART1 (crash console) are outside the address ranges mapped for MMIO, resulting to an MMU abort when the device registers are accessed.
Increase the size of DEVICE1 memory to include the range of UART1.
Fixes ARM-software/tf-issues#560
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>
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| c37be00b | 03-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1292 from danh-arm/dh/spurious-dep-warn
Suppress spurious deprecated declaration warnings |
| 06e3a5e1 | 03-Mar-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1297 from soby-mathew/sm/fix_aarch32_plat_cmn
Remove sp_min functions from plat_common.c |
| 0ed8c001 | 01-Mar-2018 |
Soby Mathew <soby.mathew@arm.com> |
Remove sp_min functions from plat_common.c
This patch removes default platform implementations of sp_min platform APIs from plat/common/aarch32/plat_common.c. The APIs are now implemented in `plat_s
Remove sp_min functions from plat_common.c
This patch removes default platform implementations of sp_min platform APIs from plat/common/aarch32/plat_common.c. The APIs are now implemented in `plat_sp_min_common.c` file within the same folder.
The ARM platform layer had a weak definition of sp_min_platform_setup2() which conflicted with the weak definition in the common file. Hence this patch fixes that by introducing a `plat_arm_` version of the API thus allowing individual boards within ARM platforms to override it if they wish to.
Fixes ARM-software/tf-issues#559
Change-Id: I11a74ecae8191878ccc7ea03f12bdd5ae88faba5 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| d0c63eaa | 01-Feb-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Fix FVP DRAM2 size
This was correct according to the model specifications , but it seems that FVP doesn't implement it. It is safer to use the size exposed by the DTB which is currently used by Linu
Fix FVP DRAM2 size
This was correct according to the model specifications , but it seems that FVP doesn't implement it. It is safer to use the size exposed by the DTB which is currently used by Linux.
Change-Id: I9aabe3284a50ec2a36ed94966eb7e4ddf37cec3b Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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| 97924e45 | 27-Feb-2018 |
Dan Handley <dan.handley@arm.com> |
Suppress spurious deprecated declaration warnings
Some generic compatibility functions emit deprecated declaration warnings even when platforms do not use the deprecated functions directly. This can
Suppress spurious deprecated declaration warnings
Some generic compatibility functions emit deprecated declaration warnings even when platforms do not use the deprecated functions directly. This can be confusing. Suppress these warnings by using: `#pragma GCC diagnostic ignored "-Wdeprecated-declarations"`
Also emit a runtime warning if the weak plat/common implemntation of plat_get_syscnt_freq2() is used, as this implies the platform has not migrated from plat_get_syscnt_freq(). The deprecated declaration warnings only help detect when platforms are calling deprecated functions, not when they are defining deprecated functions.
Fixes ARM-software/tf-issues#550
Change-Id: Id14a92279c2634c1e76db8ef210da8affdbb2a5d Signed-off-by: Dan Handley <dan.handley@arm.com>
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| fdcc08af | 28-Feb-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1290 from jeenu-arm/dynamiq
DynamIQ on FVP |