| 3f9c9784 | 14-Feb-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: make functions and macros more common
Mainly remove suffix 1 from prefix stm32mp1 in several macros and functions that can be used in drivers shared by different platforms.
Change-Id: I22
stm32mp1: make functions and macros more common
Mainly remove suffix 1 from prefix stm32mp1 in several macros and functions that can be used in drivers shared by different platforms.
Change-Id: I2295c44f5b1edac7e80a93c0e8dfd671b36e88e7 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| c9d75b3c | 14-Feb-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: split code between common and private parts
Some parts of code could be shared with platform derivatives, or new platforms. A new folder plat/st/common is created to put common parts.
stm
stm32mp1: split code between common and private parts
Some parts of code could be shared with platform derivatives, or new platforms. A new folder plat/st/common is created to put common parts.
stm32mp_common.h is a common API aggregate.
Remove some casts where applicable. Fix some types where applicable. Remove also some platform includes that are already in stm32mp1_def.h.
Change-Id: I46d763c8d9e15732d1ee7383207fd58206d7f583 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
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| 4244d0f3 | 13-Feb-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1819 from thloh85-intel/integration
plat: intel: Fix faulty DDR calibration value |
| e0dd6696 | 13-Feb-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1813 from oscardagrach/hikey960-iomcu-dma
hikey960: enable IOMCU DMAC |
| df80b5bf | 13-Feb-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1816 from grandpaul/paulliu-warp7-multiconsoleapi
imx: warp7: Migrate to MULTI_CONSOLE_API |
| 51f366ac | 13-Feb-2019 |
Loh Tien Hock <tien.hock.loh@intel.com> |
plat: intel: Fix faulty DDR calibration value
A DDR calibration value is missing write mask, causing ECC DDR calibration to fail. This patch addresses the issue. ECC should also be scrubbed before M
plat: intel: Fix faulty DDR calibration value
A DDR calibration value is missing write mask, causing ECC DDR calibration to fail. This patch addresses the issue. ECC should also be scrubbed before MMU initializes, thus the scrubbing is moved to ddr intialization phase.
Signed-off-by: Loh Tien Hock <tien.hock.loh@intel.com>
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| 819dcd7c | 12-Feb-2019 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
fvp: trusty: Move dynamic xlat enable to platform
Rather than letting the Trusty makefile set the option to enable dynamic translation tables, make platforms do it themselves.
This also allows plat
fvp: trusty: Move dynamic xlat enable to platform
Rather than letting the Trusty makefile set the option to enable dynamic translation tables, make platforms do it themselves.
This also allows platforms to replace the implementation of the translation tables library as long as they use the same function prototypes.
Change-Id: Ia60904f61709ac323addcb57f7a83391d9e21cd0 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 70086dc4 | 12-Feb-2019 |
Ying-Chun Liu (PaulLiu) <paulliu@debian.org> |
imx: warp7: Migrate to MULTI_CONSOLE_API
This commit migrates to MULTI_CONSOLE_API for IMX Warp7 board. We also rename the functions in imx_uart driver to more specific one.
Signed-off-by: Ying-Chu
imx: warp7: Migrate to MULTI_CONSOLE_API
This commit migrates to MULTI_CONSOLE_API for IMX Warp7 board. We also rename the functions in imx_uart driver to more specific one.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paulliu@debian.org>
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| 34b3eb14 | 11-Feb-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: common: Do not release processor control on startup
ATF should be the only host needing to control a processor that it has started. ATF will need this control to stop the core later. Do not
ti: k3: common: Do not release processor control on startup
ATF should be the only host needing to control a processor that it has started. ATF will need this control to stop the core later. Do not relinquish control of a core after starting the core.
Signed-off-by: Andrew F. Davis <afd@ti.com>
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| a9ae424e | 11-Feb-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: ti_sci: Use non-blocking TI-SCI messages for power down
Now that we have non-blocking TI-SCI functions we can initiate the shutdown sequence from the PSCI handler without needing th
ti: k3: drivers: ti_sci: Use non-blocking TI-SCI messages for power down
Now that we have non-blocking TI-SCI functions we can initiate the shutdown sequence from the PSCI handler without needing the ti_sci_proc_shutdown helper function, which is removed. This gives us the greater control and flexibility that will be needed when cluster power down sequences are added.
Signed-off-by: Andrew F. Davis <afd@ti.com>
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| e9152c13 | 11-Feb-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: ti_sci: Add non-blocking TI-SCI messages
Most TI-SCI functions request an ACK and wait until it is received. For some power sequence tasks we cannot wait but instead queue messages
ti: k3: drivers: ti_sci: Add non-blocking TI-SCI messages
Most TI-SCI functions request an ACK and wait until it is received. For some power sequence tasks we cannot wait but instead queue messages asynchronously. Three messages have been identified that will need to be used in this way. Add non-waiting versions of these functions.
Signed-off-by: Andrew F. Davis <afd@ti.com>
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| 60d23323 | 11-Feb-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: ti_sci: Request and check for ACK by default
Currently almost all TI-SCI messages request and check for an ACK from the system firmware. Move this into a common place to remove the
ti: k3: drivers: ti_sci: Request and check for ACK by default
Currently almost all TI-SCI messages request and check for an ACK from the system firmware. Move this into a common place to remove the same from each function.
Signed-off-by: Andrew F. Davis <afd@ti.com>
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| b3ca8aab | 11-Feb-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: ti_sci: Add exclusive device accessors
When a device is requested with TI-SCI its control can be made exclusive to the requesting host. This was currently the default but is not wha
ti: k3: drivers: ti_sci: Add exclusive device accessors
When a device is requested with TI-SCI its control can be made exclusive to the requesting host. This was currently the default but is not what is needed most of the time. Add _exclusive versions of the request functions and remove the exclusive flag from the default version.
Signed-off-by: Andrew F. Davis <afd@ti.com>
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| 33baa1e3 | 11-Feb-2019 |
Andrew F. Davis <afd@ti.com> |
ti: k3: drivers: ti_sci: Internalize raw get/set state functions
The raw get and set state functions for both devices and clocks are only meant for use internal to the TI-SCI driver, the same functi
ti: k3: drivers: ti_sci: Internalize raw get/set state functions
The raw get and set state functions for both devices and clocks are only meant for use internal to the TI-SCI driver, the same functionality is available from the other API that call into these. Remove them from the external interface and make them static scope to the driver.
Signed-off-by: Andrew F. Davis <afd@ti.com>
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| c8ab47d4 | 11-Feb-2019 |
Ryan Grachek <ryan@edited.us> |
hikey960: enable IOMCU DMAC
There exists a third DMA controller on the hi3660 SoC called the IOMCU DMAC. This controller is used by peripherals like SPI2 and UART3. Initialize channels 4-7 as non-se
hikey960: enable IOMCU DMAC
There exists a third DMA controller on the hi3660 SoC called the IOMCU DMAC. This controller is used by peripherals like SPI2 and UART3. Initialize channels 4-7 as non-secure, while 0-3 remain reserved and secure.
Signed-off-by: Ryan Grachek <ryan@edited.us>
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| 596929b9 | 30-Jan-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
locks: linker variables to calculate per-cpu bakery lock size
This patch introduces explicit linker variables to mark the start and end of the per-cpu bakery lock section to help bakery_lock_normal.
locks: linker variables to calculate per-cpu bakery lock size
This patch introduces explicit linker variables to mark the start and end of the per-cpu bakery lock section to help bakery_lock_normal.c calculate the size of the section. This patch removes the previously used '__PERCPU_BAKERY_LOCK_SIZE__' linker variable to make the code uniform across GNU linker and ARM linker.
Change-Id: Ie0c51702cbc0fe8a2076005344a1fcebb48e7cca Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 5e2fe3a3 | 11-Jan-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra186: trampoline: include bl_common.h
This patch includes bl_common.h from plat_trampoline.S to link with the __BL31_END__ symbol.
Change-Id: Ie66c5009018472607db668583c9a0b3553f0ae73 Signed-of
Tegra186: trampoline: include bl_common.h
This patch includes bl_common.h from plat_trampoline.S to link with the __BL31_END__ symbol.
Change-Id: Ie66c5009018472607db668583c9a0b3553f0ae73 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| b8c7e54d | 11-Jan-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra186: use common 'BL31_BASE' variable
This patch modfies the 'tegra_soc_pwr_domain_power_down_wfi' handler to use BL31_BASE variable, provided by bl_common.h
Change-Id: I9747228d0193c1ae6999284
Tegra186: use common 'BL31_BASE' variable
This patch modfies the 'tegra_soc_pwr_domain_power_down_wfi' handler to use BL31_BASE variable, provided by bl_common.h
Change-Id: I9747228d0193c1ae6999284458b9f866955a61a2 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| e095ba34 | 10-Jan-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Remove unused function symbols
This patch removes the unused functions that are marked as .global in code but not defined anywhere in the code.
Change-Id: Ia5057a77c0b0b4a61043eab868734cd3437304cc
Remove unused function symbols
This patch removes the unused functions that are marked as .global in code but not defined anywhere in the code.
Change-Id: Ia5057a77c0b0b4a61043eab868734cd3437304cc Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 9c2eda01 | 21-Dec-2018 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: remove circular dependency with common_def.h
This patch stops including common_def.h from platform_def.h to fix a circular depoendency between them.
This means platform_def.h now has to defi
Tegra: remove circular dependency with common_def.h
This patch stops including common_def.h from platform_def.h to fix a circular depoendency between them.
This means platform_def.h now has to define the linker macros: * PLATFORM_LINKER_FORMAT * PLATFORM_LINKER_ARCH
Change-Id: Icd540b1bd32fb37e0e455e9146c8b7f4b314e012 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 636fcb0b | 14-Dec-2018 |
Kalyani Chidambaram <kalyanic@nvidia.com> |
Tegra: define CACHE_WRITEBACK_GRANULE for scatterfile
The scatterfile to support armlink, does not seem to support shift operator. To handle this define CACHE_WRITEBACK_GRANULE with the direct value
Tegra: define CACHE_WRITEBACK_GRANULE for scatterfile
The scatterfile to support armlink, does not seem to support shift operator. To handle this define CACHE_WRITEBACK_GRANULE with the direct value.
Change-Id: I19afc7cb9c55a08cb0703f284d91018d3214353f Signed-off-by: Kalyani Chidambaram <kalyanic@nvidia.com>
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| 30490b15 | 06-Feb-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1785 from vwadekar/tf2.0-tegra-downstream-rebase-1.25.19
Tf2.0 tegra downstream rebase 1.25.19 |
| 9a861d0f | 25-Jan-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra186: remove ENABLE_AFI_DEVICE macro usage
This patch removes this macro and its usage as it is used only within the Tegra186 files and all derived platforms keep the macro enabled.
Change-Id:
Tegra186: remove ENABLE_AFI_DEVICE macro usage
This patch removes this macro and its usage as it is used only within the Tegra186 files and all derived platforms keep the macro enabled.
Change-Id: Ib831b3c002ba4dedc3d5fafbb7d321daa28fa9ea Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 15440c52 | 03-Jan-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
spd: trusty: memmap trusty's code memory before peeking
This patch dynamically maps the first page of trusty's code memory, before accessing it to find out if we are running a 32-bit or 64-bit image
spd: trusty: memmap trusty's code memory before peeking
This patch dynamically maps the first page of trusty's code memory, before accessing it to find out if we are running a 32-bit or 64-bit image.
On Tegra platforms, this means we have to increase the mappings to accomodate the new memmap entry.
Change-Id: If370d1e6cfcccd69b260134c1b462d8d17bee03d Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 500fc9e1 | 03-Jan-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: initialise per-CPU GIC interface(s)
This patch initilises the per-CPU GIC bits during cold boot and secondary CPU power up. Commit 80c50ee accidentally left out this part.
Change-Id: I73ce59
Tegra: initialise per-CPU GIC interface(s)
This patch initilises the per-CPU GIC bits during cold boot and secondary CPU power up. Commit 80c50ee accidentally left out this part.
Change-Id: I73ce59dbc83580a84b827cab89fe7e1f65f9f130 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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