| a64d9f44 | 14-Sep-2022 |
Bo-Chen Chen <rex-bc.chen@mediatek.com> |
refactor(mt8188): move platform_def.h to mt8188/include
It is more suitable to place platform_def.h in mt8188/include.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I35720690ff4
refactor(mt8188): move platform_def.h to mt8188/include
It is more suitable to place platform_def.h in mt8188/include.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I35720690ff4f2ca99c9430edb8bbe17edf9aefb9
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| 4cc1ff7e | 16-Sep-2022 |
Edward-JW Yang <edward-jw.yang@mediatek.com> |
feat(mt8188): add MCUSYS support
Add MCUSYS drivers support for MT8188.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com> Change-Id: I84107702a9fd021c37d2997ad25b321a483a1a66 |
| 45711e4e | 05-Sep-2022 |
Edward-JW Yang <edward-jw.yang@mediatek.com> |
feat(mt8188): add armv8.2 support
Add armv8.2 support for MT8188.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com> Change-Id: I0ac865949ba864fb207ee1f0937092cbabd550de |
| 7079a942 | 17-Aug-2022 |
Fengquan Chen <fengquan.chen@mediatek.corp-partner.google.com> |
feat(mt8188): add DFD control in SiP service
DFD (Design for Debug) is a debugging tool, which scans flip-flops and dumps to internal RAM on the WDT reset. After system reboots, those values could b
feat(mt8188): add DFD control in SiP service
DFD (Design for Debug) is a debugging tool, which scans flip-flops and dumps to internal RAM on the WDT reset. After system reboots, those values could be showed for debugging.
TEST=build pass. BUG=b:244216434
Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.corp-partner.google.com> Change-Id: I468036131e941a46bc1ec12d33105146000730d8
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| 8454f0d6 | 05-Sep-2022 |
Dawei Chien <dawei.chien@mediatek.com> |
feat(mt8188): add EMI MPU basic drivers
EMI MPU stands for external memory interface memory protect unit. MT8188 supports 32 regions and 16 domains.
Signed-off-by: Dawei Chien <dawei.chien@mediatek
feat(mt8188): add EMI MPU basic drivers
EMI MPU stands for external memory interface memory protect unit. MT8188 supports 32 regions and 16 domains.
Signed-off-by: Dawei Chien <dawei.chien@mediatek.com> Change-Id: I9bbeb355665401cc71dda6db22157d9d751570d1
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| bc9410e2 | 05-Sep-2022 |
Garmin Chang <garmin.chang@mediatek.com> |
feat(mt8188): add DCM driver
DCM means dynamic clock management, and it can dynamically slow down or gate clocks during CPU or bus idle.
1. Add MCUSYS related DCM drivers. 2. Enable MCUSYS related
feat(mt8188): add DCM driver
DCM means dynamic clock management, and it can dynamically slow down or gate clocks during CPU or bus idle.
1. Add MCUSYS related DCM drivers. 2. Enable MCUSYS related DCM by default.
Signed-off-by: Garmin Chang <garmin.chang@mediatek.com> Change-Id: I131354d72bbc190af504e9639bcc85a720e2bb17
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| a72b9e77 | 29-Jul-2022 |
Rex-BC Chen <rex-bc.chen@mediatek.com> |
feat(mt8188): add reset and poweroff functions
- Add mtk_pm_system_reset_cros() for cros reset. - Add mtk_pm_system_off_cros() for cros power-off.
TEST=build pass BUG=b:236331724
Signed-off-by: Bo
feat(mt8188): add reset and poweroff functions
- Add mtk_pm_system_reset_cros() for cros reset. - Add mtk_pm_system_off_cros() for cros power-off.
TEST=build pass BUG=b:236331724
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I4117f6080e282551b37a936a490ab7b37ac31827
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| 6ca2046e | 05-Sep-2022 |
Edward-JW Yang <edward-jw.yang@mediatek.com> |
feat(mediatek): add more flexibility of mtk_pm.c
To use power manager function more easier, we add some drivers to let the implementation easier.
Signed-off-by: Edward-JW Yang <edward-jw.yang@media
feat(mediatek): add more flexibility of mtk_pm.c
To use power manager function more easier, we add some drivers to let the implementation easier.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com> Change-Id: Ibc6e1680c4534592ed37de49da39b6667f468ea1
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| 5b95e439 | 05-Sep-2022 |
Edward-JW Yang <edward-jw.yang@mediatek.com> |
feat(mediatek): add more options for build helper
To support more LPM feature, we add more options for build helper.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com> Change-Id: I17eeedbe
feat(mediatek): add more options for build helper
To support more LPM feature, we add more options for build helper.
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.com> Change-Id: I17eeedbe0674e321f1891074ba0c72d858841dae
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| f604e4ef | 05-Sep-2022 |
Bo-Chen Chen <rex-bc.chen@mediatek.com> |
feat(mt8188): add LPM driver support
Add LPM drivers and create rules.mk for makefile.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I0bfb99a4a763e7ca93260f62d1ced184259acb39 |
| abb995ab | 14-Sep-2022 |
Bo-Chen Chen <rex-bc.chen@mediatek.com> |
feat(mt8188): apply ERRATA for CA-78
Apply ERRATA_A78_2376745 and ERRATA_A78_2395406 for CA-78.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I4575e83025af971a669dc1f8561cf19e1f
feat(mt8188): apply ERRATA for CA-78
Apply ERRATA_A78_2376745 and ERRATA_A78_2395406 for CA-78.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I4575e83025af971a669dc1f8561cf19e1fdac469
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| 8cd3b693 | 08-Sep-2022 |
Bo-Chen Chen <rex-bc.chen@mediatek.com> |
fix(mediatek): remove unused cold_boot.[c|h]
We are not using cold_boot.[c|h] for mt8188, so remove them first.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I721aca37d5fb422f27
fix(mediatek): remove unused cold_boot.[c|h]
We are not using cold_boot.[c|h] for mt8188, so remove them first.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: I721aca37d5fb422f274bb1ab46150e1eddf7c480
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| 24476b2e | 08-Sep-2022 |
Bo-Chen Chen <rex-bc.chen@mediatek.com> |
fix(mediatek): wrap cold_boot.h with MTK_SIP_KERNEL_BOOT_ENABLE
We should wrap cold_boot.h with MTK_SIP_KERNEL_BOOT_ENABLE to avoid build error.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.co
fix(mediatek): wrap cold_boot.h with MTK_SIP_KERNEL_BOOT_ENABLE
We should wrap cold_boot.h with MTK_SIP_KERNEL_BOOT_ENABLE to avoid build error.
Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com> Change-Id: Idfd760fbb7c782d4fc9de674d86a7123e0129c0d
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| 3d4b6f93 | 12-Sep-2022 |
Allen-KH Cheng <allen-kh.cheng@mediatek.corp-partner.google.com> |
feat(mt8186): add EMI MPU support for SCP and DSP
1. Enable domain D0 and D3 (SCP) access 0x50000000~0x5109FFFF. 2. Enable domain D4 (DSP & AFE) access 0x60000000~0x610FFFFF.
BUG=b:204229221 TEST=b
feat(mt8186): add EMI MPU support for SCP and DSP
1. Enable domain D0 and D3 (SCP) access 0x50000000~0x5109FFFF. 2. Enable domain D4 (DSP & AFE) access 0x60000000~0x610FFFFF.
BUG=b:204229221 TEST=build pass
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@mediatek.corp-partner.google.com> Change-Id: I6a7d2eafaaa7a558829a0d741dfb3307885e3b98
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| 885e2683 | 12-Sep-2022 |
Claus Pedersen <claustbp@google.com> |
refactor(libc): clean up dependencies in libc
- Removing platform dependencies from libc modules. - Replacing panicking with actual error handling. - Debug macros are included indirectly from assert
refactor(libc): clean up dependencies in libc
- Removing platform dependencies from libc modules. - Replacing panicking with actual error handling. - Debug macros are included indirectly from assert.h. Removing "platform_def.h" from assert.h and adding "common/debug.h" where the macros are used. - Removing hack for fixing PLAT_LOG_LEVEL_ASSERT to 40. Instead removing assert with expression, as this does not provide additional information.
Signed-off-by: Claus Pedersen <claustbp@google.com> Change-Id: Icc201ea7b63c1277e423c1cfd13fd6816c2bc568
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| 2c20c242 | 22-Sep-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(synquacer): increase size of BL33" into integration |
| 6a079efd | 08-Sep-2022 |
Sai Pavan Boddu <sai.pavan.boddu@amd.com> |
feat(versal_net): add support for QEMU COSIM platform
QEMU COSIM platform is equivalent to qemu with additional cosim extensions, so just switching platform_id to QEMU if QEMU_COSIM is detected.
Si
feat(versal_net): add support for QEMU COSIM platform
QEMU COSIM platform is equivalent to qemu with additional cosim extensions, so just switching platform_id to QEMU if QEMU_COSIM is detected.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Change-Id: I922d10b1605c7f900158fa7fbe82571d3b9d4792
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| a12a66d0 | 14-Sep-2022 |
Jassi Brar <jaswinder.singh@linaro.org> |
fix(synquacer): increase size of BL33
Increase the max possible size of BL33 from 1MB to 2MB. For example, edk2 is usually bigger than 1MB
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Cha
fix(synquacer): increase size of BL33
Increase the max possible size of BL33 from 1MB to 2MB. For example, edk2 is usually bigger than 1MB
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org> Change-Id: Idd4762e25e623de145c65f31cf2dfe1fee466a74
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| f47d38ba | 21-Sep-2022 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xilinx-versal-net" into integration
* changes: feat(versal-net): add support for platform management feat(versal-net): add support for IPI feat(versal-net): add SMP s
Merge changes from topic "xilinx-versal-net" into integration
* changes: feat(versal-net): add support for platform management feat(versal-net): add support for IPI feat(versal-net): add SMP support for Versal NET feat(versal-net): add support for Xilinx Versal NET platform feat(versal-net): add documentation for Versal NET SoC
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| 0654ab7f | 05-Sep-2022 |
Jay Buddhabhatti <jay.buddhabhatti@xilinx.com> |
feat(versal-net): add support for platform management
Add support for PM EEMI interface for Versal_net. Also use PM APIs in psci ops. Added TFA_NO_PM flag to disable PM functionality.
Signed-off-by
feat(versal-net): add support for platform management
Add support for PM EEMI interface for Versal_net. Also use PM APIs in psci ops. Added TFA_NO_PM flag to disable PM functionality.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Change-Id: If2b2941c868bc9b0850d7f3adb81eac0e660c149
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| 0bf622de | 19-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
feat(versal-net): add support for IPI
Add support to send IPI to firmware.
Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com> Change-Id: I8cd5
feat(versal-net): add support for IPI
Add support to send IPI to firmware.
Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com> Change-Id: I8cd54c05b6a726e0d398dfc1cdcc7f4cf09ba725
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| 901d74b2 | 19-Sep-2022 |
Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> |
fix(imx8m): move caam init after serial init
CAAM provides serial output during initialization, but the serial init occurs after CAAM. This leads to serial output produced by CAAM init function to b
fix(imx8m): move caam init after serial init
CAAM provides serial output during initialization, but the serial init occurs after CAAM. This leads to serial output produced by CAAM init function to be omitted and not displayed.
Change the order of initialization and call CAAM init after Serial. This has no impact as Serial does not require CAAM to be initialized upfront.
Fixes: 2502709f60de ("plat: imx8m: Add caam module init on imx8m") Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Jacky Bai <ping.bai@nxp.com> Change-Id: I09c0a5474a1babfb0b53c4455891689ec08b5bdb
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| 8529c769 | 19-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
feat(versal-net): add SMP support for Versal NET
Add SMP support for Versal NET via register access.
Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Akshay Belsare <Akshay.Belsare
feat(versal-net): add SMP support for Versal NET
Add SMP support for Versal NET via register access.
Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com> Change-Id: I46d73e2cd678ae720b5255722b6b0611c22659e8
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| 1d333e69 | 31-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
feat(versal-net): add support for Xilinx Versal NET platform
New SoC is a78 based with gicv3 and uart over pl011. Communication interfaces are similar to Versal platform. System starts with Xilinx P
feat(versal-net): add support for Xilinx Versal NET platform
New SoC is a78 based with gicv3 and uart over pl011. Communication interfaces are similar to Versal platform. System starts with Xilinx PLM firmware which loads TF-A(bl31) to DDR, which is already configured, and jumps to it. PLM also prepare handoff structure for TF-A with information what components were load and flags which indicate which EL level SW should be started.
Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com> Change-Id: I2a16c242a77be6c91be3d198727dc3b9bbb97410
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| 6e24d795 | 19-Sep-2022 |
Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> |
fix(imx8m): correct serial output for HAB JR0
Serial output is missing the EOL marker, which makes the output garbled.
Add EOL to the output, which adds a newline and makes log output consistent.
fix(imx8m): correct serial output for HAB JR0
Serial output is missing the EOL marker, which makes the output garbled.
Add EOL to the output, which adds a newline and makes log output consistent.
Fixes: 77850c96f23b ("feat(plat/imx8m): do not release JR0 to NS if HAB is using it") Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Franck LENORMAND <franck.lenormand@nxp.com> Cc: Jacky Bai <ping.bai@nxp.com> Change-Id: I58b67f441016122bc9361d7224d310522917eff0
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