1# Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved. 2# Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved. 3# Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. 4# 5# SPDX-License-Identifier: BSD-3-Clause 6 7PLAT_PATH := plat/xilinx/versal_net 8 9override PROGRAMMABLE_RESET_ADDRESS := 1 10PSCI_EXTENDED_STATE_ID := 1 11SEPARATE_CODE_AND_RODATA := 1 12override RESET_TO_BL31 := 1 13PL011_GENERIC_UART := 1 14GIC_ENABLE_V4_EXTN := 0 15GICV3_SUPPORT_GIC600 := 1 16 17override CTX_INCLUDE_AARCH32_REGS := 0 18 19ifdef VERSAL_NET_ATF_MEM_BASE 20 $(eval $(call add_define,VERSAL_NET_ATF_MEM_BASE)) 21 22 ifndef VERSAL_NET_ATF_MEM_SIZE 23 $(error "VERSAL_NET_ATF_BASE defined without VERSAL_NET_ATF_SIZE") 24 endif 25 $(eval $(call add_define,VERSAL_NET_ATF_MEM_SIZE)) 26 27 ifdef VERSAL_NET_ATF_MEM_PROGBITS_SIZE 28 $(eval $(call add_define,VERSAL_NET_ATF_MEM_PROGBITS_SIZE)) 29 endif 30endif 31 32ifdef VERSAL_NET_BL32_MEM_BASE 33 $(eval $(call add_define,VERSAL_NET_BL32_MEM_BASE)) 34 35 ifndef VERSAL_NET_BL32_MEM_SIZE 36 $(error "VERSAL_NET_BL32_BASE defined without VERSAL_NET_BL32_SIZE") 37 endif 38 $(eval $(call add_define,VERSAL_NET_BL32_MEM_SIZE)) 39endif 40 41USE_COHERENT_MEM := 0 42HW_ASSISTED_COHERENCY := 1 43 44VERSAL_NET_CONSOLE ?= pl011 45$(eval $(call add_define_val,VERSAL_NET_CONSOLE,VERSAL_NET_CONSOLE_ID_${VERSAL_NET_CONSOLE})) 46 47PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 48 -Iplat/xilinx/common/include/ \ 49 -Iplat/xilinx/common/ipi_mailbox_service/ \ 50 -I${PLAT_PATH}/include/ \ 51 -Iplat/xilinx/versal/pm_service/ 52 53# Include GICv3 driver files 54include drivers/arm/gic/v3/gicv3.mk 55include lib/xlat_tables_v2/xlat_tables.mk 56include lib/libfdt/libfdt.mk 57 58PLAT_BL_COMMON_SOURCES := \ 59 drivers/delay_timer/delay_timer.c \ 60 drivers/delay_timer/generic_delay_timer.c \ 61 ${GICV3_SOURCES} \ 62 drivers/arm/pl011/aarch64/pl011_console.S \ 63 plat/arm/common/arm_common.c \ 64 plat/common/plat_gicv3.c \ 65 ${PLAT_PATH}/aarch64/versal_net_helpers.S \ 66 ${PLAT_PATH}/aarch64/versal_net_common.c 67 68BL31_SOURCES += drivers/arm/cci/cci.c \ 69 lib/cpus/aarch64/cortex_a78_ae.S \ 70 lib/cpus/aarch64/cortex_a78.S \ 71 plat/common/plat_psci_common.c \ 72 ${PLAT_PATH}/plat_psci.c \ 73 plat/xilinx/common/plat_startup.c \ 74 plat/xilinx/common/ipi.c \ 75 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ 76 ${PLAT_PATH}/bl31_versal_net_setup.c \ 77 ${PLAT_PATH}/plat_topology.c \ 78 common/fdt_fixup.c \ 79 ${LIBFDT_SRCS} \ 80 ${PLAT_PATH}/sip_svc_setup.c \ 81 ${PLAT_PATH}/versal_net_gicv3.c \ 82 ${XLAT_TABLES_LIB_SRCS} 83