| ce9b87e7 | 13-May-2025 |
Pankaj Gupta <pankaj.gupta@nxp.com> |
fix(nxp): tbbr: adds snvs_init
Fix to initialize the SNVS driver as part of soc early init, that sets the snvs base address to read or write to the memory mapped registers of SNVS IP.
Change-Id: I6
fix(nxp): tbbr: adds snvs_init
Fix to initialize the SNVS driver as part of soc early init, that sets the snvs base address to read or write to the memory mapped registers of SNVS IP.
Change-Id: I6ebd1d17302647487ec786f5e20f51450ce29473 Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
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| 774fb379 | 15-Sep-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
fix(build): prevent races on the build directory
The tools (eg fiptool) don't depend on the build directory so it's possible that make tries to build them before it exists. Doing that leads to rando
fix(build): prevent races on the build directory
The tools (eg fiptool) don't depend on the build directory so it's possible that make tries to build them before it exists. Doing that leads to random and unpredictable errors. Almost always, they are built after a BL image which always has a build directory dependency, but when building MANY tf-a builds over MANY threads concurrently this could be observed (I suspect the high load of the system increases latency just enough that this race is lost).
The fix is simple - have an explicit dependency on the build directory.
This is the same problem as 9855568cc and 25cde5f81.
Change-Id: I769ac07f8882f82ea9d72f3b976337284d697310 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| 5be66449 | 08-Oct-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
refactor(build): make it standard to request a custom linker script
Hoist the add_define to a global location so that platforms only have to declare its usage. Fix up #ifdef to #if since we will now
refactor(build): make it standard to request a custom linker script
Hoist the add_define to a global location so that platforms only have to declare its usage. Fix up #ifdef to #if since we will now always pass a definition.
Change-Id: Ia52ad5ed4dcbd157d139c8ca2fb3d35b32343b93 Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| 047b1b9a | 14-Oct-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_remove_abort_suspend" into integration
* changes: fix(versal-net): remove client-side code of PM_ABORT_SUSPEND fix(versal): remove client-side implementation of PM
Merge changes from topic "xlnx_remove_abort_suspend" into integration
* changes: fix(versal-net): remove client-side code of PM_ABORT_SUSPEND fix(versal): remove client-side implementation of PM_ABORT_SUSPEND fix(xilinx): remove PM_ABORT_SUSPEND API implementation fix(zynqmp): remove PM_ABORT_SUSPEND API implementation fix(versal2): remove PM_ABORT_SUSPEND API implementation
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| 3fffa1eb | 13-Oct-2025 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(imx9): add full system power control option" into integration |
| 0df6ba31 | 10-Oct-2025 |
Emanuele Ghidoli <emanuele.ghidoli@toradex.com> |
feat(imx9): add full system power control option
Add an optional build-time configuration to enable full system shutdown and reset control through SCMI.
By default, only logical machine (cluster-le
feat(imx9): add full system power control option
Add an optional build-time configuration to enable full system shutdown and reset control through SCMI.
By default, only logical machine (cluster-level) power-off and reset are performed. When the SYS_PWR_FULL_CTRL option is set, the PSCI implementation uses the full system power control commands instead, allowing a complete system shutdown and reset.
Tested on iMX95 based modules.
Change-Id: I56b31f9b91def31784857f5a299c69f68db706a4 Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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| eeef4ac0 | 10-Oct-2025 |
Madhav Bhatt <madhav.bhatt@amd.com> |
fix(versal-net): remove client-side code of PM_ABORT_SUSPEND
PM_ABORT_SUSPEND API is removed; client-side implementation is no longer needed.
Change-Id: If2559ca106dbb60d761d0f8c7deeb86c1f30af16 Si
fix(versal-net): remove client-side code of PM_ABORT_SUSPEND
PM_ABORT_SUSPEND API is removed; client-side implementation is no longer needed.
Change-Id: If2559ca106dbb60d761d0f8c7deeb86c1f30af16 Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>
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| 86d9b35f | 02-Oct-2025 |
Madhav Bhatt <madhav.bhatt@amd.com> |
fix(versal): remove client-side implementation of PM_ABORT_SUSPEND
PM_ABORT_SUSPEND API is removed; client-side implementation is no longer needed.
Change-Id: I34ac563b88b98e484cf33993545c0151db936
fix(versal): remove client-side implementation of PM_ABORT_SUSPEND
PM_ABORT_SUSPEND API is removed; client-side implementation is no longer needed.
Change-Id: I34ac563b88b98e484cf33993545c0151db9362e0 Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>
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| ecee0719 | 10-Oct-2025 |
Madhav Bhatt <madhav.bhatt@amd.com> |
fix(xilinx): remove PM_ABORT_SUSPEND API implementation
The API is not getting called by Linux. Removing it to reduce dead code and improve maintainability.
Note: This change removes code that is c
fix(xilinx): remove PM_ABORT_SUSPEND API implementation
The API is not getting called by Linux. Removing it to reduce dead code and improve maintainability.
Note: This change removes code that is common between versal and versal_net.
Change-Id: Ia7bfbcf2bbf80309beda7f8fa1ecf87de2591e2e Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>
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| c069c8ef | 02-Oct-2025 |
Madhav Bhatt <madhav.bhatt@amd.com> |
fix(zynqmp): remove PM_ABORT_SUSPEND API implementation
The API is not getting called by Linux. Removing it to reduce dead code and improve maintainability.
Change-Id: Iac7a651273401b6737c92ad26cb5
fix(zynqmp): remove PM_ABORT_SUSPEND API implementation
The API is not getting called by Linux. Removing it to reduce dead code and improve maintainability.
Change-Id: Iac7a651273401b6737c92ad26cb5f990b512889b Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>
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| 7739450f | 10-Oct-2025 |
Madhav Bhatt <madhav.bhatt@amd.com> |
fix(versal2): remove PM_ABORT_SUSPEND API implementation
The API is not getting called by Linux. Removing it to reduce dead code and improve maintainability.
Change-Id: I88025fa0213e40c510a2f1edb65
fix(versal2): remove PM_ABORT_SUSPEND API implementation
The API is not getting called by Linux. Removing it to reduce dead code and improve maintainability.
Change-Id: I88025fa0213e40c510a2f1edb6566fc849a8dbb6 Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>
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| 80684b7e | 13-Oct-2025 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "fix(cm): deprecate use of NS_TIMER_SWITCH" into integration |
| f74d03a1 | 10-Oct-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "lfa-plat-activate" into integration
* changes: feat(fvp): add stub implementation for plat_lfa_notify_activate() feat(lfa): add platform hook for activation notification |
| 92c0f3ba | 10-Oct-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "rmm-lfa" into integration
* changes: feat(arm): handle RMM ep_info during LFA feat(lfa): add helper to check LFA prime completion status feat(lfa): enable LFA of RMM
Merge changes from topic "rmm-lfa" into integration
* changes: feat(arm): handle RMM ep_info during LFA feat(lfa): add helper to check LFA prime completion status feat(lfa): enable LFA of RMM chore(lfa): use standard int return type for prime/activate callbacks feat(rmmd): add warm reset helpers for primary and secondary CPUs
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| 08ae97c1 | 30-Sep-2025 |
Naman Trivedi <naman.trivedimanojbhai@amd.com> |
fix(versal2): enable graceful system shutdown
Power down the APU cores before sending SYSTEM_SHUTDOWN call to PLM firmware. This ensures graceful system shutdown.
Change-Id: I89a132e72c9a2530620ffb
fix(versal2): enable graceful system shutdown
Power down the APU cores before sending SYSTEM_SHUTDOWN call to PLM firmware. This ensures graceful system shutdown.
Change-Id: I89a132e72c9a2530620ffb58aaec752796d01d3e Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>
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| 34b9b3a9 | 10-Oct-2025 |
Yann Gautier <yann.gautier@st.com> |
Merge changes from topic "xlnx_enhance_tfa_feature_check" into integration
* changes: chore(xilinx): add deprecation warning to pm_feature_check refactor(xilinx): rename eemi_feature_check to tf
Merge changes from topic "xlnx_enhance_tfa_feature_check" into integration
* changes: chore(xilinx): add deprecation warning to pm_feature_check refactor(xilinx): rename eemi_feature_check to tfa_api_feature_check
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| b43b7d54 | 10-Oct-2025 |
Yann Gautier <yann.gautier@st.com> |
Merge changes from topic "xlnx_subsystem_restart_fix_versal2" into integration
* changes: fix(versal2): handle debugfs specific APIs before EEMI handler fix(versal2): use PM_STATE_CPU_OFF for co
Merge changes from topic "xlnx_subsystem_restart_fix_versal2" into integration
* changes: fix(versal2): handle debugfs specific APIs before EEMI handler fix(versal2): use PM_STATE_CPU_OFF for core power down in SELF_SUSPEND
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| 656500f9 | 25-Sep-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
feat(cpus): add support for caddo cpu
Add basic CPU library code to support Caddo CPU
Change-Id: I4b431771ebe6f23eb02f3301ff656cfcd4956f81 Signed-off-by: Govindraj Raja <govindraj.raja@arm.com> |
| 51247ccb | 25-Sep-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
feat(cpus): add support for veymont cpu
Add basic CPU library code to support Veymont CPU
Change-Id: I44db5650e7c9cf8fcc368c935574f4702c373dae Signed-off-by: Govindraj Raja <govindraj.raja@arm.com> |
| c6b2bb99 | 09-Oct-2025 |
Mark Dykes <mark.dykes@arm.com> |
Merge "fix(intel): update nand driver to enable Linux OS boot" into integration |
| 633cf6b7 | 01-Oct-2025 |
Naman Trivedi <naman.trivedimanojbhai@amd.com> |
fix(versal2): handle debugfs specific APIs before EEMI handler
In Versal Gen 2 SoC, all PM APIs use the extended SMC format including the debugfs-specific APIs. So, call eemi_psci_debugfs_handler be
fix(versal2): handle debugfs specific APIs before EEMI handler
In Versal Gen 2 SoC, all PM APIs use the extended SMC format including the debugfs-specific APIs. So, call eemi_psci_debugfs_handler before eemi_api_handler. This ensures that debugfs-specific PM APIs are handled correctly by TF-A and are not forwarded to the PLM firmware.
Change-Id: Ibab08c851c853a8f4272783b210040ddf7291d76 Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>
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| 9cfc7235 | 01-Oct-2025 |
Naman Trivedi <naman.trivedimanojbhai@amd.com> |
fix(versal2): use PM_STATE_CPU_OFF for core power down in SELF_SUSPEND
Currently TF-A provides PM_STATE_CPU_IDLE state during SELF_SUSPEND to power down the core. PM_STATE_CPU_IDLE is intended for C
fix(versal2): use PM_STATE_CPU_OFF for core power down in SELF_SUSPEND
Currently TF-A provides PM_STATE_CPU_IDLE state during SELF_SUSPEND to power down the core. PM_STATE_CPU_IDLE is intended for CPU-idle suspend paths (when Linux CPU idle is enabled) and is not the correct state for a full core power-off.
Fix this by providing PM_STATE_CPU_OFF state to power down the core.
Change-Id: I25585b32fe90372b0404a1ad89544f1aaa2f34a2 Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>
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| 249fb06c | 09-Oct-2025 |
Chris Kay <chris.kay@arm.com> |
Merge "refactor(build): avoid implicit pattern rules" into integration |
| 3c6170b6 | 27-Sep-2025 |
Marek Vasut <marek.vasut+renesas@mailbox.org> |
feat(rcar): split common SCIF code
Move common SCIF code into drivers/renesas/common/scif/scif-common.c and retain only SoC-specific console_rcar_init() in drivers/renesas/rcar_gen4/scif/scif.c. Thi
feat(rcar): split common SCIF code
Move common SCIF code into drivers/renesas/common/scif/scif-common.c and retain only SoC-specific console_rcar_init() in drivers/renesas/rcar_gen4/scif/scif.c. This allows other SoCs to reuse the common code and add only SoC specific glue code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Change-Id: Ie970984ea551e482479af91524974b281923f813
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| 9979a20a | 27-Sep-2025 |
Marek Vasut <marek.vasut+renesas@mailbox.org> |
feat(rcar): deduplicate SCIF console_rcar_register
The console_rcar_register assembler macro is functionally identical between Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code.
Signed-off-by
feat(rcar): deduplicate SCIF console_rcar_register
The console_rcar_register assembler macro is functionally identical between Renesas R-Car Gen3 and R-Car Gen4, deduplicate the code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Change-Id: Ib498832dbed9063efdb9979e89e53d119303d9df
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