refactor(versal-net): move macros to common header

Move the macros to common header from platform specific folder, so that
the same macros can be re-used in other platforms.

Change-Id: I355b024f5e8

refactor(versal-net): move macros to common header

Move the macros to common header from platform specific folder, so that
the same macros can be re-used in other platforms.

Change-Id: I355b024f5e870c6fc104598bc571dbaa29503ae2
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

show more ...

fix(versal-net): fix BLXX memory limits for user defined values

When compiling with user defined areas of memory the platform code
calculates the size with (base + size - 1). However, the linker
fi

fix(versal-net): fix BLXX memory limits for user defined values

When compiling with user defined areas of memory the platform code
calculates the size with (base + size - 1). However, the linker
file aligns section on a page boundary. So having the -1 in
the size calculations leads to an error message looking like this:

bl31.elf section `coherent_ram' will not fit in region `RAM'
aarch64-buildroot-linux-uclibc-ld: region `RAM' overflowed by 1 byte

While at it fix all other occurences of predefined values that were
calculated with -1.

Fixes: 1d333e69091f ("feat(versal-net): add support for Xilinx
Versal NET platform")
Change-Id: I4455f63ee3ad52369f517a7d8d3627faf0b28c0f
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

feat(xilinx): fix IPI calculation for Versal/NET

Fix buffer calculation logic for Versal and Versal NET to use
LOCAL/REMOTE_ID.

Change-Id: Icf6985a19183cc8e51f3a536130695e00c32c736
Signed-off-by: M

feat(xilinx): fix IPI calculation for Versal/NET

Fix buffer calculation logic for Versal and Versal NET to use
LOCAL/REMOTE_ID.

Change-Id: Icf6985a19183cc8e51f3a536130695e00c32c736
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

feat(xilinx): setup local/remote id in header

Use new macros IPI_LOCAL_ID/IPI_REMOTE_ID to specify source and
destination channels.

Change-Id: I558eebb4d4a83ae0ca9316824f9dba7426adbe3f
Signed-off-b

feat(xilinx): setup local/remote id in header

Use new macros IPI_LOCAL_ID/IPI_REMOTE_ID to specify source and
destination channels.

Change-Id: I558eebb4d4a83ae0ca9316824f9dba7426adbe3f
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

feat(xilinx): clean macro names

This is preparation for cleaning up IPI local and remote side
communication. As of today macros are aligned to communication
channel but there is missing calculation

feat(xilinx): clean macro names

This is preparation for cleaning up IPI local and remote side
communication. As of today macros are aligned to communication
channel but there is missing calculation based on channel
selection.

Change-Id: Iac7daf832ff372ea2fece72a15afdfe988b4b7db
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

feat(xilinx): move IPI related macros to plat_ipi.h

The reason is to have all IPI related macros in the same file.

Change-Id: I88ddaa3a5dd1f10114371fc5405f8daf148ca3b8
Signed-off-by: Michal Simek <

feat(xilinx): move IPI related macros to plat_ipi.h

The reason is to have all IPI related macros in the same file.

Change-Id: I88ddaa3a5dd1f10114371fc5405f8daf148ca3b8
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

feat(xilinx): sync copyright format

Use the same format in all files 's/Copyright (C)/Copyright (c)/g'.

Change-Id: I0e200eb135e7369d0e6b3b694acd406ec10ca9e7
Signed-off-by: Michal Simek <michal.sime

feat(xilinx): sync copyright format

Use the same format in all files 's/Copyright (C)/Copyright (c)/g'.

Change-Id: I0e200eb135e7369d0e6b3b694acd406ec10ca9e7
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

style(xilinx): replace ARM by Arm in copyrights

The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure

style(xilinx): replace ARM by Arm in copyrights

The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure that pre-commit.copyright won't be touching platform specific
files.

Change-Id: I49c66e18d46ed871a6aa128c9b2a403d0cf83416
Signed-off-by: Michal Simek <michal.simek@amd.com>

show more ...

refactor(xilinx): move enum to common place

Moved IOCTL enum from ZynqMP to common place so that it can be used
for all the platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Cha

refactor(xilinx): move enum to common place

Moved IOCTL enum from ZynqMP to common place so that it can be used
for all the platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I6ad992da30f2def9f46c8ba79753d79ed00fe024

show more ...

refactor(versal): move set wake src fn to common place

Moved pm_client_set_wakeup_sources() to make common for both Versal and
Versal NET platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatt

refactor(versal): move set wake src fn to common place

Moved pm_client_set_wakeup_sources() to make common for both Versal and
Versal NET platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ib82c5f85a0a27bc47940f6796f1cf68b2c38a908

show more ...

refactor(xilinx): rename gic macros to make common

Rename macros PLAT_VERSAL_GICD_BASE, PLAT_VERSAL_GICR_BASE,
PLAT_VERSAL_NET_GICD_BASE and PLAT_VERSAL_NET_GICR_BASE to
PLAT_GICD_BASE_VALUE and PLA

refactor(xilinx): rename gic macros to make common

Rename macros PLAT_VERSAL_GICD_BASE, PLAT_VERSAL_GICR_BASE,
PLAT_VERSAL_NET_GICD_BASE and PLAT_VERSAL_NET_GICR_BASE to
PLAT_GICD_BASE_VALUE and PLAT_GICR_BASE_VALUE to make common
for both Versal and Versal NET platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ibcebfb8e741e828ef272b32cbedfb4dcbf8629b6

show more ...

refactor(xilinx): move pm_defs.h to common place

Moved pm_defs.h file to common place so that it can be used for
Versal NET and ZynqMP. Also moved common code from zynqmp_pm_defs.h to
common place.

refactor(xilinx): move pm_defs.h to common place

Moved pm_defs.h file to common place so that it can be used for
Versal NET and ZynqMP. Also moved common code from zynqmp_pm_defs.h to
common place.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I2ee1e72258c6052cdd6467cdbcf4009afb98da49

show more ...

fix(versal_net): fix irq for IPI0

Currently isr is not called when IPI0 interrupt occurs.
fix irq number and enable GIC interrupt properly to invoke
registered isr on IPI0 interrupt.

Signed-off-by:

fix(versal_net): fix irq for IPI0

Currently isr is not called when IPI0 interrupt occurs.
fix irq number and enable GIC interrupt properly to invoke
registered isr on IPI0 interrupt.

Signed-off-by: Trung Tran <trung.tran@amd.com>
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Change-Id: Id0408b3a560b25234886a9fa01c4ed248d1d1532

show more ...

fix(xilinx): remove unused mailbox macros

All these macro are unused that's why remove them.

Change-Id: I843cc7c1a592c47376a01c52f45b6d59da80772b
Signed-off-by: Michal Simek <michal.simek@amd.com>

feat(versal-net): add jtag dcc support

Add support for JTAG Debug Communication Channel(DCC), using the dcc
console driver, for Versal NET platform.
UART0/UART1 is not configured when the JTAG DCC i

feat(versal-net): add jtag dcc support

Add support for JTAG Debug Communication Channel(DCC), using the dcc
console driver, for Versal NET platform.
UART0/UART1 is not configured when the JTAG DCC is used as console for
the platform.
Though DCC is not using any UART, VERSAL_NET_UART_BASE needs
to be defined in the platform code. If its not defined, build errors
are observed.
Now VERSAL_NET_UART_BASE by default points to UART0 base.
Check for valid console(pl011, pl011_0, pl011_1, dcc) is
being done in the platform makefile, the error condition in
setting the value of VERSAL_NET_UART_BASE is redundant, thus the error
message is removed from the code.

Change-Id: I1085433055abea13526230cff4d4183ff7a01477
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

show more ...

feat(versal-net): add support for uart1 console

Versal NET platform supports two UART(UART0, UART1)
Add support for UART1 to be used as console for Versal NET platform.

Change-Id: I3bc2034f54052e37

feat(versal-net): add support for uart1 console

Versal NET platform supports two UART(UART0, UART1)
Add support for UART1 to be used as console for Versal NET platform.

Change-Id: I3bc2034f54052e37cc480f98d48335fa5b2138bf
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

show more ...

fix(versal-net): disable wakeup interrupt during client wakeup

Clear and disable wakeup interrupt during client wakeup to avoid
multiple wakeup events.

Signed-off-by: Jay Buddhabhatti <jay.buddhabh

fix(versal-net): disable wakeup interrupt during client wakeup

Clear and disable wakeup interrupt during client wakeup to avoid
multiple wakeup events.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Iebc644ae582da03001830b96e3190fce10dbac42

show more ...

fix(versal-net): clear power down interrupt status before enable

Currently power down interrupt status is set by default before its
getting enabled. Because of that Linux is getting crashed since it

fix(versal-net): clear power down interrupt status before enable

Currently power down interrupt status is set by default before its
getting enabled. Because of that Linux is getting crashed since its
triggering interrupt before core goes to WFI state. So clear interrupt
status before enabling power down interrupt.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ia8d047b6078a49ab3dbe3e0bf24422357f0138c2

show more ...

fix(versal-net): resolve misra rule 20.7 warnings

Fix below MISRA violation from versal_net_def.h:
- MISRA Violation: MISRA-C:2012 R.10.6:
- Macro parameter expands into an expression without be

fix(versal-net): resolve misra rule 20.7 warnings

Fix below MISRA violation from versal_net_def.h:
- MISRA Violation: MISRA-C:2012 R.10.6:
- Macro parameter expands into an expression without being wrapped
by parentheses.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: Ie365d24c02bb38163005a3c073642d5c96412e2d

show more ...

fix(versal-net): resolve misra 10.6 warnings

Fix below MISRA violation from versal_net_def.h:
- MISRA Violation: MISRA-C:2012 R.10.6
- The value of a composite expression shall not be assigned to

fix(versal-net): resolve misra 10.6 warnings

Fix below MISRA violation from versal_net_def.h:
- MISRA Violation: MISRA-C:2012 R.10.6
- The value of a composite expression shall not be assigned to an
object with wider essential type

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I74f8e5d63523f33d245a21f8e4f04d30e40b05e7

show more ...

feat(versal_net): add support for QEMU COSIM platform

QEMU COSIM platform is equivalent to qemu with additional cosim
extensions, so just switching platform_id to QEMU if QEMU_COSIM is
detected.

Si

feat(versal_net): add support for QEMU COSIM platform

QEMU COSIM platform is equivalent to qemu with additional cosim
extensions, so just switching platform_id to QEMU if QEMU_COSIM is
detected.

Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: I922d10b1605c7f900158fa7fbe82571d3b9d4792

show more ...

feat(versal-net): add support for platform management

Add support for PM EEMI interface for Versal_net. Also use PM
APIs in psci ops. Added TFA_NO_PM flag to disable PM functionality.

Signed-off-by

feat(versal-net): add support for platform management

Add support for PM EEMI interface for Versal_net. Also use PM
APIs in psci ops. Added TFA_NO_PM flag to disable PM functionality.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Change-Id: If2b2941c868bc9b0850d7f3adb81eac0e660c149

show more ...

feat(versal-net): add support for IPI

Add support to send IPI to firmware.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
Change-Id: I8cd5

feat(versal-net): add support for IPI

Add support to send IPI to firmware.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
Change-Id: I8cd54c05b6a726e0d398dfc1cdcc7f4cf09ba725

show more ...

feat(versal-net): add SMP support for Versal NET

Add SMP support for Versal NET via register access.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare

feat(versal-net): add SMP support for Versal NET

Add SMP support for Versal NET via register access.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
Change-Id: I46d73e2cd678ae720b5255722b6b0611c22659e8

show more ...

feat(versal-net): add support for Xilinx Versal NET platform

New SoC is a78 based with gicv3 and uart over pl011. Communication
interfaces are similar to Versal platform. System starts with Xilinx P

feat(versal-net): add support for Xilinx Versal NET platform

New SoC is a78 based with gicv3 and uart over pl011. Communication
interfaces are similar to Versal platform. System starts with Xilinx PLM
firmware which loads TF-A(bl31) to DDR, which is already configured, and
jumps to it. PLM also prepare handoff structure for TF-A with information
what components were load and flags which indicate which EL level SW should
be started.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Akshay Belsare <Akshay.Belsare@amd.com>
Change-Id: I2a16c242a77be6c91be3d198727dc3b9bbb97410

show more ...