| d61ba95e | 20-Mar-2024 |
Prasad Kummari <prasad.kummari@amd.com> |
feat(versal-net): add DTB console to platform.mk
In the platform.mk file, new console types named dtb are to be created a macro, VERSAL_NET_CONSOLE_ID_dtb, will be introduced to check DT console.Use
feat(versal-net): add DTB console to platform.mk
In the platform.mk file, new console types named dtb are to be created a macro, VERSAL_NET_CONSOLE_ID_dtb, will be introduced to check DT console.Users will have the option to select VERSAL_NET_CONSOLE to dtb, which will run from the DDR address and OCM. The address XILINX_OF_BOARD_DTB_ADDR needs to be provided. This configuration will register the DT console in TF-A
Change-Id: I530492c3f48705387e50895aef4bf229a82d350d Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
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| 1f02024b | 20-Dec-2023 |
Prasad Kummari <prasad.kummari@amd.com> |
refactor(versal-net): rename VERSAL_NET_IOU_SCNTRS register to generic
Refactor, the macro named VERSAL_NET_IOU_SCNTRS is being renamed to a more generic macro name, which will be used in common cod
refactor(versal-net): rename VERSAL_NET_IOU_SCNTRS register to generic
Refactor, the macro named VERSAL_NET_IOU_SCNTRS is being renamed to a more generic macro name, which will be used in common code to enable reuse across various platforms.
Change-Id: I548437e0fe2d73b196468bc92029f8099ea1f8d1 Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
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| 639b3676 | 27-Oct-2023 |
Prasad Kummari <prasad.kummari@amd.com> |
feat(versal-net): add tsp support
Introduces support for the Test Secure Payload (TSP) for AMD-Xilinx Versal NET platform. TSP is a component for testing and validating secure OS and trusted execut
feat(versal-net): add tsp support
Introduces support for the Test Secure Payload (TSP) for AMD-Xilinx Versal NET platform. TSP is a component for testing and validating secure OS and trusted execution environments.
If a BL32 image is present, then there must be a matching Secure-EL1 Payload Dispatcher (SPD) service called TSPD, this service is responsible for Initializing the TSP. During initialization that service must register a function to carry out initialization of BL32 once the runtime services are fully initialized. BL31 invokes such a registered function to initialize BL32 before running BL33.
The GICv3 driver is initialized in EL3 and does not need to be initialized again in SEL1 GICv3 driver is initialized in EL3 This is because the S-EL1 can use GIC system registers to manage interrupts and does not need GIC interface base addresses to be configured.
The secure code load address is initially being pointed to 0x0 in the handoff parameters, which is different from the default or user-provided load address of 0x60000000. In this case, set up the PC to the requested BL32_BASE address to ensure that the secure code is loaded and executed from the correct location.
Change-Id: I58fe256dc9d6be5cee384c5ebb9baca2737c02a6 Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
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