| f87de907 | 07-Feb-2022 |
Nicolas Toromanoff <nicolas.toromanoff@foss.st.com> |
feat(stm32mp1): retry 3 times FWU trial boot
If we reboot 3 times in trial mode, BL2 will select previous boot image.
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Change-Id: I
feat(stm32mp1): retry 3 times FWU trial boot
If we reboot 3 times in trial mode, BL2 will select previous boot image.
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Change-Id: I82b423cc84f0471fdb6fa7c393fc5fe411d25c06
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| e633f9c5 | 28-Mar-2022 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): update backup reg for FWU
Change the backup register used to store FWU parameters from 21 to 10.
This is chosen to have a Read/Write secure and Read non-secure register.
The mapp
refactor(stm32mp1): update backup reg for FWU
Change the backup register used to store FWU parameters from 21 to 10.
This is chosen to have a Read/Write secure and Read non-secure register.
The mapping is also changed: only the first 4 bits will be used to store
the FWU index. The 4 next bits will be used to store count info. The
other bits are reserved.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@foss.st.com>
Change-Id: I9249768287ec5688ba2d8711ce04d429763543d7
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| c5bf1b09 | 01-Mar-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
Simplify the DT parsing by removing the parsing of the nvmem layout node
with "st,stm32-nvmem-layout" compatible.
The expected OTP NAME can
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
Simplify the DT parsing by removing the parsing of the nvmem layout node
with "st,stm32-nvmem-layout" compatible.
The expected OTP NAME can directly be found in a sub-node named
NAME@ADDRESS of the BSEC node, the NVMEM provider node.
This patch also removes this specific binding introduced for TF-A.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ic703385fad1bec5bef1cee583fbe9fbbf6aea216
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| b9a6dbc1 | 21-Mar-2022 |
Yann Gautier <yann.gautier@st.com> |
refactor(st): remove useless includes
The stm32mp_dt.c file does not need anything from DDR header files.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ibfe23204d68ee2e863cd2eda3d725
refactor(st): remove useless includes
The stm32mp_dt.c file does not need anything from DDR header files.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ibfe23204d68ee2e863cd2eda3d725baa830b729a
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| 99a5d8d0 | 01-Apr-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): select platform compilation either by flag or DT
To choose either STM32MP13 or STM32MP15, one of the two flags can be
set to 1 in the make command line. Or the platform selection can
feat(stm32mp1): select platform compilation either by flag or DT
To choose either STM32MP13 or STM32MP15, one of the two flags can be
set to 1 in the make command line. Or the platform selection can be
done with device tree name, if it begins with stm32mp13 or stm32mp15.
Change-Id: I72f42665c105b71a84b4952ef3fcd6c06ae4598c
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| e6fddbc9 | 12-Jan-2021 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(stm32mp1-fdts): add DDR support for STM32MP13
Add dedicated device tree files for STM32MP13.
Add new DDR compatible for STM32MP13x.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.co
feat(stm32mp1-fdts): add DDR support for STM32MP13
Add dedicated device tree files for STM32MP13.
Add new DDR compatible for STM32MP13x.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: Ib1bb9ad8cb2ab9f5f81549635d6604093aeb99d3
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| d38eaf99 | 25-Feb-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): updates for STM32MP13 device tree compilation
Add stm32mp13_bl2.dtsi files.
Update compilation variables for STM32MP13.
Change-Id: Ia3aa3abfe09c04c1a57541e565c212aa094e285c
Signed-o
feat(stm32mp1): updates for STM32MP13 device tree compilation
Add stm32mp13_bl2.dtsi files.
Update compilation variables for STM32MP13.
Change-Id: Ia3aa3abfe09c04c1a57541e565c212aa094e285c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 296ac801 | 03-Feb-2021 |
Nicolas Toromanoff <nicolas.toromanoff@st.com> |
feat(stm32mp1): add "Boot mode" management for STM32MP13
Add new APIs to enter and exit "boot mode".
In this mode a potential tamper won't block access or reset
the secure IPs needed while boot, wi
feat(stm32mp1): add "Boot mode" management for STM32MP13
Add new APIs to enter and exit "boot mode".
In this mode a potential tamper won't block access or reset
the secure IPs needed while boot, without this mode a dead
lock may occurs.
Change-Id: Iad60d4a0420ec125b842a285f73a20eb54cd1828
Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
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| fca10a8f | 12-Jan-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): manage HSLV on STM32MP13
On STM32MP13, the high speed mode for pads in low voltage is different
from STM32MP15. Each peripheral supporting the feature has its own
register.
Special c
feat(stm32mp1): manage HSLV on STM32MP13
On STM32MP13, the high speed mode for pads in low voltage is different
from STM32MP15. Each peripheral supporting the feature has its own
register.
Special care is taken for SDMMC peripherals. The HSLV mode is enabled
only if the max voltage for the pads is lower or equal to 1.8V.
Change-Id: Id94d2cca17dd4aca4d764230a643b2bb9a5f3342
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 3331d363 | 20-Jan-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): add sdmmc compatible in platform define
Add DT_SDMMC2_COMPAT define in stm32mp1_def.h file in platform.
It allows the use of the compatible in platform code.
Change-Id: I535ad67dd13
feat(stm32mp1): add sdmmc compatible in platform define
Add DT_SDMMC2_COMPAT define in stm32mp1_def.h file in platform.
It allows the use of the compatible in platform code.
Change-Id: I535ad67dd133bab59cf81881adaef42d8e88632c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 8e07ab5f | 17-Nov-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): update IO compensation on STM32MP13
On STM32MP13, two new SD1 and SD2 IO compensations cells are added,
for SDMMC1 and SDMMC2. They have to be managed the same way as the
main compen
feat(stm32mp1): update IO compensation on STM32MP13
On STM32MP13, two new SD1 and SD2 IO compensations cells are added,
for SDMMC1 and SDMMC2. They have to be managed the same way as the
main compensation cell.
Change-Id: Ib7aa648d65fc98e1613bfb46b0e7dd568fd21002
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| ffd1b889 | 18-Jan-2022 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): call pmic_voltages_init() in platform init
The nominal voltage for VDDCPU when Cortex-A7 runs at 650MHz is 1.25V
on STM32MP13. VDDCORE should be set at 1.25V as well.
This is necessa
feat(stm32mp1): call pmic_voltages_init() in platform init
The nominal voltage for VDDCPU when Cortex-A7 runs at 650MHz is 1.25V
on STM32MP13. VDDCORE should be set at 1.25V as well.
This is necessary, as the PMIC values in its NVMEM are 1.2V.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I3c24fe4cd68c7bf143cf9318ab38a15d6d41b5d2
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| 1c37d0c1 | 26-Nov-2020 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(stm32mp1): update CFG0 OTP for STM32MP13
This field is now declared on the 10 LSB bits on STM32MP13.
Several possible values are specified in the Reference Manual, and
indicate an open or close
feat(stm32mp1): update CFG0 OTP for STM32MP13
This field is now declared on the 10 LSB bits on STM32MP13.
Several possible values are specified in the Reference Manual, and
indicate an open or closed device. Other values lead to a system panic.
Change-Id: I697124a21db66a56e7e223d601aa7cf44bb183c4
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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| d59b9d53 | 14-Sep-2020 |
Patrick Delaunay <patrick.delaunay@st.com> |
feat(stm32mp1): usb descriptor update for STM32MP13
Update USB and DFU descriptor used for STM32MP13x
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I6e8111d279f49400a72baa12f
feat(stm32mp1): usb descriptor update for STM32MP13
Update USB and DFU descriptor used for STM32MP13x
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change-Id: I6e8111d279f49400a72baa12ff39f140d97e1c70
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| 9be88e75 | 11-Mar-2020 |
Gabriel Fernandez <gabriel.fernandez@st.com> |
feat(st-clock): add clock driver for STM32MP13
Add new clock driver for STM32MP13. Split the include file to manage
either STM32MP13 or STM32MP15.
Change-Id: Ia568cd12b1d5538809204f0fd2224d51e5d1e9
feat(st-clock): add clock driver for STM32MP13
Add new clock driver for STM32MP13. Split the include file to manage
either STM32MP13 or STM32MP15.
Change-Id: Ia568cd12b1d5538809204f0fd2224d51e5d1e985
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
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| 6512c3a6 | 21-Apr-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): get CPU info from SYSCFG on STM32MP13
The IDC register from DBGMCU is duplicated in SYSCFG. As SYSCFG is
always accessible, get chip ID and revision ID from there on STM32MP13.
Chan
feat(stm32mp1): get CPU info from SYSCFG on STM32MP13
The IDC register from DBGMCU is duplicated in SYSCFG. As SYSCFG is
always accessible, get chip ID and revision ID from there on STM32MP13.
Change-Id: Ib0b6e8f68a2934a45ec0012f69db6c12a60adb17
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| b7d0058a | 21-Oct-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): use only one filter for TZC400 on STM32MP13
On STM32MP13, there is only 1 DDR port, hence only 1 TZC400 filter.
Change-Id: I4f6750022cdaf658cd209a4bf48a6cdb0717020e
Signed-off-by: Y
feat(stm32mp1): use only one filter for TZC400 on STM32MP13
On STM32MP13, there is only 1 DDR port, hence only 1 TZC400 filter.
Change-Id: I4f6750022cdaf658cd209a4bf48a6cdb0717020e
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 225ce482 | 15-Apr-2021 |
Lionel Debieve <lionel.debieve@foss.st.com> |
feat(stm32mp1): add a second fixed regulator
Increase the fixed regulator number that needs to be
2 for STM32MP13.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Ica990fe9a64
feat(stm32mp1): add a second fixed regulator
Increase the fixed regulator number that needs to be
2 for STM32MP13.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Change-Id: Ica990fe9a6494b76aed763d2d353f5234fed7cea
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| a5308745 | 14-Apr-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): adaptations for STM32MP13 image header
The header must now include by default at least an extra padding
header, increasing the size of the header to 512 bytes (0x200).
This header wi
feat(stm32mp1): adaptations for STM32MP13 image header
The header must now include by default at least an extra padding
header, increasing the size of the header to 512 bytes (0x200).
This header will be placed at the end of SRAM3 by BootROM, letting
the whole SYSRAM to TF-A.
The boot context is now placed in SRAM2, hence this memory has to be
mapped in BL2 MMU. This mapping is done for all SRAMs in a 2MB area.
Change-Id: I50fcd43ecd0ba2076292b057566efe6809b9971a
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 5f52eb15 | 08-Apr-2020 |
Lionel Debieve <lionel.debieve@st.com> |
feat(stm32mp1): update boot API for header v2.0
Add the new field for the new header v2.0.
Force MP13 platform to use v2.0.
Removing unused fields in boot_api_context_t for STM32MP13.
Signed-off-by
feat(stm32mp1): update boot API for header v2.0
Add the new field for the new header v2.0.
Force MP13 platform to use v2.0.
Removing unused fields in boot_api_context_t for STM32MP13.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Iac81aad9a939c1f305184e335e0a907ac69071df
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| 52ac9983 | 23-Mar-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): update IP addresses for STM32MP13
Add the IP addresses that are STM32MP13 and update the ones for
which the base address has changed.
Signed-off-by: Yann Gautier <yann.gautier@st.co
feat(stm32mp1): update IP addresses for STM32MP13
Add the IP addresses that are STM32MP13 and update the ones for
which the base address has changed.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iea71a491da36f721bfd3fbfb010177e2a6a57281
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| 30eea116 | 12-Feb-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): add part numbers for STM32MP13
Add the new part numbers and adapt the functions that use them.
There is no package number in OTP as they all share the same GPIO
banks.
This part is t
feat(stm32mp1): add part numbers for STM32MP13
Add the new part numbers and adapt the functions that use them.
There is no package number in OTP as they all share the same GPIO
banks.
This part is then stubbed for STM32MP13.
Change-Id: I13414326b140119aece662bf8d82b387dece0dcc
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| ef0b8a6c | 25-Aug-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13
On STM32MP13, the chip revision Z is 0x1001, contrary to STM32MP15,
for which it was 0x2001.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Cha
feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13
On STM32MP13, the chip revision Z is 0x1001, contrary to STM32MP15,
for which it was 0x2001.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: If65482e824b169282abb5e26ca91e16ef7640b52
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| 4b031ab4 | 05-Feb-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): update BACKUP_BOOT_MODE for STM32MP13
The backup register used on STM32MP15 to save the boot interface for
the next boot stage was 20. It is now saved in backup register 30
on STM32M
feat(stm32mp1): update BACKUP_BOOT_MODE for STM32MP13
The backup register used on STM32MP15 to save the boot interface for
the next boot stage was 20. It is now saved in backup register 30
on STM32MP13.
Change-Id: Ibd051ff2eca7202184fa428ed57ecd4ae7388bd8
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 7b48a9f3 | 06-Feb-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): stm32mp_is_single_core() for STM32MP13
STM32MP13 is a single Cortex-A7 CPU, always return true in
stm32mp_is_single_core() function.
Change-Id: Icf36eaa887bdf314137eda07c5751cea8c95
feat(stm32mp1): stm32mp_is_single_core() for STM32MP13
STM32MP13 is a single Cortex-A7 CPU, always return true in
stm32mp_is_single_core() function.
Change-Id: Icf36eaa887bdf314137eda07c5751cea8c950143
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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