Merge "feat(fgt2): add support for FEAT_FGT2" into integration

Merge changes from topic "us_dsu_pmu" into integration

* changes:
feat(tc): enable Last-level cache (LLC)
feat(cpus): add sysreg_bitfield_insert_from_gpr macro
feat(tc): add DSU PMU node for t

Merge changes from topic "us_dsu_pmu" into integration

* changes:
feat(tc): enable Last-level cache (LLC)
feat(cpus): add sysreg_bitfield_insert_from_gpr macro
feat(tc): add DSU PMU node for tc3
feat(tc): enable el1 access to DSU PMU registers
style(tc): remove comment for plat_reset_handler
fix(context-mgmt): keep actlr_el2 value in the init context

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feat(tc): enable Last-level cache (LLC)

The EXTLLC bit in CPUECTLR_EL1 register indicates that an external
Last-level cache is present in the system.

This bit is not set for CPUs on TC3 platform de

feat(tc): enable Last-level cache (LLC)

The EXTLLC bit in CPUECTLR_EL1 register indicates that an external
Last-level cache is present in the system.

This bit is not set for CPUs on TC3 platform despite there is
presence of LLC in MCN, so set them.

Change-Id: I5f889e67dce2b1d00e4ee66a8c255cf7911825b0
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>

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Merge "fix(arm): check the presence of the policy check function" into integration

feat(spm): change UART0-1 to NS device region

To enable device memory sharing test make memory region for UART0
and 1 a NS device region so that it can be shared by tf-a-tests
to the cactus SP.

Sig

feat(spm): change UART0-1 to NS device region

To enable device memory sharing test make memory region for UART0
and 1 a NS device region so that it can be shared by tf-a-tests
to the cactus SP.

Signed-off-by: Daniel Boulby <daniel.boulby@arm.com>
Change-Id: Iadfe02a65f5d4a8b60296f07c4943dd31f201453

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feat(tc): enable el1 access to DSU PMU registers

DSU PMU registers are write accessible in EL1 if the ACTLR_EL3[12] bit
and the ACTLR_EL2[12] bit are set to 1, and these registers are need to
be set

feat(tc): enable el1 access to DSU PMU registers

DSU PMU registers are write accessible in EL1 if the ACTLR_EL3[12] bit
and the ACTLR_EL2[12] bit are set to 1, and these registers are need to
be set for all cores, so set these bits in platform reset handler.

Change-Id: I1db6915939727f0909c05c8b103e37984aadb443
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>

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style(tc): remove comment for plat_reset_handler

The comment for plat_reset_handler doesn't make sense. It is likely a
copy-and-paste error while adding the code, so remove it.

Change-Id: Iab8c8c79

style(tc): remove comment for plat_reset_handler

The comment for plat_reset_handler doesn't make sense. It is likely a
copy-and-paste error while adding the code, so remove it.

Change-Id: Iab8c8c799c184fa99966770d47ecb11bbc640515
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>

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Merge "fix(corstone1000): include platform header file" into integration

fix(corstone1000): include platform header file

Include platform.h file in order to remove following compiler errors,
as some warnings are being treated as errors now.
error: implicit declaration of

fix(corstone1000): include platform header file

Include platform.h file in order to remove following compiler errors,
as some warnings are being treated as errors now.
error: implicit declaration of function
'plat_core_pos_by_mpidr'[-Wimplicit-function-declaration]

Change-Id: Ie223e11e138ec9b0eef7342f450b90b215a49b15
Signed-off-by: Harsimran Singh Tungal <harsimransingh.tungal@arm.com>

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Merge "feat(debugv8p9): add support for FEAT_Debugv8p9" into integration

feat(fgt2): add support for FEAT_FGT2

This patch disables trapping to EL3 when the FEAT_FGT2
specific trap registers are accessed by setting the
SCR_EL3.FGTEn2 bit

Signed-off-by: Arvind Ram Prakash

feat(fgt2): add support for FEAT_FGT2

This patch disables trapping to EL3 when the FEAT_FGT2
specific trap registers are accessed by setting the
SCR_EL3.FGTEn2 bit

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I6d2b614affb9067b2bc3d7bf0ae7d169d031592a

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feat(debugv8p9): add support for FEAT_Debugv8p9

This patch enables FEAT_Debugv8p9 and prevents EL1/0 from
trapping to EL3 when accessing MDSELR_EL1 register by
setting the MDCR_EL3.EBWE bit.

Signed

feat(debugv8p9): add support for FEAT_Debugv8p9

This patch enables FEAT_Debugv8p9 and prevents EL1/0 from
trapping to EL3 when accessing MDSELR_EL1 register by
setting the MDCR_EL3.EBWE bit.

Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com>
Change-Id: I3613af1dd8cb8c0d3c33dc959f170846c0b9695a

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fix(arm): check the presence of the policy check function

Change-Id: I7bb0dad232eac6c8084873713af22562853a4c21
Signed-off-by: Jimmy Brisson <jimmy.brisson@arm.com>

feat(fvp): add SPM manifest for OP-TEE at S-EL1 without S-EL2/Hafnium

Provide manifest to boot OP-TEE at S-EL1 running SPMC with secure EL2
disabled and TF-A at secure EL3 running SPMD.

Change-Id:

feat(fvp): add SPM manifest for OP-TEE at S-EL1 without S-EL2/Hafnium

Provide manifest to boot OP-TEE at S-EL1 running SPMC with secure EL2
disabled and TF-A at secure EL3 running SPMD.

Change-Id: If8547b5a514fb48eec88a8d56d718f1c1591cf1f
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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fix(fvp): update the memory size allocated to optee at EL1

Update the memory size allocated to optee at EL1 to 0xd80000 to match
the size specified by mem-size in optee manifest.

Change-Id: I6826a5

fix(fvp): update the memory size allocated to optee at EL1

Update the memory size allocated to optee at EL1 to 0xd80000 to match
the size specified by mem-size in optee manifest.

Change-Id: I6826a56d0f68a6a2b5181f849a741a9bf1f0829b
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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fix(fvp): add DRAM memory regions that linux kernel can share

The memory regions that Linux kernel can share including TX/RX buffers
encompass the entire DRAM. Update it accordingly. Without this,
w

fix(fvp): add DRAM memory regions that linux kernel can share

The memory regions that Linux kernel can share including TX/RX buffers
encompass the entire DRAM. Update it accordingly. Without this,
when the Linux kernel call FFA_RXTX_MAP, it fails sometime and the
below error from the secure world appears:

| ERROR: arch_other_world_vm_configure_rxtx_map: send page is invalid
| (expected 0x87, got 0x7c)

Change-Id: Idb40907af2e0c1d4e60979b4948db2fc70971145
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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feat(fvp): update FF-A version to v1.1 supported by optee

OPTEE now supports FF-A v1.1, lets us bump the FF-A version in the
OPTEE FF-A manifest.

Change-Id: Ia51cbe1af619895945240004a4163a4c4bda2ee

feat(fvp): update FF-A version to v1.1 supported by optee

OPTEE now supports FF-A v1.1, lets us bump the FF-A version in the
OPTEE FF-A manifest.

Change-Id: Ia51cbe1af619895945240004a4163a4c4bda2ee5
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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feat(fvp): replace managed-exit with ns-interrupts-action

Commit 10b292e64933 ("docs(spm): update FF-A manifest binding")
deprecated managed-exit in favor of newly added mandatory
ns-interrupts-acti

feat(fvp): replace managed-exit with ns-interrupts-action

Commit 10b292e64933 ("docs(spm): update FF-A manifest binding")
deprecated managed-exit in favor of newly added mandatory
ns-interrupts-action attribute. Replace managed-exit with
ns-interrupts-action before it becomes obsolete.

Change-Id: I9b55f6c55af3510260a9c5a01755a9b66d75823e
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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fix(fvp): add optee specific mem-size attribute

Without the mem-size attribute, the OPTEE boot panics with below
error:
| get_sec_mem_from_manifest:1594 Can't read "mem-size" from FF-A
| man

fix(fvp): add optee specific mem-size attribute

Without the mem-size attribute, the OPTEE boot panics with below
error:
| get_sec_mem_from_manifest:1594 Can't read "mem-size" from FF-A
| manifest at 0x6281000: error -1
| Panic at core/arch/arm/kernel/boot.c:1596 <get_sec_mem_from_manifest>
| TEE load address @ 0x6284000
| Call stack:
| 0x0628c7fc
| 0x06298788
| 0x0628c480

Adding the mem-size attribute fixes the boot. This is OPTEE specific
extension.

Change-Id: I2801c8b4a89cffafff14c788319ad106b03ffef0
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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fix(fvp): fix the FF-A optee manifest by adding the boot info node

Without the FF-A manifest boot info node, the OPTEE boot as S-EL1 VM
crashes currently with the below error:
| WARNING: Stage-2

fix(fvp): fix the FF-A optee manifest by adding the boot info node

Without the FF-A manifest boot info node, the OPTEE boot as S-EL1 VM
crashes currently with the below error:
| WARNING: Stage-2 page fault: pc=0x628c41c, vmid=0x8001, vcpu=0,
| vaddr=0xd00000, ipaddr=0xd00000, mode=0x1 0x7c
| NOTICE: Injecting Data Abort exception into VM 0x8001.

Adding the boot info node fixes the OPTEE boot.

While at it, also update copyright year in the file.

Change-Id: I1fd0bf4e38bb95deedc74fa04d1e6bb057424c04
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>

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Merge "chore(rdv3): rename platform RD-Fremont to RD-V3" into integration

chore(rdv3): rename platform RD-Fremont to RD-V3

Arm has decided to rename RD-Fremont to RD-V3 to align with its
existing product lineup, such as RD-V1, RD-V2, etc. This change
replaces all occurenc

chore(rdv3): rename platform RD-Fremont to RD-V3

Arm has decided to rename RD-Fremont to RD-V3 to align with its
existing product lineup, such as RD-V1, RD-V2, etc. This change
replaces all occurences of "Fremont" with "V3" in file names and
contents.

Change-Id: I302103492f962a7ac74854633ad68701b2a7f420
Signed-off-by: Jerry Wang <Jerry.Wang4@arm.com>

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fix(arm): remove critical handoff code from assert

Fix BL31 crashes caused by incorrect placement of firmware handoff code
within an assert. The function call has been removed from the assert to
ens

fix(arm): remove critical handoff code from assert

Fix BL31 crashes caused by incorrect placement of firmware handoff code
within an assert. The function call has been removed from the assert to
ensure it’s executed even when assertions are disabled.

Change-Id: I668f5c08af33327e8ff0e22887c3da109bd6be31
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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Merge "fix(tc): add stubs for soc_css_init functions" into integration

Merge "fix(tc): don't enable TZC on TC3" into integration