| 0ce2072d | 18-Jan-2022 |
Tamas Ban <tamas.ban@arm.com> |
feat(lib/psa): mock PSA APIs
Introduce PLAT_RSS_NOT_SUPPORTED build config to
provide a mocked version of PSA APIs. The goal is
to test the RSS backend based measured boot and
attestation token requ
feat(lib/psa): mock PSA APIs
Introduce PLAT_RSS_NOT_SUPPORTED build config to
provide a mocked version of PSA APIs. The goal is
to test the RSS backend based measured boot and
attestation token request integration on such
a platform (AEM FVP) where RSS is otherwise
unsupported. The mocked PSA API version does
not send a request to the RSS, it only returns
with success and hard-coded values.
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Change-Id: Ice8d174adf828c1df08fc589f0e17abd1e382a4d
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| 7b76c20d | 21-Apr-2022 |
Okash Khawaja <okash@google.com> |
fix(errata): workarounds for cortex-x1 errata
This patch adds workarounds for following cortex-x1 errata:
- 1821534 (CatB)
- 1688305 (CatB)
- 1827429 (CatB)
SDEN can be found here:
https://develop
fix(errata): workarounds for cortex-x1 errata
This patch adds workarounds for following cortex-x1 errata:
- 1821534 (CatB)
- 1688305 (CatB)
- 1827429 (CatB)
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1401782/latest
Signed-off-by: Okash Khawaja <okash@google.com>
Change-Id: I10ebe8d5c56a6d273820bb2c682f21bf98daa7a5
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| 06c6f653 | 09-May-2022 |
Daniel Boulby <daniel.boulby@arm.com> |
docs: update release and code freeze dates
Change-Id: I72d200a0cfbcb4ef53b732faa5b7125dce91395d
Signed-off-by: Daniel Boulby <daniel.boulby@arm.com> |
| ce5b35c5 | 14-Feb-2022 |
Marc Bonnici <marc.bonnici@arm.com> |
docs(maintainers): introduce SPMC maintainer section
Renamed the existing SPM entry to the SPMD and add myself
as the SPMC maintainer.
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id:
docs(maintainers): introduce SPMC maintainer section
Renamed the existing SPM entry to the SPMD and add myself
as the SPMC maintainer.
Signed-off-by: Marc Bonnici <marc.bonnici@arm.com>
Change-Id: Ic74659b119986df5fc229a4470049d289eeef21a
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| 103bbd56 | 11-May-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
docs(versal): fix the versal platform emu name
Fix the versal platform emu itr6 name.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Id9f3272c85513d8258fbbb3bd71
docs(versal): fix the versal platform emu name
Fix the versal platform emu itr6 name.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Id9f3272c85513d8258fbbb3bd719c032053b3ada
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| aeef2c22 | 10-May-2022 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge "fix(errata): workaround for Cortex-A710 erratum 2008768" into integration |
| 3b577ed5 | 03-May-2022 |
John Powell <john.powell@arm.com> |
fix(errata): workaround for Cortex-A78 erratum 2395406
Cortex-A78 erratum 2395406 is a cat B erratum that applies to revisions
r0p0 - r1p2 and is still open. The workaround is to set bit[40] of
CPUA
fix(errata): workaround for Cortex-A78 erratum 2395406
Cortex-A78 erratum 2395406 is a cat B erratum that applies to revisions
r0p0 - r1p2 and is still open. The workaround is to set bit[40] of
CPUACTLR2 which will disable folding of demand requests into older
prefetches with L2 miss requests outstanding.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1401784
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: If06f988f05f925c2a4bed3e6a9414b6acdfec894
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| af220ebb | 09-Mar-2022 |
johpow01 <john.powell@arm.com> |
fix(errata): workaround for Cortex-A710 erratum 2008768
Cortex-A710 erratum 2008768 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r2p0, and is fixed in r2p1. The workaround is to clea
fix(errata): workaround for Cortex-A710 erratum 2008768
Cortex-A710 erratum 2008768 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r2p0, and is fixed in r2p1. The workaround is to clear
the ED bit in each ERXCTLR_EL1 register before setting the PWRDN bit in
CPUPWRCTLR_EL1.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775101
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ib2171c06da762dd4155b02c03d86766f1616381d
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| 5d796b3a | 03-May-2022 |
John Powell <john.powell@arm.com> |
fix(errata): workaround for Cortex-A78 erratum 2376745
Cortex-A78 erratum 2376745 is a cat B erratum that applies to revisions
r0p0 - r1p2 and is still open. The workaround is to set bit[0] of
CPUAC
fix(errata): workaround for Cortex-A78 erratum 2376745
Cortex-A78 erratum 2376745 is a cat B erratum that applies to revisions
r0p0 - r1p2 and is still open. The workaround is to set bit[0] of
CPUACTLR2 which will force PLDW/PFRM ST to behave like PLD/PRFM LD and
not cause invalidation to other PE caches.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1401784
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I6f1a3a7d613c5ed182a7028f912e0f6ae3aa7f98
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| 3db9a39c | 06-Apr-2022 |
Marco Nelissen <marcone@google.com> |
docs(maintainers): add new owners for Trusty SPD
Split TLK/Trusty SPD into two separate components and add additional
owners for Trusty SPD.
Signed-off-by: Marco Nelissen <marcone@google.com>
Chang
docs(maintainers): add new owners for Trusty SPD
Split TLK/Trusty SPD into two separate components and add additional
owners for Trusty SPD.
Signed-off-by: Marco Nelissen <marcone@google.com>
Change-Id: Ifabd1bb630fe4976e304fa29eac1c516ec6e2e18
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| e8ad3975 | 06-May-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "feat(brbe): add BRBE support for NS world" into integration |
| d82fae26 | 05-May-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "docs(maintainers): update measured boot code owners" into integration |
| 744ad974 | 28-Jan-2022 |
johpow01 <john.powell@arm.com> |
feat(brbe): add BRBE support for NS world
This patch enables access to the branch record buffer control registers
in non-secure EL2 and EL1 using the new build option ENABLE_BRBE_FOR_NS.
It is disab
feat(brbe): add BRBE support for NS world
This patch enables access to the branch record buffer control registers
in non-secure EL2 and EL1 using the new build option ENABLE_BRBE_FOR_NS.
It is disabled for all secure world, and cannot be used with ENABLE_RME.
This option is disabled by default, however, the FVP platform makefile
enables it for FVP builds.
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I576a49d446a8a73286ea6417c16bd0b8de71fca0
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| 598d1fa8 | 04-May-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
docs(maintainers): add code owners for Firmware Update driver
Added myself and Sandrine Bailleux as code owners for Firmware
Update driver.
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com
docs(maintainers): add code owners for Firmware Update driver
Added myself and Sandrine Bailleux as code owners for Firmware
Update driver.
Signed-off-by: Manish V Badarkhe <manish.badarkhe@arm.com>
Change-Id: I34fad895c6236fedc814fb6da4b04fd7fbed9227
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| b7bd9863 | 04-May-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "hm/make-refactor" into integration
* changes:
docs(prerequisites): use LLVM utilities to build with clang
build(make): use clang binutils to compile |
| 1ced6cad | 03-May-2022 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge changes from topic "refactor-hw-config-load" into integration
* changes:
docs(fvp): update loading addresses of HW_CONFIG
docs(fconf): update device tree binding for FCONF
feat(fvp): upd
Merge changes from topic "refactor-hw-config-load" into integration
* changes:
docs(fvp): update loading addresses of HW_CONFIG
docs(fconf): update device tree binding for FCONF
feat(fvp): update HW_CONFIG DT loading mechanism
refactor(st): update set_config_info function call
refactor(fvp_r): update set_config_info function call
refactor(arm): update set_config_info function call
feat(fconf): add NS load address in configuration DTB nodes
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| 7cb76fdf | 03-May-2022 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
docs(maintainers): update measured boot code owners
Propose myself as a code owner of the measured boot module.
Also do a couple of updates along the way:
- Add the measured boot bindings documen
docs(maintainers): update measured boot code owners
Propose myself as a code owner of the measured boot module.
Also do a couple of updates along the way:
- Add the measured boot bindings document to the list of measured
boot files.
- Fix the list of FVP files. plat/arm/board/fvp/fvp_measured_boot.c
does not exist anymore. It has been replaced by
plat/arm/board/fvp/fvp_measured_{bl1,bl2,common}_boot.c files.
Change-Id: Ifb34f4f7c704b1db966b44428bbffd48c5e3c42b
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| be73459a | 13-Apr-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
feat(xilinx): add SPP/EMU platform support for versal
This patch adds SPP/EMU platform support for Xilinx Versal and
also updating the documentation.
Signed-off-by: Venkatesh Yadav Abbarapu <venkat
feat(xilinx): add SPP/EMU platform support for versal
This patch adds SPP/EMU platform support for Xilinx Versal and
also updating the documentation.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: Ibdadec4d00cd33ea32332299e7a00de31dc9d60b
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| 894c635b | 29-Apr-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I47014d72,Ibf00c386 into integration
* changes:
docs(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS
feat(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS |
| ac4ac38c | 15-Apr-2022 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
docs(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS
Document the RESET_TO_BL31 with parameters feature.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Change-Id: I47014d724f2eb822b69a112c3acee5
docs(bl31): aarch64: RESET_TO_BL31_WITH_PARAMS
Document the RESET_TO_BL31 with parameters feature.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Change-Id: I47014d724f2eb822b69a112c3acee546fbfe82d5
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| 145f665e | 29-Apr-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "docs(fvp): specify correct reference of the hw_config address" into integration |
| a5d36574 | 23-Feb-2022 |
Harrison Mutai <harrison.mutai@arm.com> |
docs(prerequisites): use LLVM utilities to build with clang
Makefile updated to use LLVM utilities instead of GNU utilities when
compiling with clang. `CROSS_COMPILE` is not required since this
depe
docs(prerequisites): use LLVM utilities to build with clang
Makefile updated to use LLVM utilities instead of GNU utilities when
compiling with clang. `CROSS_COMPILE` is not required since this
dependency has been removed.
Change-Id: I19706b84b9310e07935516681b86596c04ef8ad6
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| e34ea9b9 | 28-Apr-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "docs(build): update GCC to version 11.2-2022.02" into integration |
| b4a87836 | 12-Apr-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
docs(fvp): update loading addresses of HW_CONFIG
As per change [1], now HW_CONFIG gets loaded in secure and
non-secure memory. Hence updated the documentation to show
secure and non-secure load regi
docs(fvp): update loading addresses of HW_CONFIG
As per change [1], now HW_CONFIG gets loaded in secure and
non-secure memory. Hence updated the documentation to show
secure and non-secure load region of HW_CONFIG in FVP Arm
platform.
Additionally, added a note on how FW_CONFIG address gets
passed from BL2 to BL31/SP_MIN.
[1]: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/14620
Change-Id: I37e02ff4f433c87bccbe67c7df5ecde3017668b9
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| b80e751d | 21-Apr-2022 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
docs(fconf): update device tree binding for FCONF
Added a description for the newly introduced 'ns-load-address' property
in the dtb-registry node of FCONF.
Change-Id: Ief8e8a55a6363fd42b23491d000b
docs(fconf): update device tree binding for FCONF
Added a description for the newly introduced 'ns-load-address' property
in the dtb-registry node of FCONF.
Change-Id: Ief8e8a55a6363fd42b23491d000b097b0c48453b
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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