1 /* 2 * Copyright (c) 2022, ARM Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef CORTEX_A510_H 8 #define CORTEX_A510_H 9 10 #define CORTEX_A510_MIDR U(0x410FD460) 11 12 /******************************************************************************* 13 * CPU Extended Control register specific definitions 14 ******************************************************************************/ 15 #define CORTEX_A510_CPUECTLR_EL1 S3_0_C15_C1_4 16 #define CORTEX_A510_CPUECTLR_EL1_READPREFERUNIQUE_SHIFT U(19) 17 #define CORTEX_A510_CPUECTLR_EL1_READPREFERUNIQUE_DISABLE U(1) 18 19 /******************************************************************************* 20 * CPU Power Control register specific definitions 21 ******************************************************************************/ 22 #define CORTEX_A510_CPUPWRCTLR_EL1 S3_0_C15_C2_7 23 #define CORTEX_A510_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) 24 25 /******************************************************************************* 26 * Complex auxiliary control register specific definitions 27 ******************************************************************************/ 28 #define CORTEX_A510_CMPXACTLR_EL1 S3_0_C15_C1_3 29 30 /******************************************************************************* 31 * Auxiliary control register specific definitions 32 ******************************************************************************/ 33 #define CORTEX_A510_CPUACTLR_EL1 S3_0_C15_C1_0 34 35 #endif /* CORTEX_A510_H */ 36