docs: marvell: Add information into CLOCKSPRESET option how to identify CPU frequency

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I5310c30051703bbf9f377762a00eb6a8188c6fa1

docs: marvell: Reformat DDR_TOPOLOGY option and mention EspressoBin-Ultra board

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I96c2d9d5bc6c69a1a66a29bf586a23375d63ab5a

docs: marvell: Move Supported Marvell platforms to PLAT build option

Reformat list of boards, remove unsupported OcteonTX2 and mention
supported Turris MOX board.

Signed-off-by: Pali Rohár <pali@ke

docs: marvell: Move Supported Marvell platforms to PLAT build option

Reformat list of boards, remove unsupported OcteonTX2 and mention
supported Turris MOX board.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I22cea7f77fd078554c7f0ed4108781626209e563

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docs: marvell: Update info about WTMI_IMG option

Default WTMI_IMG value was documented incorrectly. Also WTMI_IMG name may
be misleading as this option does not specify full WTMI image, just a main

docs: marvell: Update info about WTMI_IMG option

Default WTMI_IMG value was documented incorrectly. Also WTMI_IMG name may
be misleading as this option does not specify full WTMI image, just a main
loop (e.g. fuse.bin or custom RTOS image) without hardware initialization
code (DDR, CPU and clocks).

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I3de4a27ce2165b962fa628c992fd8f80151efd7c

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docs: marvell: Update info about BOOTDEV=SATA

Information is taken from the post https://lists.denx.de/pipermail/u-boot/2017-July/299351.html

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id:

docs: marvell: Update info about BOOTDEV=SATA

Information is taken from the post https://lists.denx.de/pipermail/u-boot/2017-July/299351.html

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I5f608e135ec56685a3e2b986a52670540d48a4bf

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plat: marvell: armada: a3k: Add a new target mrvl_uart which builds UART image

This change separates building of flash and UART images, so it is possible
to build only one of these images. Also this

plat: marvell: armada: a3k: Add a new target mrvl_uart which builds UART image

This change separates building of flash and UART images, so it is possible
to build only one of these images. Also this change allows make to build
them in parallel.

Target mrvl_flash now builds only flash image and mrvl_uart only UART
image. This change reflects it also in the documentation.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ie9ce4538d52188dd26d99dfeeb5ad171a5b818f3

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plat: marvell: armada: a3k: Allow use of the system Crypto++ library

This change introduces two new A3720 parameters, CRYPTOPP_LIBDIR and
CRYPTOPP_INCDIR, which can be used to specify directory path

plat: marvell: armada: a3k: Allow use of the system Crypto++ library

This change introduces two new A3720 parameters, CRYPTOPP_LIBDIR and
CRYPTOPP_INCDIR, which can be used to specify directory paths to
pre-compiled Crypto++ library and header files.

When both new parameters are specified then the source code of Crypto++ via
CRYPTOPP_PATH parameter is not needed. And therefore it allows TF-A build
process to use system Crypto++ library.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I6d440f86153373b11b8d098bb68eb7325e86b20b

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docs: marvell: Update info about WTP and MV_DDR_PATH parameters

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Id5e36b7ba3a840cb3598c580e806b52d8e8dd70f

Merge "Fix documentation typos and misspellings" into integration

docs: marvell: Update mv-ddr-marvell and A3700-utils-marvell branches

Marvell finally started providing the latest version of mv-ddr-marvell and
A3700-utils-marvell code in master branch of their gi

docs: marvell: Update mv-ddr-marvell and A3700-utils-marvell branches

Marvell finally started providing the latest version of mv-ddr-marvell and
A3700-utils-marvell code in master branch of their git repositories.
Reflect this in build instructions.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I08d1189dac60eb2a28335c68f611c1da634106f6

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Fix documentation typos and misspellings

Fix some typos and misspellings in TF-A documentation.

Signed-off-by: David Horstmann <david.horstmann@arm.com>
Change-Id: Id72553ce7b2f0bed9821604fbc8df4d4

Fix documentation typos and misspellings

Fix some typos and misspellings in TF-A documentation.

Signed-off-by: David Horstmann <david.horstmann@arm.com>
Change-Id: Id72553ce7b2f0bed9821604fbc8df4d4949909fa

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docs: marvell: armada: Update MARVELL_PLATFORM list and build instructions

The supported MARVELL_PLATFORM list is updated to include the recently added
a80x0_puzzle platform (IEI Puzzle-M801).

Addi

docs: marvell: armada: Update MARVELL_PLATFORM list and build instructions

The supported MARVELL_PLATFORM list is updated to include the recently added
a80x0_puzzle platform (IEI Puzzle-M801).

Additionally building instructions are added for the GST ESPRESSObin-Ultra
board (1 GB, DDR4 RAM variant), which has been tested successfully and booted
TF-A on the board.

Signed-off-by: Luka Kovacic <luka.kovacic@sartura.hr>
Change-Id: Ie5724df27c1ee2e8f6a52664520579e872471e93

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plat: marvell: armada: a3k: support doing system reset via CM3 secure coprocessor

Introduce a new build option CM3_SYSTEM_RESET for A3700 platform, which,
when enabled, adds code to the PSCI reset h

plat: marvell: armada: a3k: support doing system reset via CM3 secure coprocessor

Introduce a new build option CM3_SYSTEM_RESET for A3700 platform, which,
when enabled, adds code to the PSCI reset handler to try to do system
reset by the WTMI firmware running on the Cortex-M3 secure coprocessor.
(This function is exposed via the mailbox interface.)

The reason is that the Turris MOX board has a HW bug which causes reset
to hang unpredictably. This issue can be solved by putting the board in
a specific state before reset.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Change-Id: I3f60b9f244f334adcd33d6db6a361fbc8b8d209f

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docs: marvell: Update build documentation to reflect mrvl_bootimage and mrvl_flash changes

Also add example how to build TF-A for A3720 Turris MOX board and also fix
style/indentation issues and inf

docs: marvell: Update build documentation to reflect mrvl_bootimage and mrvl_flash changes

Also add example how to build TF-A for A3720 Turris MOX board and also fix
style/indentation issues and information about default values.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I2dc957307b1b627b403a8d960e85f5ac9e15aee5

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docs: marvell: update ddr3 build instructions

Add information about 2GB variant of EspressoBin V5 and use Marvell git
branches which contain required fixes for EspressoBin.

Signed-off-by: Pali Rohá

docs: marvell: update ddr3 build instructions

Add information about 2GB variant of EspressoBin V5 and use Marvell git
branches which contain required fixes for EspressoBin.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I1db510f1576f4762259ad7b0c10024b8ab434a59

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docs: marvell: update mv_ddr branch

Now that the BLE image sources (mv_ddr) are updated, reflect
the proper branch in the Armada build howto.

Change-Id: I959d1343d0dfdd681c7e39bdcaed9b36aaddfca1
Si

docs: marvell: update mv_ddr branch

Now that the BLE image sources (mv_ddr) are updated, reflect
the proper branch in the Armada build howto.

Change-Id: I959d1343d0dfdd681c7e39bdcaed9b36aaddfca1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>

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docs: marvell: update PHY porting layer description

The purpose of rx_training had changed after last update. Currently it
is not supposed to help with providing static parameters for porting
layer.

docs: marvell: update PHY porting layer description

The purpose of rx_training had changed after last update. Currently it
is not supposed to help with providing static parameters for porting
layer. Instead, it aims to suit the parameters per connection.

Change-Id: I2a146b71e2e20bd264c090a9a627d0b6bc56e052
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>

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docs: marvell: update path in marvell documentation

Change-Id: I0cebbaa900aa518700f13cbf02f8a97e0c76b21c
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>

docs: marvell: update build instructions with CN913x

Add references to the OcteonTX2 CN913x family.

Change-Id: I172a8e3d061086bf4843acad014c113c80359e01
Signed-off-by: Konstantin Porotchkin <kostap

docs: marvell: update build instructions with CN913x

Add references to the OcteonTX2 CN913x family.

Change-Id: I172a8e3d061086bf4843acad014c113c80359e01
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

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plat: marvell: armada: a8k: change CCU LLC SRAM mapping

The LLC SRAM will be enabled in OP-TEE OS for usage as secure storage.
The CCU have to prepare SRAM window, but point to the DRAM-0 target
unt

plat: marvell: armada: a8k: change CCU LLC SRAM mapping

The LLC SRAM will be enabled in OP-TEE OS for usage as secure storage.
The CCU have to prepare SRAM window, but point to the DRAM-0 target
until the SRAM is actually enabled.
This patch changes CCU SRAM window target to DRAM-0
Remove dependence between LLC_SRAM and LLC_ENABLE and update the
build documentation.
The SRAМ base moved to follow the OP-TEE SHMEM area (0x05400000)

Change-Id: I85c2434a3d515ec37da5ae8eb729e3280f91c456
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

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drivers: marvell: add support for mapping the entire LLC to SRAM

Add llc_sram_enable() and llc_sram_disable() APIs to Marvell
cache_lls driver.
Add LLC_SRAM definition to Marvell common makefile - d

drivers: marvell: add support for mapping the entire LLC to SRAM

Add llc_sram_enable() and llc_sram_disable() APIs to Marvell
cache_lls driver.
Add LLC_SRAM definition to Marvell common makefile - disabled
by the default.
Add description of LLC_SRAM flag to the build documentation.

Change-Id: Ib348e09752ce1206d29268ef96c9018b781db182
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

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ddr: a80x0: add DDR 32-bit mode support

This commit introduces 32-bit DDR topology map initialization.
For that purpose a new DDR32 build flag is added, with
according documentation update.

Change-

ddr: a80x0: add DDR 32-bit mode support

This commit introduces 32-bit DDR topology map initialization.
For that purpose a new DDR32 build flag is added, with
according documentation update.

Change-Id: I169ff358c2923afd984e27bc126dc551dcaefc01
Signed-off-by: Alex Leibovich <alexl@marvell.com>

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marvell: armada: add extra level in marvell platform hierarchy

This commit is a preparation for upcoming support for OcteonTX and
OcteonTX2 product families. Armada platform related files (docs,
pla

marvell: armada: add extra level in marvell platform hierarchy

This commit is a preparation for upcoming support for OcteonTX and
OcteonTX2 product families. Armada platform related files (docs,
plat, include/plat) are moved to the new "armada" sub-folder.

Change-Id: Icf03356187078ad6a2e56c9870992be3ca4c9655
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>

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Revert "GCC: Upgrade to version 9.2-2019.12 of toolchain"

This reverts commit de9bf1d8a2de952bfc17cdf7082b41f9c185e54d.

Change-Id: Iebb6297ce290a10ee850bf6a9c71e7eb530b085f

GCC: Upgrade to version 9.2-2019.12 of toolchain

This toolchain provides multiple cross compilers and are publicly
available on www.developer.arm.com

We thoroughly test TF-A in CI using:
AArch32 ba

GCC: Upgrade to version 9.2-2019.12 of toolchain

This toolchain provides multiple cross compilers and are publicly
available on www.developer.arm.com

We thoroughly test TF-A in CI using:
AArch32 bare-metal target (arm-none-eabi)
AArch64 ELF bare-metal target (aarch64-none-elf)

Change-Id: I2360a3ac6705c68dca781b85e9894867df255b3e
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

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