Merge "docs(marvell): fix typo 8K => A8K" into integration

fix(ras): restrict RAS support for NS world

Current RAS framework in TF-A only supports handling errors originating
from NS world but the HANDLE_EA_EL3_FIRST flag configures it for all
lower Els. To

fix(ras): restrict RAS support for NS world

Current RAS framework in TF-A only supports handling errors originating
from NS world but the HANDLE_EA_EL3_FIRST flag configures it for all
lower Els. To make the current design of RAS explicit, rename this macro
to HANDLE_EA_EL3_FIRST_NS and set EA bit in scr_el3 only when
switching to NS world.

Note: I am unaware of any platform which traps errors originating in
Secure world to EL3, if there is any such platform then it need to
be explicitly implemented in TF-A

Signed-off-by: Manish Pandey <manish.pandey2@arm.com>
Change-Id: If58eb201d8fa792c16325c85c26056e9b409b750

show more ...

docs(marvell): fix typo 8K => A8K

It is Armada 80x0, hence A8K (like A7K).

Change-Id: I4888b472204ecd19bfe9b8c89adaa1a99b01dd5f
Signed-off-by: Pali Rohár <pali@kernel.org>

docs(marvell): document UART image downloading

For A3K there are two different tools for booting Armada37x0 platform
over UART, one from Marvell and second from CZ.NIC. For A8K there is
just one my

docs(marvell): document UART image downloading

For A3K there are two different tools for booting Armada37x0 platform
over UART, one from Marvell and second from CZ.NIC. For A8K there is
just one my own mvebu64boot tool.

Add documentation how to build these tools and how to download TF-A
image over UART to boot TF-A without flashing it to non-volatile
storage.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ifa03584010a9c40496a34e6d5b9f3b78cb2cc89b

show more ...

docs(a3k): update documentation about DEBUG mode for UART

DEBUG mode can be enabled without any issue for Armada 37xx and also for
other A7K/A8K/CN913x. There is no incompatibility with Xmodem proto

docs(a3k): update documentation about DEBUG mode for UART

DEBUG mode can be enabled without any issue for Armada 37xx and also for
other A7K/A8K/CN913x. There is no incompatibility with Xmodem protocol
like it was written before, because Armada 37xx UART images do not print
anything on UART during image transfer and A7K/A8K/CN913x BLE image
automatically turn off debugging output when booting over UART. Looks
like this incorrect information is some relict from the past.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I85adc3c21036656b4620c4692e04330cad11ea2f

show more ...

docs(a3k): add information about system-wide Crypto++ library

On Debian systems it is possible to use system-wide Crypto++ library.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ib01d93767

docs(a3k): add information about system-wide Crypto++ library

On Debian systems it is possible to use system-wide Crypto++ library.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ib01d9376776b8afcb1ca46c16076e28c3d2e581d

show more ...

docs(a3k): fix information about SATA GPT booting

Armada 3720 BootROM searches for GPT partition with partition type GUID
6828311A-BA55-42A4-BCDE-A89BB5EDECAE and completely ignores GPT
partition na

docs(a3k): fix information about SATA GPT booting

Armada 3720 BootROM searches for GPT partition with partition type GUID
6828311A-BA55-42A4-BCDE-A89BB5EDECAE and completely ignores GPT
partition name. It does not check for "MARVELL BOOT PARTITION".

This fact is incorrectly documented even in official Marvell Armada 3700
Functional Specification.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I35279f39de2d12148fc16f2730a9a074dc0b58eb

show more ...

plat/marvell/a8k: add Globalscale Mochabin support

Add support for Globalscale MOCHAbin board.

Its based on Armada 7040 SoC and ships in multiple DRAM options:
* 2GB DDR4 (1CS)
* 4GB DDR4 (1CS)
* 8

plat/marvell/a8k: add Globalscale Mochabin support

Add support for Globalscale MOCHAbin board.

Its based on Armada 7040 SoC and ships in multiple DRAM options:
* 2GB DDR4 (1CS)
* 4GB DDR4 (1CS)
* 8GB DDR4 (2CS)

Since it ships in multiple DRAM configurations, an
Armada 3k style DDR_TOPOLOGY variable is added.
Currently, this only has effect on the MOCHAbin, but
I expect more boards with multiple DRAM sizes to be
supported.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Change-Id: I8a1ec9268fed34f6a81c5cbf1e891f638d461305

show more ...

Merge changes from topic "advk-serror" into integration

* changes:
fix(plat/marvell/a3k): disable HANDLE_EA_EL3_FIRST by default
fix(plat/marvell/a3k): update information about PCIe abort hack

Merge "docs(plat/marvell/a8k): document MSS_SUPPORT and SCP_BL2 build options" into integration

feat(plat/marvell): introduce t9130_cex7_eval

This patch adds the necessary files to support
the SolidRun CN913X CEx7 Evaluation Board.

Because the DRAM connectivity and SerDes settings
is shared w

feat(plat/marvell): introduce t9130_cex7_eval

This patch adds the necessary files to support
the SolidRun CN913X CEx7 Evaluation Board.

Because the DRAM connectivity and SerDes settings
is shared with the CN913X DB - reuse relevant
board-specific files.

Change-Id: I75a4554a4373953ca3fdf3b04c4a29c2c4f8ea80
Signed-off-by: Marcin Wojtas <mw@semihalf.com>

show more ...

fix(plat/marvell/a3k): disable HANDLE_EA_EL3_FIRST by default

It was enabled in commit 3c7dcdac5c50 ("marvell/a3700: Prevent SError
accessing PCIe link while it is down") with a workaround for a bug

fix(plat/marvell/a3k): disable HANDLE_EA_EL3_FIRST by default

It was enabled in commit 3c7dcdac5c50 ("marvell/a3700: Prevent SError
accessing PCIe link while it is down") with a workaround for a bug found
in U-Boot and Linux kernel driver pci-aardvark.c (PCIe controller driver
for Armada 37xx SoC) which results in SError interrupt caused by AXI
SLVERR on external access (syndrome 0xbf000002) and immediate kernel
panic.

Now when proper patches are in both U-Boot and Linux kernel projects,
this workaround in TF-A should not have to be enabled by default
anymore as it has unwanted side effects like propagating all external
aborts, including non-fatal/correctable into EL3 and making them as
fatal which cause immediate abort.

Add documentation for HANDLE_EA_EL3_FIRST build option into Marvell
Armada build section.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Ic92b65bf9923505ab682830afb66c2f6cec70491

show more ...

docs(plat/marvell/a8k): document MSS_SUPPORT and SCP_BL2 build options

Add missing documentation for MSS_SUPPORT and SCP_BL2 build options used
on Marvell platforms.

Signed-off-by: Pali Rohár <pali

docs(plat/marvell/a8k): document MSS_SUPPORT and SCP_BL2 build options

Add missing documentation for MSS_SUPPORT and SCP_BL2 build options used
on Marvell platforms.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I852f60569a9a49269ae296c56cc83eb438528bee

show more ...

refactor(plat/marvell): move doc platform build options into own subsections

Update documentation and group platform specific build options into
their own subsections.

Signed-off-by: Pali Rohár <pa

refactor(plat/marvell): move doc platform build options into own subsections

Update documentation and group platform specific build options into
their own subsections.

Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I05927d8abf9f811493c49b856f06329220e7d8bb

show more ...