xref: /rk3399_ARM-atf/plat/marvell/armada/a8k/common/aarch64/plat_arch_config.c (revision a28471722afb3ae784d7bce2118c2ea703f8444c)
1 /*
2  * Copyright (C) 2018 Marvell International Ltd.
3  *
4  * SPDX-License-Identifier:     BSD-3-Clause
5  * https://spdx.org/licenses
6  */
7 
8 #include <arch_helpers.h>
9 #include <common/debug.h>
10 #include <drivers/marvell/cache_llc.h>
11 #include <lib/mmio.h>
12 #include <plat/common/platform.h>
13 
14 #define CCU_HTC_ASET			(MVEBU_CCU_BASE(MVEBU_AP0) + 0x264)
15 #define MVEBU_IO_AFFINITY		(0xF00)
16 
17 
18 static void plat_enable_affinity(void)
19 {
20 	int cluster_id;
21 	int affinity;
22 
23 	/* set CPU Affinity */
24 	cluster_id = plat_my_core_pos() / PLAT_MARVELL_CLUSTER_CORE_COUNT;
25 	affinity = (MVEBU_IO_AFFINITY | (1 << cluster_id));
26 	mmio_write_32(CCU_HTC_ASET, affinity);
27 
28 	/* set barier */
29 	isb();
30 }
31 
32 void marvell_psci_arch_init(int die_index)
33 {
34 #if LLC_ENABLE
35 	/* check if LLC is in exclusive mode
36 	 * as L2 is configured to UniqueClean eviction
37 	 * (in a8k reset handler)
38 	 */
39 	if (llc_is_exclusive(0) == 0)
40 		ERROR("LLC should be configured to exclusice mode\n");
41 #endif
42 
43 	/* Enable Affinity */
44 	plat_enable_affinity();
45 }
46