| 4fc179b6 | 11-May-2023 |
Thomas Perrot <thomas.perrot@bootlin.com> |
drivers: gpio: add device-tree based gpio controller framework
Build a small gpio framework based on the device-tree infrastructure and
on top of the existing gpio.h content. This framework allows t
drivers: gpio: add device-tree based gpio controller framework
Build a small gpio framework based on the device-tree infrastructure and
on top of the existing gpio.h content. This framework allows to register
gpio controllers and to retrieve gpio struct based on a "<name>-gpios"
properties.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 6dcd18c8 | 05-Jan-2023 |
Clément Léger <clement.leger@bootlin.com> |
drivers: move gpio.h include to drivers/
GPIOs are typically handled by drivers and this will be modified to add
device-tree support.
Also rename "ena_dis" with "enable_disable" because more explic
drivers: move gpio.h include to drivers/
GPIOs are typically handled by drivers and this will be modified to add
device-tree support.
Also rename "ena_dis" with "enable_disable" because more explicit.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| e80130f6 | 18-Jun-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: scmi-msg: add support for clock using generic clock framework
Integrating the clock framework with SCMI allows to avoid boilerplate
code to do so in platform specific files. This patch adds
drivers: scmi-msg: add support for clock using generic clock framework
Integrating the clock framework with SCMI allows to avoid boilerplate
code to do so in platform specific files. This patch adds a generic
layer that uses the generic clock framework to access and expose clocks.
SCMI clocks can be added from platform code using scmi_clk_add().
A new CFG_SCMI_MSG_USE_CLK configuration option is added to enable
this generic clock support.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 946f37ee | 04-Apr-2022 |
Etienne Carriere <etienne.carriere@linaro.org> |
driver: tpm2: remove TPM2 driver
Remove TPM2 driver from OP-TEE core. OP-TEE will instead rely on a
remote REE TPM2 driver allowing REE OS to embed TPM2 software stack
and leverage TPM2 features.
A
driver: tpm2: remove TPM2 driver
Remove TPM2 driver from OP-TEE core. OP-TEE will instead rely on a
remote REE TPM2 driver allowing REE OS to embed TPM2 software stack
and leverage TPM2 features.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 426790bd | 13-Feb-2023 |
Jeffrey Kardatzke <jkardatzke@google.com> |
drivers: add cbmem console driver
This adds a CBMEM console driver which gets the cbmem address from a
device tree with the coreboot table information.
Signed-off-by: Jeffrey Kardatzke <jkardatzke@
drivers: add cbmem console driver
This adds a CBMEM console driver which gets the cbmem address from a
device tree with the coreboot table information.
Signed-off-by: Jeffrey Kardatzke <jkardatzke@google.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 9e3c57c8 | 28-Feb-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: dt_driver: move related content from dt.h to dt_driver.h
Moves so-called dt_driver related declarations and definitions from
dt.h to dt_drivers.h. Incidentally adds an inline description to
en
core: dt_driver: move related content from dt.h to dt_driver.h
Moves so-called dt_driver related declarations and definitions from
dt.h to dt_drivers.h. Incidentally adds an inline description to
enum dt_driver_type. This change clarifies when a source file shall
include dt.h and/or dt_driver.h.
This change updates driver source files to include none, one or both of
these header files where applicable.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 8bc9c9e2 | 16-Dec-2022 |
Clément Léger <clement.leger@bootlin.com> |
drivers: i2c: add a simple framework to handle i2c devices
Add simple i2c support which provides support for I2C controllers and
devices using the generic DT mechanisms that already exists. I2C
cont
drivers: i2c: add a simple framework to handle i2c devices
Add simple i2c support which provides support for I2C controllers and
devices using the generic DT mechanisms that already exists. I2C
controllers needs to implement i2c_ctrl_ops to provide i2c operations
such as read, write and smbus commands depending on their capabilities.
I2C devices driver can then be defined using DEFINE_I2C_DEV_DRIVER().
This macros will use a default i2c probe function (__i2c_probe()) which
will then call the I2C device probe function by passing a i2c_dev struct
that can be used to communicate with the I2C device defined in the
device-tree.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 753e6fe4 | 24-Feb-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: imx_mu: increase maximum MU message size
Increase MU message maximum size to 17 words. It corresponds to the
biggest message of the ELE API.
Signed-off-by: Clement Faure <clement.faure@nxp
drivers: imx_mu: increase maximum MU message size
Increase MU message maximum size to 17 words. It corresponds to the
biggest message of the ELE API.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 088116c9 | 24-Feb-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: imx_mu: add support for imx93
Add MU support for imx93.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carr
drivers: imx_mu: add support for imx93
Add MU support for imx93.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| d538d293 | 23-Jan-2023 |
Clement Faure <clement.faure@nxp.com> |
drivers: caam: add manufacturing protection feature
The CAAM features a "manufacturing protection" functionality.
It is a authentication process used to authenticate the chip to
the OEM's server. Th
drivers: caam: add manufacturing protection feature
The CAAM features a "manufacturing protection" functionality.
It is a authentication process used to authenticate the chip to
the OEM's server. The authentication process can ensure the chip:
* is a genuine NXP part
* is a correct part type
* has been properly fused
* is running a authenticated software
* runs in secure/trusted mode.
Signed-off-by: Cedric Neveux <cedric.neveux@nxp.com>
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 1428fce8 | 23-Jan-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: gic: rename macros GIC_SGI, GIC_PPI and GIC_SPI
Renames OP-TEE core macros GIC_SGI(), GIC_PPI() and GIC_SPI() to
GIC_xxx_TO_ITNUM() to prevent collision with macros GIC_SPI and CFG_PPI
defined
core: gic: rename macros GIC_SGI, GIC_PPI and GIC_SPI
Renames OP-TEE core macros GIC_SGI(), GIC_PPI() and GIC_SPI() to
GIC_xxx_TO_ITNUM() to prevent collision with macros GIC_SPI and CFG_PPI
defined in GIC DT bindings.
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 999da91a | 20-Dec-2022 |
Andrew Mustea <andrew.mustea@microsoft.com> |
core: drivers: nxp: bit shift the ITS and SB bits when reading the SFP
- The Intent to Secure (ITS) and Secure Boot (SB) flags are written to a
given pointer in ls_sfp_get_its() and ls_sfp_get_sb(
core: drivers: nxp: bit shift the ITS and SB bits when reading the SFP
- The Intent to Secure (ITS) and Secure Boot (SB) flags are written to a
given pointer in ls_sfp_get_its() and ls_sfp_get_sb() respectively.
- The written values are equivalent to the entire masked OSPR0 and OSPR1
registers.
- The two functions should instead update a pointer with a boolean
integer containing the bit shifted value of the desired flag.
Signed-off-by: Andrew Mustea <andrew.mustea@microsoft.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 385b0436 | 20-Dec-2022 |
Andrew Mustea <andrew.mustea@microsoft.com> |
core: drivers: nxp: update LX series SFP fuse timeout
- The LX series manual specifies that fusing the SFP can take up to
100ms to complete.
- The fuse timeout in the LS SFP driver should be chang
core: drivers: nxp: update LX series SFP fuse timeout
- The LX series manual specifies that fusing the SFP can take up to
100ms to complete.
- The fuse timeout in the LS SFP driver should be changed to 150ms
so that the possible 100ms timeout has a buffer to interpret errors.
Signed-off-by: Andrew Mustea <andrew.mustea@microsoft.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
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| a0602052 | 08-Nov-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add driver for hafnium interrupt controller
Adds a driver for the paravirtualized interrupt controller provided by
Hafnium at S-EL2. The driver is enabled with CFG_CORE_HAFNIUM_INTC=y.
The in
core: add driver for hafnium interrupt controller
Adds a driver for the paravirtualized interrupt controller provided by
Hafnium at S-EL2. The driver is enabled with CFG_CORE_HAFNIUM_INTC=y.
The interrupt controller is limited compared to the GIC and only works
with interrupt ids which are already added in the SP manifest or as
predefined reserved interrupt ids.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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|
| 98c36268 | 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_rng: make stm32_rng_read() static
Reading a random number should be done via the generic API.
Makes stm32_rng_read() static as it is unused in other files and remove
stm32_rng.h, whi
drivers: stm32_rng: make stm32_rng_read() static
Reading a random number should be done via the generic API.
Makes stm32_rng_read() static as it is unused in other files and remove
stm32_rng.h, which is now empty.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 2f99ad28 | 18-Jan-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: clk: fix dt helper function description when clock is optional
Fixes clk_dt_get_by_index() and clk_dt_get_by_name() inline description
comments to state these functions return TEE_ERROR_ITEM_N
core: clk: fix dt helper function description when clock is optional
Fixes clk_dt_get_by_index() and clk_dt_get_by_name() inline description
comments to state these functions return TEE_ERROR_ITEM_NOT_FOUND when
the consumer DT node does not define a clock resource as for devices
where some clocks are optional. These functions return such error code
since commit [1].
Link: [1] 0adca93a5c68 ("core: dt_driver: differentiate error codes if property is not found")
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 7c102742 | 04-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: rstctrl: differentiate error codes if items not found
Differentiates error codes in rstctrl_dt_get_by_name() if reset-names
property does not exist by returning TEE_ERROR_ITEM_NOT_FOUND.
Ad
drivers: rstctrl: differentiate error codes if items not found
Differentiates error codes in rstctrl_dt_get_by_name() if reset-names
property does not exist by returning TEE_ERROR_ITEM_NOT_FOUND.
Add comment for rstctrl_dt_get_by_index() that can now return
TEE_ERROR_ITEM_NOT_FOUND.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 5df61a5d | 05-Jul-2021 |
Clément Léger <clement.leger@bootlin.com> |
drivers: clk: add support for clk_get_rates_array
In order to query rates from clients, add get_rates_array() which
returns a supported rate array.
Reviewed-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
drivers: clk: add support for clk_get_rates_array
In order to query rates from clients, add get_rates_array() which
returns a supported rate array.
Reviewed-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 0042538e | 05-Jan-2023 |
Etienne Carriere <etienne.carriere@linaro.org> |
plat-stm32mp1: fix visibility of stm32_bsec_shadow_register()
Makes stm32_bsec_shadow_register() function a visible driver API
function as it is needed when CFG_STM32_BSEC_SIP is enabled.
Fixed comm
plat-stm32mp1: fix visibility of stm32_bsec_shadow_register()
Makes stm32_bsec_shadow_register() function a visible driver API
function as it is needed when CFG_STM32_BSEC_SIP is enabled.
Fixed commit made it a local function which was wrong.
Fixes: a638030bce84 ("drivers: stm32_bsec: remove unused functions")
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 4b4b84a8 | 12-Dec-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_bsec: remove protection on debug configuration
Keeps stm32_bsec_write_debug_conf() out of CFG_STM32_BSEC_WRITE
purpose. This switch must protect OTP memory writes, not accesses
to BSE
drivers: stm32_bsec: remove protection on debug configuration
Keeps stm32_bsec_write_debug_conf() out of CFG_STM32_BSEC_WRITE
purpose. This switch must protect OTP memory writes, not accesses
to BSEC configuration registers.
CFG_STM32_BSEC_WRITE is now default enabled and not set to
CFG_TEE_CORE_DEBUG value.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| a638030b | 07-Dec-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_bsec: remove unused functions
Removes unused functions stm32_bsec_otp_lock() and
stm32_bsec_shadow_register().
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-o
drivers: stm32_bsec: remove unused functions
Removes unused functions stm32_bsec_otp_lock() and
stm32_bsec_shadow_register().
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 7dfc80ab | 12-Dec-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_bsec: add new generic interfaces
Exports generic functions to retrieve the BSEC state and check
if a fuse can be read depending on the BSEC current state.
Adds some robustness in the
drivers: stm32_bsec: add new generic interfaces
Exports generic functions to retrieve the BSEC state and check
if a fuse can be read depending on the BSEC current state.
Adds some robustness in the driver to enforce security when
trying to access a fuse.
It is a preliminary step for BSEC PTA introduction.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 667e576e | 04-Jul-2022 |
Jorge Ramirez-Ortiz <jorge@foundries.io> |
drivers: versal: physical unclonable function
This driver uses the PLM xilpuf service to deliver the physical
unclonable function (PUF).
The Physical unclonable function (PUF) generates two device
drivers: versal: physical unclonable function
This driver uses the PLM xilpuf service to deliver the physical
unclonable function (PUF).
The Physical unclonable function (PUF) generates two device unique
signatures per die. One signature is used for the key encryption key
(KEK) and one signature is used as an unique identification value.
The Unique ID is fully accessible and its value can be cleared
(hidden) and regenerated.
The KEK is never accessible and only usable from the AES-GCM engine.
https://github.com/Xilinx/embeddedsw
[1] TRM: https://docs.xilinx.com/r/en-US/am011-versal-acap-trm
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 93114f2e | 07-Dec-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_bsec: support NVMEM cell description in device-tree
Support the nvmem cells description in device tree and
add the platform helper function stm32_bsec_find_otp_in_nvmem_layout()
that
drivers: stm32_bsec: support NVMEM cell description in device-tree
Support the nvmem cells description in device tree and
add the platform helper function stm32_bsec_find_otp_in_nvmem_layout()
that allows drivers to find an OTP location (BSEC word number and bit
size) from the OTP string identifier, name of the cell in device tree.
The bsec driver directly reads the nvmem cells sub node of bsec device.
This allow to remove the hardcoded OTP index in platform and is aligned
with linux kernel binding.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 1ff52b85 | 12-Dec-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_bsec: move debug defines to include
Moves definition of DEBUG status macros from driver source file to
its header file to allow other drivers to control the debug level.
Introduces BS
drivers: stm32_bsec: move debug defines to include
Moves definition of DEBUG status macros from driver source file to
its header file to allow other drivers to control the debug level.
Introduces BSEC_DEBUG_ALL that is the default debug configuration.
Removes configuration masking as it has no use.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
show more ...
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