clk: stm32mp15: embed clock names only in debug mode

Don't embed clock names when not in debug mode, even when log level
is DEBUG_LEVEL. This saves few bytes of SYSRAM for the pager.

Acked-by: Gati

clk: stm32mp15: embed clock names only in debug mode

Don't embed clock names when not in debug mode, even when log level
is DEBUG_LEVEL. This saves few bytes of SYSRAM for the pager.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: sam: remove hard coded USB clock setup

Now that USB clock is exposed and usable from the device-tree, we can rely
on the "assigned-clock" properties that have been added in the
device-

drivers: clk: sam: remove hard coded USB clock setup

Now that USB clock is exposed and usable from the device-tree, we can rely
on the "assigned-clock" properties that have been added in the
device-tree.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: sam: export audiopll_fracck and usbck

This allows to modify the clocks rate and parents from the device-tree
using assigned-clock-parents/rate properties rather than hardcoding the
clo

drivers: clk: sam: export audiopll_fracck and usbck

This allows to modify the clocks rate and parents from the device-tree
using assigned-clock-parents/rate properties rather than hardcoding the
clocks rate.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: sam: add a macro for count of main clocks

Add a macro instead of using clock index name to define the count of main
clocks. This will ease the changes when exposing new clocks.

Signed

drivers: clk: sam: add a macro for count of main clocks

Add a macro instead of using clock index name to define the count of main
clocks. This will ease the changes when exposing new clocks.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: stm32_*: remove code for when DT is not supported

This change removes implementation managing cases when CFG_EMBED_DTB or
CFG_DT are disabled. This change aims to simplify source files and

drivers: stm32_*: remove code for when DT is not supported

This change removes implementation managing cases when CFG_EMBED_DTB or
CFG_DT are disabled. This change aims to simplify source files and is
related to commit [1] from which stm32mp1 platform requires DTB for the
drivers configuration.

Link: [1] 474ad1856b56 ("plat-stm32mp1: conf: mandate the use of device tree on STM32MP1x platforms")
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: add support for clk_get_rates_array

In order to query rates from clients, add get_rates_array() which
returns a supported rate array.

Reviewed-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>

drivers: clk: add support for clk_get_rates_array

In order to query rates from clients, add get_rates_array() which
returns a supported rate array.

Reviewed-by: Xiaoxu Zeng <zengxiaoxu@huawei.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk_dt: Switch to use get_secure_dt()

This adds support for both embedded and external secure device trees so
that clock driver and system configuration information can be fetched from
ther

drivers: clk_dt: Switch to use get_secure_dt()

This adds support for both embedded and external secure device trees so
that clock driver and system configuration information can be fetched from
there.

Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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core: dt: Make it possible to alter device mapping

In case where IP core device is TrustZone aware and is used by both REE
and TEE dt_map_dev() would normally cause non-secure mapping for the
device

core: dt: Make it possible to alter device mapping

In case where IP core device is TrustZone aware and is used by both REE
and TEE dt_map_dev() would normally cause non-secure mapping for the
device.

When selected registers in IP core are only accessible by TrustZone device
needs to be mapped with MEM_AREA_IO_SEC to cause actual AXI memory access
be made with AWPROT[1] and ARPROT[1] bits configured properly.

This adds new argument for dt_map_dev() to enable forcing mapping to be
secure or non-secure.

Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-stm32mp1: add support for i2c5 bus

This allows stm32_i2c driver to properly initialize and use
i2c5 bus on stm32mp15 SoC.

Signed-off-by: Michael Scott <mike@foundries.io>
Signed-off-by: Igor O

plat-stm32mp1: add support for i2c5 bus

This allows stm32_i2c driver to properly initialize and use
i2c5 bus on stm32mp15 SoC.

Signed-off-by: Michael Scott <mike@foundries.io>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: clk-stm32mp13: add ck_mlahb to critical clocks

This clock must remain enabled as long as the platform is running.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Sign

drivers: clk: clk-stm32mp13: add ck_mlahb to critical clocks

This clock must remain enabled as long as the platform is running.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: stm32_shared_io: introduce shared io driver

This commit implements shared registers support, previously handled in
core/arch/arm/plat-stm32mp1/shared_resources.c, at platform level.

Defaul

drivers: stm32_shared_io: introduce shared io driver

This commit implements shared registers support, previously handled in
core/arch/arm/plat-stm32mp1/shared_resources.c, at platform level.

Default enable CFG_STM32_SHARED_IO.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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plat-stm32mp1: use helper header file stm32mp_dt_bindings.h

Changes plat-stm32mp1 and its drivers to rely on stm32mp_dt_bindings.h
which simplifies support of both variants STM32MP15 and STM32MP13 t

plat-stm32mp1: use helper header file stm32mp_dt_bindings.h

Changes plat-stm32mp1 and its drivers to rely on stm32mp_dt_bindings.h
which simplifies support of both variants STM32MP15 and STM32MP13 that
will use each specific DT bindings.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: remove stm32_clock_*() helpers

Removes function that were deprecated: stm32_clock_is_enabled(),
stm32_clock_enable(), stm32_clock_disable() and stm32_clock_get_rate().

Signed-off-by:

drivers: clk: remove stm32_clock_*() helpers

Removes function that were deprecated: stm32_clock_is_enabled(),
stm32_clock_enable(), stm32_clock_disable() and stm32_clock_get_rate().

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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drivers: clk: Fix check for assigned-clock-rates index

Index should actually be strictly less than rate_len. Fix this which
might happen with the following description:

assigned-clock = <foo>, <bar

drivers: clk: Fix check for assigned-clock-rates index

Index should actually be strictly less than rate_len. Fix this which
might happen with the following description:

assigned-clock = <foo>, <bar>;
assigned-clock-parents = <foo_parent>, <bar_parent>;
assigned-clock-rates = <1000>;

Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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drivers: clk: add CFG_DRIVERS_CLK_EARLY_PROBE

Adds configuration switch to allow clocks to be probed as any driver,
possibly deferring initialization. This is needed when a clock driver
has dependen

drivers: clk: add CFG_DRIVERS_CLK_EARLY_PROBE

Adds configuration switch to allow clocks to be probed as any driver,
possibly deferring initialization. This is needed when a clock driver
has dependencies on another resource.

The configuration is default enabled (CFG_DRIVERS_CLK_EARLY_PROBE=y)
that is probing clock drivers before other drivers using the early_init
initcall level as done prior this change.

Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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clk: stm32mp13: add all clocks for STM32MP13

Registers all STM32PM13 clock with the clock framework.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Gabriel Fernandez <gabri

clk: stm32mp13: add all clocks for STM32MP13

Registers all STM32PM13 clock with the clock framework.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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clk: stm32mp13: Introduce STM32MP13 clocks platform

This driver uses a clk-stm32-core API to manage STM32 gates, dividers
and muxes.
The goal of this first patch is to parse the device tree and init

clk: stm32mp13: Introduce STM32MP13 clocks platform

This driver uses a clk-stm32-core API to manage STM32 gates, dividers
and muxes.
The goal of this first patch is to parse the device tree and initialize
a platform data to configure the clock tree.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

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core: tag ops structures with __relrodata_unpaged

Global structures currently tagged with __rodata_unpaged need to use
__relrodata_unpaged instead because they contain pointers which are
subject to

core: tag ops structures with __relrodata_unpaged

Global structures currently tagged with __rodata_unpaged need to use
__relrodata_unpaged instead because they contain pointers which are
subject to relocation when CFG_CORE_ASLR=y. Doing so moves them out of
.rodata which will now stay unmodified even with ASLR turned on.

Signed-off-by: Jerome Forissier <jerome@forissier.org>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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drivers: clk: sam: add suspend support

PMC register contents needs to be restored after resuming. Add support
for this using PM callbacks.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
A

drivers: clk: sam: add suspend support

PMC register contents needs to be restored after resuming. Add support
for this using PM callbacks.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Clément Léger <clement.leger@bootlin.com>

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drivers: clk: stm32mp15: convert clock reference to clock ID/GPIO bank

Add stm32mp_clock_id_to_clk() to allow some platform specific functions
to act on clock while based only on the clock DT bindin

drivers: clk: stm32mp15: convert clock reference to clock ID/GPIO bank

Add stm32mp_clock_id_to_clk() to allow some platform specific functions
to act on clock while based only on the clock DT binding ID used in
stm32mp1 old clock API functions.

Add stm32_get_gpio_bank_clk() to return the clock reference related to
a GPIO bank.

Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: stm32mp1: fix index ordering parent clock array

Fix order in stm32mp1_clk_parent_name[].

Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne Carriere <etie

drivers: clk: stm32mp1: fix index ordering parent clock array

Fix order in stm32mp1_clk_parent_name[].

Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: stm32mp1: fix HCLK6 parent clock

Fix get_parent_id_parent() the return HCLK6 parent clock that previous
implementation forbade.

Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com

drivers: clk: stm32mp1: fix HCLK6 parent clock

Fix get_parent_id_parent() the return HCLK6 parent clock that previous
implementation forbade.

Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: stm32mp1: fix BRSRAM parent clock reference

Fix reference to BKPSRAM parent clock for platform stm32mp1. No
functional change as parent clock reference used prior the change
(_PCLK5) l

drivers: clk: stm32mp1: fix BRSRAM parent clock reference

Fix reference to BKPSRAM parent clock for platform stm32mp1. No
functional change as parent clock reference used prior the change
(_PCLK5) led to the same parent clock rate value.

Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: stm32mp15: support RTC and MPU clocks

Add RTC and MPU clocks support to platform stm32mp1.

Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne Carriere <et

drivers: clk: stm32mp15: support RTC and MPU clocks

Add RTC and MPU clocks support to platform stm32mp1.

Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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drivers: clk: stm32mp15: split oscillator and parent clock IDs

Use specific identifiers for root oscillators (prefixed OSC_) while
parent clock IDs are left unchanged.

Reviewed-by: Lionel Debieve <

drivers: clk: stm32mp15: split oscillator and parent clock IDs

Use specific identifiers for root oscillators (prefixed OSC_) while
parent clock IDs are left unchanged.

Reviewed-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

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