History log of /optee_os/core/arch/arm/ (Results 301 – 325 of 3634)
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3c6d5fc602-May-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_etzpc: update driver to set ETZPC configuration from DT

Remove old implementation where the ETZPC configuration was a hard
coded table in the shared resources file and use the device

drivers: stm32_etzpc: update driver to set ETZPC configuration from DT

Remove old implementation where the ETZPC configuration was a hard
coded table in the shared resources file and use the device tree to
get it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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11529a2202-May-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp1: default enable CFG_DRIVERS_FIREWALL

Default enable the CFG_DRIVERS_FIREWALL switch that is used to enable
the support of the firewall framework.

On this platform, only the ETZPC is a

plat-stm32mp1: default enable CFG_DRIVERS_FIREWALL

Default enable the CFG_DRIVERS_FIREWALL switch that is used to enable
the support of the firewall framework.

On this platform, only the ETZPC is a firewall controller for now.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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536461ad02-May-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: define ETZPC as an access controller for stm32mp13 platforms

ETZPC is a firewall controller. Add the access-controllers property to
all ETZPC sub-nodes on stm32mp13 platforms. Also add t

dts: stm32: define ETZPC as an access controller for stm32mp13 platforms

ETZPC is a firewall controller. Add the access-controllers property to
all ETZPC sub-nodes on stm32mp13 platforms. Also add the "simple-bus"
compatible for backward compatibility and "#access-controllers-cells"
to the ETZPC node.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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b931331202-May-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: define ETZPC as an access controller for stm32mp15 platforms

ETZPC is a firewall controller. Add the access-controllers property to
all ETZPC sub-nodes on stm32mp15x platforms. Also add

dts: stm32: define ETZPC as an access controller for stm32mp15 platforms

ETZPC is a firewall controller. Add the access-controllers property to
all ETZPC sub-nodes on stm32mp15x platforms. Also add the "simple-bus"
compatible for backward compatibility and "#access-controllers-cells"
to the ETZPC node.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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4111544702-May-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: add the ETZPC configuration table for stm32mp1x boards

Add the tables defining the ETZPC firewall controller configuration
that will be set at boot time on stm32mp1x boards.

Signed-off-

dts: stm32: add the ETZPC configuration table for stm32mp1x boards

Add the tables defining the ETZPC firewall controller configuration
that will be set at boot time on stm32mp1x boards.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Johann Neuhauser <jneuhauser@dh-electronics.com>

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033d7b3f02-May-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dt-bindings: add platform specific ETZPC bindings

Define ETZPC bindings for STM32MP15 and STM32MP13 and add these
header files into the stm32mp_dt_bindings helper. While there, also
update some incl

dt-bindings: add platform specific ETZPC bindings

Define ETZPC bindings for STM32MP15 and STM32MP13 and add these
header files into the stm32mp_dt_bindings helper. While there, also
update some includes to fix the path errors.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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23df205f02-Oct-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: use st,stm32mp15-i2c-non-secure compatible for the I2C4

Use st,stm32mp15-i2c-non-secure compatible for the I2C4 as it is
currently non-secure on stm32mp15 dkx and evx platforms.

Signed-

dts: stm32: use st,stm32mp15-i2c-non-secure compatible for the I2C4

Use st,stm32mp15-i2c-non-secure compatible for the I2C4 as it is
currently non-secure on stm32mp15 dkx and evx platforms.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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da993b1502-Oct-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: disable VREFBUF on stm32mp15-dkx platforms

VREFBUF is currently not used on stm32mp15-dkx platforms,
so disable it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Revi

dts: stm32: disable VREFBUF on stm32mp15-dkx platforms

VREFBUF is currently not used on stm32mp15-dkx platforms,
so disable it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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c3e0dd4c02-Oct-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: disable ADC2 on stm32mp135f-dk

Remove ADC2 configuration in stm32mp135-dk.dts since OP-TEE does not
use the device.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Revi

dts: stm32: disable ADC2 on stm32mp135f-dk

Remove ADC2 configuration in stm32mp135-dk.dts since OP-TEE does not
use the device.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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1f408a9702-Oct-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: default disable DMA at SoC level for stm32mp15 platforms

DMA node in stm32mp15* SoC DTSI files shouldn't be enabled by default,
we don't even have a driver to handle it. Therefore defaul

dts: stm32: default disable DMA at SoC level for stm32mp15 platforms

DMA node in stm32mp15* SoC DTSI files shouldn't be enabled by default,
we don't even have a driver to handle it. Therefore default disable it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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13748e6701-Oct-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp2: force CFG_DRIVERS_FIREWALL when supporting RIF controllers

When firewall controllers drivers that implements firewall framework
support are embedded such as RISAB or RIFSC, then CFG_D

plat-stm32mp2: force CFG_DRIVERS_FIREWALL when supporting RIF controllers

When firewall controllers drivers that implements firewall framework
support are embedded such as RISAB or RIFSC, then CFG_DRIVERS_FIREWALL
should be forced enabled.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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1b80b1cd01-Oct-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: move firewall dt-bindings include at SoC level

Firewall controllers are present on every variant of stm32mp25 SoCs.
Therefore, move the inclusion of their dt-bindings at SoC level.

Sign

dts: stm32: move firewall dt-bindings include at SoC level

Firewall controllers are present on every variant of stm32mp25 SoCs.
Therefore, move the inclusion of their dt-bindings at SoC level.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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5ddbd85c01-Oct-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: add RISAB configurations for the stm32mp257f-ev1 platform

Add the internal memory layout and RIF configuration for the
stm32mp257f-ev1 platform.

Signed-off-by: Gatien Chevallier <gatien

dts: stm32: add RISAB configurations for the stm32mp257f-ev1 platform

Add the internal memory layout and RIF configuration for the
stm32mp257f-ev1 platform.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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182364b301-Oct-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: add RISAB nodes in the stm32mp251 SoC DT file

Add the RISAB1/2/3/4/5/6 and default enable all of them except for the
RISAB6 that protects the VDERAM.

Signed-off-by: Gatien Chevallier <g

dts: stm32: add RISAB nodes in the stm32mp251 SoC DT file

Add the RISAB1/2/3/4/5/6 and default enable all of them except for the
RISAB6 that protects the VDERAM.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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8a40e62001-Oct-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp2: default enable RISAB on stm32mp2 platforms

Default enable RISAB driver for platform stm32mp2.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Ca

plat-stm32mp2: default enable RISAB on stm32mp2 platforms

Default enable RISAB driver for platform stm32mp2.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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b9164fde01-Oct-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp2: add RISAB1/2 base addresses in platform configuration

Add RISAB1/2 base addresses in platform configuration.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed

plat-stm32mp2: add RISAB1/2 base addresses in platform configuration

Add RISAB1/2 base addresses in platform configuration.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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60c093a001-Oct-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp2: add VDERAM SYSCFG support

Adds support for the VDERAM configuration that is present in SYSCFG.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne C

plat-stm32mp2: add VDERAM SYSCFG support

Adds support for the VDERAM configuration that is present in SYSCFG.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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136cc65f10-Oct-2024 Sahil Malhotra <sahil.malhotra@nxp.com>

core: imx: disable ELE support on i.MX91 by default

On i.MX91, there is only one MU to communicate with ELE,
which cannot be dedicated on OP-TEE side all the time.
There may be ELE services running

core: imx: disable ELE support on i.MX91 by default

On i.MX91, there is only one MU to communicate with ELE,
which cannot be dedicated on OP-TEE side all the time.
There may be ELE services running on Linux side, which can
cause conflict with OP-TEE.
So disabling ELE by default for now.

Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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90cdb7e315-Jul-2024 Ziad Elhanafy <ziad.elhanafy@arm.com>

plat-rd1ae: introduce RD-1 AE platform support

Add initial support for RD-1 AE platform, this includes:
1- GIC and console initialization functions.
2- Memory layout.
3- Make files.
4- Assembly func

plat-rd1ae: introduce RD-1 AE platform support

Add initial support for RD-1 AE platform, this includes:
1- GIC and console initialization functions.
2- Memory layout.
3- Make files.
4- Assembly function `get_core_pos_mpidr` to compute the
linear core position from MPIDR.

Signed-off-by: Ziad Elhanafy <ziad.elhanafy@arm.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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0bf5c54207-Oct-2024 Ziad Elhanafy <ziad.elhanafy@arm.com>

core: introduce Arm Cortex-v9 and Neoverse-v2 CPU support

Introduce cortex-armv9.mk file and use it to support the
Armv9 Neoverse v2 CPU.

Signed-off-by: Ziad Elhanafy <ziad.elhanafy@arm.com>
Acked-

core: introduce Arm Cortex-v9 and Neoverse-v2 CPU support

Introduce cortex-armv9.mk file and use it to support the
Armv9 Neoverse v2 CPU.

Signed-off-by: Ziad Elhanafy <ziad.elhanafy@arm.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>

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fc80dabb04-Oct-2024 Clement Faure <clement.faure@nxp.com>

core: imx: enable CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID by default

Use the platform tee_otp_get_die_id() implementation to generate the SSK
key.

Signed-off-by: Clement Faure <clement.faure@nxp.

core: imx: enable CFG_CORE_HUK_SUBKEY_COMPAT_USE_OTP_DIE_ID by default

Use the platform tee_otp_get_die_id() implementation to generate the SSK
key.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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34c7702908-Apr-2022 Clement Faure <clement.faure@nxp.com>

core: imx: enable attestation PTA

Enable the attestation PTA by default for i.MX platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.co

core: imx: enable attestation PTA

Enable the attestation PTA by default for i.MX platforms.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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d1c079e229-Aug-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

dts: stm32: add RNG node in stm32mp251 SoC device tree file

Add the RNG node in the stm32mp251 SoC device tree file and default
enable it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.s

dts: stm32: add RNG node in stm32mp251 SoC device tree file

Add the RNG node in the stm32mp251 SoC device tree file and default
enable it.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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486762a529-Aug-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

plat-stm32mp2: conf: default enable CFG_DRIVERS_FIREWALL

Default enable the CFG_DRIVERS_FIREWALL switch that is used to enable
the support of the firewall framework.

Signed-off-by: Gatien Chevallie

plat-stm32mp2: conf: default enable CFG_DRIVERS_FIREWALL

Default enable the CFG_DRIVERS_FIREWALL switch that is used to enable
the support of the firewall framework.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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a6a331e502-Sep-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_rifsc: restrain access on non secure peripherals for OP-TEE

Implement a driver specific firewall bus probe that will
only probe secure peripherals and implement firewall exceptions fo

drivers: stm32_rifsc: restrain access on non secure peripherals for OP-TEE

Implement a driver specific firewall bus probe that will
only probe secure peripherals and implement firewall exceptions for
which no firewall operations will be done when CFG_INSECURE is set.
This allows, for example, to share a console with the non-secure world
for development purposes.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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