Searched refs:ubSSCClk (Results 1 – 6 of 6) sorted by relevance
3046 MS_U32 ubSSCClk = HDMITX_SSC_CLK; in MHal_HDMITx_EnableSSC()3067 if(ubSSCClk != 0) in MHal_HDMITx_EnableSSC()3068 dSSC_Span = (dSYNCLK * 250) / (ubSSCClk); //Span = SYN_CLK_KHz / (SSC_CLK_KHz * 4) in MHal_HDMITx_EnableSSC()
3008 MS_U32 ubSSCClk = HDMITX_SSC_CLK; in MHal_HDMITx_EnableSSC()3029 if(ubSSCClk != 0) in MHal_HDMITx_EnableSSC()3030 dSSC_Span = (dSYNCLK * 250) / (ubSSCClk); //Span = SYN_CLK_KHz / (SSC_CLK_KHz * 4) in MHal_HDMITx_EnableSSC()
3447 MS_U32 ubSSCClk = HDMITX_SSC_CLK; in MHal_HDMITx_EnableSSC()3468 if(ubSSCClk != 0) in MHal_HDMITx_EnableSSC()3469 dSSC_Span = (dSYNCLK * 250) / (ubSSCClk); //Span = SYN_CLK_KHz / (SSC_CLK_KHz * 4) in MHal_HDMITx_EnableSSC()
2958 double ubSSCClk = HDMITX_SSC_CLK; in MHal_HDMITx_EnableSSC() local2979 dSSC_Span = dSYNCLK * 1000 / (ubSSCClk * 4); //Span = SYN_CLK / (SSC_CLK * 4) in MHal_HDMITx_EnableSSC()
2943 double ubSSCClk = HDMITX_SSC_CLK; in MHal_HDMITx_EnableSSC()2964 dSSC_Span = dSYNCLK * 1000 / (ubSSCClk * 4); //Span = SYN_CLK / (SSC_CLK * 4) in MHal_HDMITx_EnableSSC()
3331 double ubSSCClk = HDMITX_SSC_CLK; in MHal_HDMITx_EnableSSC()3352 dSSC_Span = dSYNCLK * 1000 / (ubSSCClk * 4); //Span = SYN_CLK / (SSC_CLK * 4) in MHal_HDMITx_EnableSSC()